P398 - A02: G92-600/700/975, G3-256, MXM V2.0, MXM-III 8/16/32Mx32 GDDR3, 256bit, 256/512/1024MB LVDS, Dvi-D, Hdmi, Video Out, Vga, HDCP, Sli
P398 - A02: G92-600/700/975, G3-256, MXM V2.0, MXM-III 8/16/32Mx32 GDDR3, 256bit, 256/512/1024MB LVDS, Dvi-D, Hdmi, Video Out, Vga, HDCP, Sli
Table of Contents:
Page 1: Title Page
2
Page 2: MXM-III and PCI-EX Connector 2
Page 3: FrameBuffer - GPU Partition A/B
Page 4: FrameBuffer - GPU Partition C/D
Page 5: FrameBuffer - Partition A 16/32Mx32 BGA136 GDDR3
Page 6: FrameBuffer - Partition B 16/32Mx32 BGA136 GDDR3
Page 7: FrameBuffer - Partition C 16/32Mx32 BGA136 GDDR3
Page 8: FrameBuffer - Partition D 16/32Mx32 BGA136 GDDR3
Page 9: FrameBuffer - Decoupling
Page 10: DACA, DACB, and DACC Interface
Page 11: IFPA/B LVDS Output, IFPC/D TMDS Output
3
Page 12: XTAL, Spread Spectrum, and JTAG 3
Page 13: VID_PLLVDD, GPIO, Temp Sensor, VBIOS and HDCP ROM
Page 14: MXM-III Connector, MIOA and MIOB Interface
Page 15: Power Decoupling and GND
Page 16: Power Supply I - NVVDD
Page 17: Power Supply II - FBVDDQ, PEX_VDD
Page 18: Strap Configuration
Page 19: Mechanical
Page 20: BASENET REPORT
Page 21: BASENET REPORT
4
Page 22: BASENET REPORT 4
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL Title Page
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 1 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND GND
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL MXM-III and PCI-EX Connector
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 2 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
FBAB_PLLAVDD
VOLTAGE
1.2V
MAX_CURRENT
0.25A
MIN_LINE_WIDTH
16MIL
FB_VREF 12MIL
IN
FB_CAL_PD_VDDQ0 12MIL
IN
FB_CAL_PU_GND0 12MIL
IN
FB_CAL_TERM_GND0 12MIL
IN
FB_CAL_PD_VDDQ1 12MIL
IN
FB_CAL_PU_GND1 12MIL
IN
FB_CAL_TERM_GND1 12MIL
IN
G1 G1
G92-975-A1 G92-975-A1
BGA1148 BGA1148
COMMON COMMON
2/24 MEM_A 3/24 MEM_B
5.4A<> 5.1G<> FBA_D<63..0> FBA_CMD<28..0> 5.1A< 5.1G< 6.4A<> 6.1G<> FBB_D<63..0> FBB_CMD<28..0> 6.1A< 6.1G<
BI OUT BI OUT
5.4A<> 5.1G<> FBA_DQM<7..0> 0 FBA_D<0> AH35 FBA_CMD0 AK28 FBA_CMD<0> 0 6.4A<> 6.1G<> FBB_DQM<7..0> 0 FBB_D<0> G36 FBB_CMD0 P33 FBB_CMD<0> 0
OUT
FBA_DQS_RN<7..0> 1 FBA_D<1> AH36 FBAD0 AK29 FBA_CMD<1> 1
OUT
FBB_DQS_RN<7..0> 1 FBB_D<1> G35 FBBD0 N33 FBB_CMD<1> 1
5.5A<> 5.1G<> FBA_CMD1 6.5A<> 6.1G<> FBB_CMD1
IN
FBA_DQS_WP<7..0> 2 FBA_D<2> AH34 FBAD1 AN30 FBA_CMD<2> 2
IN
FBB_DQS_WP<7..0> 2 FBB_D<2> H36 FBBD1 R31 FBB_CMD<2> 2
5.5A<> 5.1G<> FBA_CMD2 6.5A<> 6.1G<> FBB_CMD2
OUT
3 FBA_D<3> AJ34 FBAD2 AM27 FBA_CMD<3> 3
OUT
3 FBB_D<3> H34 FBBD2 U33 FBB_CMD<3> 3
AK36 FBAD3 FBA_CMD3 AN28 J35 FBBD3 FBB_CMD3 V30
4 FBA_D<4> FBA_CMD<4> 4 4 FBB_D<4> FBB_CMD<4> 4
AJ36 FBAD4 FBA_CMD4 AL29 J34 FBBD4 FBB_CMD4 T33
5 FBA_D<5> FBA_CMD<5> 5 5 FBB_D<5> FBB_CMD<5> 5
AK34 FBAD5 FBA_CMD5 AM30 K34 FBBD5 FBB_CMD5 T30
6 FBA_D<6> FBA_CMD<6> 6 6 FBB_D<6> FBB_CMD<6> 6
AL34 FBAD6 FBA_CMD6 AJ31 K35 FBBD6 FBB_CMD6 N32
7 FBA_D<7> FBA_CMD<7> 7 7 FBB_D<7> FBB_CMD<7> 7
AH32 FBAD7 FBA_CMD7 AK31 J31 FBBD7 FBB_CMD7 R32
8 FBA_D<8> FBA_CMD<8> 8 8 FBB_D<8> FBB_CMD<8> 8
AK33 FBAD8 FBA_CMD8 AH31 K32 FBBD8 FBB_CMD8 P32
9 FBA_D<9> FBA_CMD<9> 9 9 FBB_D<9> FBB_CMD<9> 9
AJ33 FBAD9 FBA_CMD9 AK25 J30 FBBD9 FBB_CMD9 U32
10 FBA_D<10> FBA_CMD<10> 10 10 FBB_D<10> FBB_CMD<10> 10
AH33 FBAD10 FBA_CMD10 AM26 H30 FBBD10 FBB_CMD10 U30
11 FBA_D<11> FBA_CMD<11> 11 11 FBB_D<11> FBB_CMD<11> 11
AL33 FBAD11 FBA_CMD11 AL31 L32 FBBD11 FBB_CMD11 P30
12 FBA_D<12> FBA_CMD<12> 12 12 FBB_D<12> FBB_CMD<12> 12
AN32 FBAD12 FBA_CMD12 AN29 K30 FBBD12 FBB_CMD12 V31
13 FBA_D<13> FBA_CMD<13> 13 13 FBB_D<13> FBB_CMD<13> 13
AN33 FBAD13 FBA_CMD13 AK27 M31 FBBD13 FBB_CMD13 T28
14 FBA_D<14> FBA_CMD<14> 14 14 FBB_D<14> FBB_CMD<14> 14
AN31 FBAD14 FBA_CMD14 AK26 L30 FBBD14 FBB_CMD14 W30
2 15 FBA_D<15>
FBAD15 FBA_CMD15 FBA_CMD<15> 15 15 FBB_D<15>
FBBD15 FBB_CMD15 FBB_CMD<15> 15 2
16 FBA_D<16> AE32 FBA_CMD16 AN27 FBA_CMD<16> 16 16 FBB_D<16> G31 FBB_CMD16 V32 FBB_CMD<16> 16
17 FBA_D<17> AF30 FBAD16 AL25 FBA_CMD<17> 17 17 FBB_D<17> J32 FBBD16 T32 FBB_CMD<17> 17
AF32 FBAD17 FBA_CMD17 AJ30 J33 FBBD17 FBB_CMD17 N30
18 FBA_D<18> FBA_CMD<18> 18 18 FBB_D<18> FBB_CMD<18> 18
AE30 FBAD18 FBA_CMD18 AM31 F33 FBBD18 FBB_CMD18 P28
19 FBA_D<19> FBA_CMD<19> 19 19 FBB_D<19> FBB_CMD<19> 19
AE31 FBAD19 FBA_CMD19 AH30 H31 FBBD19 FBB_CMD19 P29
20 FBA_D<20> FBA_CMD<20> 20 20 FBB_D<20> FBB_CMD<20> 20
AC30 FBAD20 FBA_CMD20 AL30 E33 FBBD20 FBB_CMD20 U29
21 FBA_D<21> FBA_CMD<21> 21 21 FBB_D<21> FBB_CMD<21> 21
AC32 FBAD21 FBA_CMD21 AH29 F31 FBBD21 FBB_CMD21 N28
22 FBA_D<22> FBA_CMD<22> 22 22 FBB_D<22> FBB_CMD<22> 22
AD30 FBAD22 FBA_CMD22 AL28 F32 FBBD22 FBB_CMD22 R30
23 FBA_D<23> FBA_CMD<23> 23 23 FBB_D<23> FBB_CMD<23> 23
AG36 FBAD23 FBA_CMD23 AH28 F35 FBBD23 FBB_CMD23 M30
24 FBA_D<24> FBA_CMD<24> 24 24 FBB_D<24> FBB_CMD<24> 24
AG34 FBAD24 FBA_CMD24 AM28 G34 FBBD24 FBB_CMD24 T29
25 FBA_D<25> FBA_CMD<25> 25 25 FBB_D<25> FBB_CMD<25> 25
AG35 FBAD25 FBA_CMD25 AG30 F36 FBBD25 FBB_CMD25 N29
26 FBA_D<26> SNN_FBA_CMD<26> 26 FBB_D<26> SNN_FBB_CMD<26>
AF36 FBAD26 FBA_CMD26 AG28 F34 FBBD26 FBB_CMD26 AA30
27 FBA_D<27> SNN_FBA_CMD<27> 27 FBB_D<27> SNN_FBB_CMD<27>
28 FBA_D<28> AD36 FBAD27 FBA_CMD27 AF28 SNN_FBA_CMD<28> 28 FBB_D<28> C35 FBBD27 FBB_CMD27 Y29 SNN_FBB_CMD<28>
29 FBA_D<29> AD34 FBAD28 FBA_CMD28 29 FBB_D<29> D34 FBBD28 FBB_CMD28
30 FBA_D<30> AD35 FBAD29 AH26 FBA_CLK0 30 FBB_D<30> C36 FBBD29 M28 FBB_CLK0
FBA_CLK0 5.1G< 5.2A< FBB_CLK0 6.1G< 6.2A<
31 FBA_D<31> AE34 FBAD30 AH27 FBA_CLK0*
OUT
31 FBB_D<31> D35 FBBD30 L28 FBB_CLK0*
OUT
FBA_CLK0 5.1G< 5.2A< FBB_CLK0 6.1G< 6.2A<
32 FBA_D<32> AP36 FBAD31 AJ29 FBA_CLK1
OUT
32 FBB_D<32> N35 FBBD31 W31 FBB_CLK1
OUT
FBA_CLK1 5.1G< 5.2D< FBB_CLK1 6.1G< 6.2D<
33 FBA_D<33> AN35 FBAD32 AJ28 FBA_CLK1*
OUT
33 FBB_D<33> M34 FBBD32 W32 FBB_CLK1*
OUT
FBA_CLK1 5.1G< 5.2D< FBB_CLK1 6.1G< 6.2D<
34 FBA_D<34> AM34 FBAD33 OUT
34 FBB_D<34> L34 FBBD33 OUT
35 FBA_D<35> AP35 FBAD34 35 FBB_D<35> N36 FBBD34
36 FBA_D<36> AP34 FBAD35 36 FBB_D<36> P36 FBBD35
37 FBA_D<37> AP33 FBAD36 37 FBB_D<37> P34 FBBD36
38 FBA_D<38> AT34 FBAD37 38 FBB_D<38> R36 FBBD37
39 FBA_D<39> AR34 FBAD38 39 FBB_D<39> R34 FBBD38
40 FBA_D<40> AM22 FBAD39 40 FBB_D<40> AC33 FBBD39
41 FBA_D<41> AM25 FBAD40 41 FBB_D<41> Y33 FBBD40
42 FBA_D<42> AN26 FBAD41 42 FBB_D<42> Y30 FBBD41
43 FBA_D<43> AN24 FBAD42 43 FBB_D<43> AB30 FBBD42
44 FBA_D<44> AK24 FBAD43 44 FBB_D<44> AA32 FBBD43
AL22 FBAD44 AD32 FBBD44
3 45 FBA_D<45>
FBAD45
45 FBB_D<45>
FBBD45 3
46 FBA_D<46> AK23 46 FBB_D<46> AD33
47 FBA_D<47> AM23 FBAD46 47 FBB_D<47> AA33 FBBD46
48 FBA_D<48> AT32 FBAD47 48 FBB_D<48> T36 FBBD47
49 FBA_D<49> AT33 FBAD48 49 FBB_D<49> R35 FBBD48
50 FBA_D<50> AR33 FBAD49 50 FBB_D<50> T34 FBBD49
51 FBA_D<51> AP31 FBAD50 51 FBB_D<51> U36 FBBD50
52 FBA_D<52> AR30 FBAD51 52 FBB_D<52> W35 FBBD51
53 FBA_D<53> AT30 FBAD52 53 FBB_D<53> U34 FBBD52
54 FBA_D<54> AP30 FBAD53 54 FBB_D<54> V34 FBBD53
55 FBA_D<55> AT29 FBAD54 55 FBB_D<55> W36 FBBD54
56 FBA_D<56> AP26 FBAD55 56 FBB_D<56> AC36 FBBD55
57 FBA_D<57> AP27 FBAD56 57 FBB_D<57> AA36 FBBD56
58 FBA_D<58> AT25 FBAD57 FBVDDQ 58 FBB_D<58> AC34 FBBD57 FBVDDQ
59 FBA_D<59> AP25 FBAD58 59 FBB_D<59> AB34 FBBD58
60 FBA_D<60> AR28 FBAD59 60 FBB_D<60> AA35 FBBD59
61 FBA_D<61> AP28 FBAD60 61 FBB_D<61> Y34 FBBD60
62 FBA_D<62> AT28 FBAD61 R620 62 FBB_D<62> Y36 FBBD61 R597
63 FBA_D<63> AP29 FBAD62 AJ24 SNN_FBA_RFU0 60.4 63 FBB_D<63> W34 FBBD62 R28 SNN_FBB_RFU0 60.4
FBAD63 RFU AH24 SNN_FBA_RFU1
1% FBBD63 RFU K29 SNN_FBB_RFU1
1%
RFU 0402 RFU 0402
NO STUFF NO STUFF
0 FBA_DQM<0> AK35 FBA_DEBUG AH25 FBA_DEBUG 0 FBB_DQM<0> J36 FBB_DEBUG C34 FBB_DEBUG
1 FBA_DQM<1> AM33 FBADQM0 1 FBB_DQM<1> M32 FBBDQM0
CALIBRATION PIN DDR3
2 FBA_DQM<2> AF33 FBADQM1 2 FBB_DQM<2> H33 FBBDQM1
3 FBA_DQM<3> AF34 FBADQM2 3 FBB_DQM<3> E34 FBBDQM2
FB_CALx_PD_VDDQ 60
4 FBA_DQM<4> AN34 FBADQM3 4 FBB_DQM<4> N34 FBBDQM3
5 FBA_DQM<5> AM24 FBADQM4 5 FBB_DQM<5> Y32 FBBDQM4
FB_CALx_PU_GND 40
6 FBA_DQM<6> AP32 FBADQM5 FBVDDQ 6 FBB_DQM<6> T35 FBBDQM5 FBVDDQ
7 FBA_DQM<7> AR27 FBADQM6 7 FBB_DQM<7> AA34 FBBDQM6
FB_CALx_TERM_GND 40
FBADQM7 J28 FB_CAL_PD_VDDQ0 R598 60.4 FBBDQM7 H27 FB_CAL_PD_VDDQ1 R624 60.4
FBCAL0_PD_VDDQ FBCAL1_PD_VDDQ
4 0402 1% COMMON VREF RATIO GPIO10 low 0.7 FBVDDQ 0402 1% COMMON 4
0 FBA_DQS_RN<0> AL35 FBCAL0_PU_GND H28 FB_CAL_PU_GND0 R617 40.2 VREF RATIO GPIO10 high 0.5 FBVDDQ 0 FBB_DQS_RN<0> L36 FBCAL1_PU_GND H26 FB_CAL_PU_GND1 R616 40.2
1 FBA_DQS_RN<1> AK32 FBADQS_RN0 0402 1% COMMON 1 FBB_DQS_RN<1> K33 FBBDQS_RN0 0402 1% COMMON
(0.5 ratio needed only when FBVDD can be 2.0V)
2 FBA_DQS_RN<2> AG33 FBADQS_RN1 H29 FB_CAL_TERM_GND0 R607 40.2 2 FBB_DQS_RN<2> G32 FBBDQS_RN1 J26 FB_CAL_TERM_GND1 R623 40.2
AE36 FBADQS_RN2 FBCAL0_TERM_GND E36 FBBDQS_RN2 FBCAL1_TERM_GND
3 FBA_DQS_RN<3> 0402 1% COMMON 3 FBB_DQS_RN<3> 0402 1% COMMON
4 FBA_DQS_RN<4> AM36 FBADQS_RN3 4 FBB_DQS_RN<4> M36 FBBDQS_RN3
5 FBA_DQS_RN<5> AN22 FBADQS_RN4 5 FBB_DQS_RN<5> AB32 FBBDQS_RN4
AR31 FBADQS_RN5 V35 FBBDQS_RN5
6 FBA_DQS_RN<6>
FBADQS_RN6 GND PEX_VDD 6 FBB_DQS_RN<6>
FBBDQS_RN6 GND
7 FBA_DQS_RN<7> AT27 7 FBB_DQS_RN<7> AB35
FBADQS_RN7 LB501 240R@100MHz FBBDQS_RN7
FBA_DLLAVDD AC29 FBAB_PLLAVDD BEAD_0402 COMMON
FBB_PLLVDD_NC AB28 SNN_FBB_PLLVDD
0 FBA_DQS_WP<0> AL36 0 FBB_DQS_WP<0> K36
1 FBA_DQS_WP<1> AL32 FBADQS_WP0 AD29 C631 C643 C620 C635 1 FBB_DQS_WP<1> L33 FBBDQS_WP0
AG32 FBADQS_WP1 FBA_PLLAVDD .1UF .1UF 1UF 4.7UF G33 FBBDQS_WP1
2 FBA_DQS_WP<2>
FBADQS_WP2 16V 16V 6.3V 6.3V
FBVDDQ 2 FBB_DQS_WP<2>
FBBDQS_WP2
3 FBA_DQS_WP<3> AE35 FBA_PLLGND AE29 3 FBB_DQS_WP<3> D36 FBB_PLLGND AC28
4 FBA_DQS_WP<4> AN36 FBADQS_WP3 10% 10% 10% 10%
4 FBB_DQS_WP<4> M35 FBBDQS_WP3
FBADQS_WP4 X7R X7R X5R X5R FBBDQS_WP4
5 FBA_DQS_WP<5> AN23 0402 0402 0402 0603 R619 5 FBB_DQS_WP<5> AB31
6 FBA_DQS_WP<6> AT31 FBADQS_WP5 COMMON COMMON COMMON COMMON 549 6 FBB_DQS_WP<6> V36 FBBDQS_WP5
7 FBA_DQS_WP<7> AT26 FBADQS_WP6 1%
7 FBB_DQS_WP<7> AB36 FBBDQS_WP6
FBADQS_WP7 0402 FBBDQS_WP7
GND GND GND GND GND COMMON GND
J29 FB_VREF1 FB_VREF J27 FB_VREF2
C626 R599 C642
.1UF 1.33K .1UF
16V 1% 16V
10% 0402 10%
X7R COMMON X7R
0402 0402
COMMON COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - GPU Partition A/B
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 3 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
FBCD_PLLAVDD
VOLTAGE
1.2V
MAX_CURRENT
0.25A
MIN_LINE_WIDTH
16MIL
FBC_DEBUG 1 40OHM
IN
FBD_DEBUG 1 40OHM
IN
1 1
G1 G1
G92-975-A1 G92-975-A1
BGA1148 BGA1148
COMMON COMMON
4/24 MEM_C 5/24 MEM_D
7.4A<> 7.1G<> FBC_D<63..0> FBC_CMD<28..0> 7.1A< 7.1G< 8.4A<> 8.1G<> FBD_D<63..0> FBD_CMD<28..0> 8.1A< 8.1G<
BI OUT BI OUT
7.4A<> 7.1G<> FBC_DQM<7..0> 0 FBC_D<0> C18 FBC_CMD0 F18 FBC_CMD<0> 0 8.4A<> 8.1G<> FBD_DQM<7..0> 0 FBD_D<0> H3 FBD_CMD0 M6 FBD_CMD<0> 0
OUT
FBC_DQS_RN<7..0> 1 FBC_D<1> C17 FBCD0 H20 FBC_CMD<1> 1
OUT
FBD_DQS_RN<7..0> 1 FBD_D<1> J3 FBDD0 G5 FBD_CMD<1> 1
7.5A<> 7.1G<> FBC_CMD1 8.5A<> 8.1G<> FBD_CMD1
IN
FBC_DQS_WP<7..0> 2 FBC_D<2> A17 FBCD1 E18 FBC_CMD<2> 2
IN
FBD_DQS_WP<7..0> 2 FBD_D<2> J1 FBDD1 L7 FBD_CMD<2> 2
7.5A<> 7.1G<> FBC_CMD2 8.5A<> 8.1G<> FBD_CMD2
OUT
3 FBC_D<3> B16 FBCD2 E20 FBC_CMD<3> 3
OUT
3 FBD_D<3> J2 FBDD2 K5 FBD_CMD<3> 3
C14 FBCD3 FBC_CMD3 D23 M3 FBDD3 FBD_CMD3 J10
4 FBC_D<4> FBC_CMD<4> 4 4 FBD_D<4> FBD_CMD<4> 4
A16 FBCD4 FBC_CMD4 G24 K3 FBDD4 FBD_CMD4 G8
5 FBC_D<5> FBC_CMD<5> 5 5 FBD_D<5> FBD_CMD<5> 5
C15 FBCD5 FBC_CMD5 D24 L3 FBDD5 FBD_CMD5 F8
6 FBC_D<6> FBC_CMD<6> 6 6 FBD_D<6> FBD_CMD<6> 6
A14 FBCD6 FBC_CMD6 G23 M1 FBDD6 FBD_CMD6 G6
7 FBC_D<7> FBC_CMD<7> 7 7 FBD_D<7> FBD_CMD<7> 7
A18 FBCD7 FBC_CMD7 D20 H1 FBDD7 FBD_CMD7 H6
8 FBC_D<8> FBC_CMD<8> 8 8 FBD_D<8> FBD_CMD<8> 8
A19 FBCD8 FBC_CMD8 E22 G3 FBDD8 FBD_CMD8 F6
9 FBC_D<9> FBC_CMD<9> 9 9 FBD_D<9> FBD_CMD<9> 9
B19 FBCD9 FBC_CMD9 J21 G1 FBDD9 FBD_CMD9 K8
10 FBC_D<10> FBC_CMD<10> 10 10 FBD_D<10> FBD_CMD<10> 10
B18 FBCD10 FBC_CMD10 E21 G2 FBDD10 FBD_CMD10 L5
11 FBC_D<11> FBC_CMD<11> 11 11 FBD_D<11> FBD_CMD<11> 11
B21 FBCD11 FBC_CMD11 G20 F3 FBDD11 FBD_CMD11 H4
12 FBC_D<12> FBC_CMD<12> 12 12 FBD_D<12> FBD_CMD<12> 12
C19 FBCD12 FBC_CMD12 F22 E1 FBDD12 FBD_CMD12 G4
13 FBC_D<13> FBC_CMD<13> 13 13 FBD_D<13> FBD_CMD<13> 13
B22 FBCD13 FBC_CMD13 H21 D1 FBDD13 FBD_CMD13 K9
14 FBC_D<14> FBC_CMD<14> 14 14 FBD_D<14> FBD_CMD<14> 14
C21 FBCD14 FBC_CMD14 E17 D2 FBDD14 FBD_CMD14 L4
15 FBC_D<15> FBC_CMD<15> 15 15 FBD_D<15> FBD_CMD<15> 15
E15 FBCD15 FBC_CMD15 E19 P4 FBDD15 FBD_CMD15 K4
16 FBC_D<16> FBC_CMD<16> 16 16 FBD_D<16> FBD_CMD<16> 16
D16 FBCD16 FBC_CMD16 D21 N7 FBDD16 FBD_CMD16 K7
17 FBC_D<17> FBC_CMD<17> 17 17 FBD_D<17> FBD_CMD<17> 17
D17 FBCD17 FBC_CMD17 E23 M7 FBDD17 FBD_CMD17 G7
2 18 FBC_D<18>
FBCD18 FBC_CMD18 FBC_CMD<18> 18 18 FBD_D<18>
FBDD18 FBD_CMD18 FBD_CMD<18> 18 2
19 FBC_D<19> G16 FBC_CMD19 F19 FBC_CMD<19> 19 19 FBD_D<19> N5 FBD_CMD19 J4 FBD_CMD<19> 19
20 FBC_D<20> E16 FBCD19 E24 FBC_CMD<20> 20 20 FBD_D<20> P5 FBDD19 F7 FBD_CMD<20> 20
E14 FBCD20 FBC_CMD20 G21 R7 FBDD20 FBD_CMD20 J5
21 FBC_D<21> FBC_CMD<21> 21 21 FBD_D<21> FBD_CMD<21> 21
G13 FBCD21 FBC_CMD21 G19 T7 FBDD21 FBD_CMD21 J6
22 FBC_D<22> FBC_CMD<22> 22 22 FBD_D<22> FBD_CMD<22> 22
D13 FBCD22 FBC_CMD22 G25 P7 FBDD22 FBD_CMD22 H7
23 FBC_D<23> FBC_CMD<23> 23 23 FBD_D<23> FBD_CMD<23> 23
A22 FBCD23 FBC_CMD23 G18 C1 FBDD23 FBD_CMD23 L8
24 FBC_D<24> FBC_CMD<24> 24 24 FBD_D<24> FBD_CMD<24> 24
C22 FBCD24 FBC_CMD24 G22 C5 FBDD24 FBD_CMD24 J7
25 FBC_D<25> FBC_CMD<25> 25 25 FBD_D<25> FBD_CMD<25> 25
C23 FBCD25 FBC_CMD25 G17 C2 FBDD25 FBD_CMD25 M5
26 FBC_D<26> SNN_FBC_CMD<26> 26 FBD_D<26> SNN_FBD_CMD<26>
A23 FBCD26 FBC_CMD26 F15 B4 FBDD26 FBD_CMD26 H9
27 FBC_D<27> SNN_FBC_CMD<27> 27 FBD_D<27> SNN_FBD_CMD<27>
28 FBC_D<28> A24 FBCD27 FBC_CMD27 G15 SNN_FBC_CMD<28> 28 FBD_D<28> A3 FBDD27 FBD_CMD27 G9 SNN_FBD_CMD<28>
29 FBC_D<29> C24 FBCD28 FBC_CMD28 29 FBD_D<29> B3 FBDD28 FBD_CMD28
30 FBC_D<30> C25 FBCD29 H17 FBC_CLK0 30 FBD_D<30> C4 FBDD29 L9 FBD_CLK0
FBC_CLK0 7.1G< 7.2A< FBD_CLK0 8.1G< 8.2A<
31 FBC_D<31> B24 FBCD30 J16 FBC_CLK0*
OUT
31 FBD_D<31> C3 FBDD30 M9 FBD_CLK0*
OUT
FBC_CLK0 7.1G< 7.2A< FBD_CLK0 8.1G< 8.2A<
32 FBC_D<32> C28 FBCD31 J24 FBC_CLK1
OUT
32 FBD_D<32> A8 FBDD31 J9 FBD_CLK1
OUT
FBC_CLK1 7.1G< 7.2D< FBD_CLK1 8.1G< 8.2D<
33 FBC_D<33> B27 FBCD32 H23 FBC_CLK1*
OUT
33 FBD_D<33> C6 FBDD32 J8 FBD_CLK1*
OUT
FBC_CLK1 7.1G< 7.2D< FBD_CLK1 8.1G< 8.2D<
34 FBC_D<34> C27 FBCD33 OUT
34 FBD_D<34> C7 FBDD33 OUT
35 FBC_D<35> B28 FBCD34 35 FBD_D<35> A7 FBDD34
36 FBC_D<36> C29 FBCD35 36 FBD_D<36> C8 FBDD35
37 FBC_D<37> A29 FBCD36 37 FBD_D<37> C9 FBDD36
38 FBC_D<38> B30 FBCD37 38 FBD_D<38> A9 FBDD37
39 FBC_D<39> A30 FBCD38 39 FBD_D<39> B9 FBDD38
40 FBC_D<40> E31 FBCD39 40 FBD_D<40> E12 FBDD39
41 FBC_D<41> E28 FBCD40 41 FBD_D<41> E9 FBDD40
42 FBC_D<42> D28 FBCD41 42 FBD_D<42> F9 FBDD41
43 FBC_D<43> F29 FBCD42 43 FBD_D<43> G10 FBDD42
44 FBC_D<44> F30 FBCD43 44 FBD_D<44> D10 FBDD43
45 FBC_D<45> D33 FBCD44 45 FBD_D<45> G12 FBDD44
46 FBC_D<46> D32 FBCD45 46 FBD_D<46> F12 FBDD45
47 FBC_D<47> D31 FBCD46 47 FBD_D<47> D11 FBDD46
G27 FBCD47 F4 FBDD47
3 48 FBC_D<48>
FBCD48
48 FBD_D<48>
FBDD48 3
49 FBC_D<49> F25 49 FBD_D<49> E4
50 FBC_D<50> G26 FBCD49 50 FBD_D<50> D4 FBDD49
51 FBC_D<51> D26 FBCD50 51 FBD_D<51> D5 FBDD50
52 FBC_D<52> G29 FBCD51 52 FBD_D<52> D8 FBDD51
53 FBC_D<53> G28 FBCD52 53 FBD_D<53> E7 FBDD52
54 FBC_D<54> E27 FBCD53 54 FBD_D<54> D7 FBDD53
55 FBC_D<55> F28 FBCD54 55 FBD_D<55> D9 FBDD54
56 FBC_D<56> A34 FBCD55 56 FBD_D<56> B13 FBDD55
57 FBC_D<57> C32 FBCD56 57 FBD_D<57> C11 FBDD56
58 FBC_D<58> B34 FBCD57 58 FBD_D<58> A13 FBDD57
59 FBC_D<59> C33 FBCD58 FBVDDQ 59 FBD_D<59> C13 FBDD58 FBVDDQ
60 FBC_D<60> C31 FBCD59 60 FBD_D<60> A11 FBDD59
61 FBC_D<61> B31 FBCD60 61 FBD_D<61> A10 FBDD60
62 FBC_D<62> A31 FBCD61 R643 62 FBD_D<62> B10 FBDD61 R658
63 FBC_D<63> C30 FBCD62 H24 SNN_FBC_RFU0 60.4 63 FBD_D<63> C10 FBDD62 H10 SNN_FBD_RFU0 60.4
FBCD63 RFU J25 SNN_FBC_RFU1
1% FBDD63 RFU L11 SNN_FBD_RFU1
1%
RFU 0402 RFU 0402
NO STUFF NO STUFF
0 FBC_DQM<0> C16 FBC_DEBUG H16 FBC_DEBUG 0 FBD_DQM<0> K2 FBD_DEBUG N8 FBD_DEBUG
1 FBC_DQM<1> C20 FBCDQM0 1 FBD_DQM<1> E3 FBDDQM0
2 FBC_DQM<2> G14 FBCDQM1 2 FBD_DQM<2> N4 FBDDQM1
3 FBC_DQM<3> C26 FBCDQM2 3 FBD_DQM<3> D3 FBDDQM2
4 FBC_DQM<4> A28 FBCDQM3 4 FBD_DQM<4> B7 FBDDQM3
5 FBC_DQM<5> D29 FBCDQM4 5 FBD_DQM<5> G11 FBDDQM4
6 FBC_DQM<6> D27 FBCDQM5 6 FBD_DQM<6> F5 FBDDQM5
7 FBC_DQM<7> B33 FBCDQM6 7 FBD_DQM<7> C12 FBDDQM6
FBCDQM7 FBDDQM7
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - GPU Partition C/D
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 4 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
MIRRORED
CMD2 CMD22 0A<2> H2 F12 CMD2 CMD22 0A<2> H11 F12
NONMIRRORED
FBVDDQ 25 FBA_CMD<25>
A1 VDD FBVDDQ 25 FBA_CMD<25>
A1 VDD
CMD0 CMD24 0A<3> 22 FBA_CMD<22> K3 M12 CMD0 CMD24 0A<3> 4 FBA_CMD<4> K10 M12 FBA_CMD_VREF0 12MIL
CMD24 CMD0 0A<4> M4 A2 VDD CMD24 CMD0 0A<4> M9 A2 VDD IN
12MIL
24 FBA_CMD<24> 6 FBA_CMD<6> FBA_DAT_VREF0
R505 CMD22 CMD2 0A<5> K9 A3 A1 R508 CMD22 CMD2 0A<5> K4 A3 A1
IN
12MIL
0 FBA_CMD<0> 5 FBA_CMD<5> FBA_CMD_VREF1
0 CMD13 CMD4 1A<2> H11 A4 VDDQ C1 0 CMD13 CMD4 1A<2> H2 A4 VDDQ C1
IN
12MIL
2 FBA_CMD<2> 13 FBA_CMD<13> FBA_DAT_VREF1
5% CMD4 CMD6 1A<3> K10 A5 VDDQ E1 5% CMD4 CMD6 1A<3> K3 A5 VDDQ E1
IN
12MIL
21 FBA_CMD<21> 21 FBA_CMD<21> FBA_VREF_CTL0
0402 CMD5 CMD5 1A<4> L9 A6 VDDQ N1
0402 CMD5 CMD5 1A<4> L4 A6 VDDQ N1
IN
12MIL
NO STUFF 16 FBA_CMD<16> NO STUFF 16 FBA_CMD<16> FBA_VREF_CTL1
FBA_CLK0_MPCAP CMD6 CMD13 1A<5> K11 A7 VDDQ R1 CMD6 CMD13 1A<5> K2 A7 VDDQ R1
IN
12MIL
23 FBA_CMD<23> FBA_CLK1_MPCAP 23 FBA_CMD<23> 6.3H<> 5.3E<> FBAB_VREF_CTL
CMD21 CMD21 A<6> M9 A8/AP VDDQ V1 CMD21 CMD21 A<6> M4 A8/AP VDDQ V1
IN
12MIL
20 FBA_CMD<20> 20 FBA_CMD<20> FBA_ZQ0
C531 CMD23 CMD16 A<7> K2 A9 VDDQ C4 C523 CMD23 CMD16 A<7> K11 A9 VDDQ C4
IN
12MIL
17 FBA_CMD<17> 17 FBA_CMD<17> FBA_ZQ1
.01UF R516 R517 CMD19 CMD23 A<8> L4 A10 VDDQ E4 .01UF R521 R511 CMD19 CMD23 A<8> L9 A10 VDDQ E4
IN
9 FBA_CMD<9> 9 FBA_CMD<9>
16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4 16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4
10% 1% 1% CMD17 CMD17 A<10> VDDQ N4 10% 1% 1% CMD17 CMD17 A<10> VDDQ N4
X7R 0402 0402 VDDQ X7R 0402 0402 VDDQ
CMD16 CMD9 A<11> 12 FBA_CMD<12> G4 R4 CMD16 CMD9 A<11> 12 FBA_CMD<12> G9 R4
0402 COMMON COMMON 0402 COMMON COMMON
COMMON CMD10 CMD12 BA0 G9 BA0 VDDQ C9 COMMON CMD10 CMD12 BA0 G4 BA0 VDDQ C9
3 FBA_CMD<3> 3 FBA_CMD<3>
CMD18 CMD3 BA1 H10 BA1 VDDQ E9 CMD18 CMD3 BA1 H3 BA1 VDDQ E9
7 FBA_CMD<7> 7 FBA_CMD<7>
CMD11 CMD18 CKE BA2 VDDQ J9 CMD11 CMD18 CKE BA2 VDDQ J9
GND CMD12 CMD15 RST VDDQ GND CMD12 CMD15 RST VDDQ
18 FBA_CMD<18> H4 CKE VDDQ N9 18 FBA_CMD<18> H9 CKE VDDQ N9
5.1G< 3.3D> IN
FBA_CLK0 J11 CLK VDDQ R9 5.1G< 3.3D> IN
FBA_CLK1 J11 CLK VDDQ R9
5.1G< 3.3D> IN
FBA_CLK0* J10 CLK VDDQ A12 5.1G< 3.3D> IN
FBA_CLK1* J10 CLK VDDQ A12
VDDQ C12 VDDQ C12
MUST BE PLACED as close as possible to SNN_FBA0_NC J2 NC/RFU VDDQ E12 SNN_FBA1_NC J2 NC/RFU VDDQ E12
2 the BGA memory on the line AFTER the 14 FBA_CMD<14> J3 A12 (32Mx32) VDDQ N12 MUST BE PLACED as close as possible to 14 FBA_CMD<14> J3 A12 (32Mx32) VDDQ N12 2
MEMORY pin!! V4 SEN (GND) VDDQ R12 the BGA memory on the line AFTER the V4 SEN (GND) VDDQ R12
Minimize the stub length!! VDDQ V12 MEMORY pin!! VDDQ V12
Minimize the stub length!!
FBVDDQ
GND VSSQ B1 GND VSSQ B1
15 FBA_CMD<15> V9 RESET VSSQ D1 15 FBA_CMD<15> V9 RESET VSSQ D1
VSSQ P1 VSSQ P1
A9 MF (GND) VSSQ T1 A9 MF (VDDQ) VSSQ T1
VSSQ G2 GND VSSQ G2 GND
FBA_ZQ0 A4 ZQ VSSQ L2 FBA_ZQ1 A4 ZQ VSSQ L2
VSSQ B4 VSSQ B4
VSSQ D4 FBVDDQ VSSQ D4 FBVDDQ
R518 R502 R542 P4 R543 P4
10K 10K 243 VSSQ T4 243 VSSQ T4
5% 5% 1% VSSQ B9 R567 1% VSSQ B9 R544
0402 0402 0402 VSSQ D9 549 0402 VSSQ D9 549
FBVDDQ COMMON COMMON COMMON VSSQ 1%
R1 COMMON VSSQ 1%
R1
VSSQ P9 0402 VSSQ P9 0402
VSSQ T9 COMMON VSSQ T9 COMMON
R531 121 FBA_CMD<22>
VSSQ G11 R573 931 VSSQ G11 R549 931 FBA_VREF_CTL0 3 1G1D1S
0402 1% NO STUFF GND GND GND GND L11 0402 1% COMMON GND L11 0402 1% COMMON Q503 D
VSSQ B12 VSSQ B12 2N7002
R525 121 FBA_CMD<24>
VSSQ VSSQ SOT23_1G1D1S
0402 1% NO STUFF D12 R562 C584 D12 R556 C579 COMMON G1 GPIO10_FB_VREF_SW 6.3H< 7.3H< 8.3H<
VSSQ P12 1.33K .01UF VSSQ P12 1.33K .01UF 2
IN 13.4C>
R534 121 FBA_CMD<0>
VSSQ 1%
R2
16V VSSQ 1%
R2
16V
S
0402 1% NO STUFF
VSSQ T12 0402 10% VSSQ T12 0402 10% MAX_VOLTAGE=60V
R537 121 FBA_CMD<2> COMMON X7R COMMON X7R
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
0402 1% NO STUFF FBVDDQ 0402 FBVDDQ 0402
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
COMMON COMMON V_BE_GS=20V
GND
GND GND
4 M7 M7 M7 M7 4
HY5RS123235BFP-14 HY5RS123235BFP-14 HY5RS123235BFP-14 HY5RS123235BFP-14
PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2
VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 VERSION=BGA136
COMMON COMMON COMMON COMMON
0 FBA_D<0> T3 DQ0 8 FBA_D<8> G3 DQ0 16 FBA_D<16> B10 DQ0 24 FBA_D<24> R10 DQ0
1 FBA_D<1> T2 DQ1 9 FBA_D<9> B3 DQ1 17 FBA_D<17> F10 DQ1 25 FBA_D<25> T10 DQ1
2 FBA_D<2> R3 DQ2 10 FBA_D<10> C3 DQ2 18 FBA_D<18> C10 DQ2 26 FBA_D<26> L10 DQ2
3 FBA_D<3> R2 DQ3 11 FBA_D<11> F3 DQ3 19 FBA_D<19> B11 DQ3 27 FBA_D<27> M10 DQ3
5.1G<> 3.2A> BI
FBA_DQM<7..0> 4 FBA_D<4> L3 DQ4 12 FBA_D<12> C2 DQ4 20 FBA_D<20> G10 DQ4 28 FBA_D<28> R11 DQ4
0 FBA_DQM<0> 5 FBA_D<5> M3 DQ5 13 FBA_D<13> E2 DQ5 21 FBA_D<21> E11 DQ5 29 FBA_D<29> N11 DQ5
1 FBA_DQM<1> 6 FBA_D<6> M2 DQ6 14 FBA_D<14> B2 DQ6 22 FBA_D<22> F11 DQ6 30 FBA_D<30> T11 DQ6
2 FBA_DQM<2> 7 FBA_D<7> N2 DQ7 15 FBA_D<15> F2 DQ7 23 FBA_D<23> C11 DQ7 31 FBA_D<31> M11 DQ7
3 FBA_DQM<3>
4 FBA_DQM<4> FBA_DQM<0> N3 DQM FBA_DQM<1> E3 DQM FBA_DQM<2> E10 DQM FBA_DQM<3> N10 DQM
5 FBA_DQM<5> FBA_DQS_RN<0> P3 RDQS FBA_DQS_RN<1> D3 RDQS FBA_DQS_RN<2> D10 RDQS FBA_DQS_RN<3> P10 RDQS
6 FBA_DQM<6> FBA_DQS_WP<0> P2 WDQS FBA_DQS_WP<1> D2 WDQS FBA_DQS_WP<2> D11 WDQS FBA_DQS_WP<3> P11 WDQS
7 FBA_DQM<7>
MIRRORED
CMD2 CMD22 0A<2> H2 F12 CMD2 CMD22 0A<2> H11 F12
NONMIRRORED
FBVDDQ 25 FBB_CMD<25>
A1 VDD FBVDDQ 25 FBB_CMD<25>
A1 VDD IN
FBB_DAT_VREF0 12MIL
CMD0 CMD24 0A<3> 22 FBB_CMD<22> K3 M12 CMD0 CMD24 0A<3> 4 FBB_CMD<4> K10 M12 FBB_CMD_VREF1 12MIL
CMD24 CMD0 0A<4> M4 A2 VDD CMD24 CMD0 0A<4> M9 A2 VDD IN
12MIL
24 FBB_CMD<24> 6 FBB_CMD<6> FBB_DAT_VREF1
R504 CMD22 CMD2 0A<5> K9 A3 A1 R507 CMD22 CMD2 0A<5> K4 A3 A1
IN
12MIL
0 FBB_CMD<0> 5 FBB_CMD<5> FBB_VREF_CTL0
0 CMD13 CMD4 1A<2> H11 A4 VDDQ C1 0 CMD13 CMD4 1A<2> H2 A4 VDDQ C1
IN
12MIL
2 FBB_CMD<2> 13 FBB_CMD<13> FBB_VREF_CTL1
5% CMD4 CMD6 1A<3> K10 A5 VDDQ E1 5% CMD4 CMD6 1A<3> K3 A5 VDDQ E1
IN
12MIL
21 FBB_CMD<21> 21 FBB_CMD<21> FBB_ZQ0
0402 CMD5 CMD5 1A<4> L9 A6 VDDQ N1
0402 CMD5 CMD5 1A<4> L4 A6 VDDQ N1
IN
12MIL
NO STUFF 16 FBB_CMD<16> NO STUFF 16 FBB_CMD<16> FBB_ZQ1
FBB_CLK0_MPCAP CMD6 CMD13 1A<5> K11 A7 VDDQ R1 CMD6 CMD13 1A<5> K2 A7 VDDQ R1
IN
23 FBB_CMD<23> FBB_CLK1_MPCAP 23 FBB_CMD<23>
CMD21 CMD21 A<6> M9 A8/AP VDDQ V1 CMD21 CMD21 A<6> M4 A8/AP VDDQ V1
20 FBB_CMD<20> 20 FBB_CMD<20>
C533 CMD23 CMD16 A<7> K2 A9 VDDQ C4 C524 CMD23 CMD16 A<7> K11 A9 VDDQ C4
17 FBB_CMD<17> 17 FBB_CMD<17>
.01UF R513 R514 CMD19 CMD23 A<8> L4 A10 VDDQ E4 .01UF R520 R515 CMD19 CMD23 A<8> L9 A10 VDDQ E4
9 FBB_CMD<9> 9 FBB_CMD<9>
16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4 16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4
10% 1% 1% CMD17 CMD17 A<10> VDDQ N4 10% 1% 1% CMD17 CMD17 A<10> VDDQ N4
X7R 0402 0402 VDDQ X7R 0402 0402 VDDQ
CMD16 CMD9 A<11> 12 FBB_CMD<12> G4 R4 CMD16 CMD9 A<11> 12 FBB_CMD<12> G9 R4
0402 COMMON COMMON 0402 COMMON COMMON
COMMON CMD10 CMD12 BA0 G9 BA0 VDDQ C9 COMMON CMD10 CMD12 BA0 G4 BA0 VDDQ C9
3 FBB_CMD<3> 3 FBB_CMD<3>
CMD18 CMD3 BA1 H10 BA1 VDDQ E9 CMD18 CMD3 BA1 H3 BA1 VDDQ E9
7 FBB_CMD<7> 7 FBB_CMD<7>
CMD11 CMD18 CKE BA2 VDDQ J9 CMD11 CMD18 CKE BA2 VDDQ J9
GND CMD12 CMD15 RST VDDQ GND CMD12 CMD15 RST VDDQ
18 FBB_CMD<18> H4 CKE VDDQ N9 18 FBB_CMD<18> H9 CKE VDDQ N9
6.1G< 3.3H> IN
FBB_CLK0 J11 CLK VDDQ R9 6.1G< 3.3H> IN
FBB_CLK1 J11 CLK VDDQ R9
6.1G< 3.3H> IN
FBB_CLK0* J10 CLK VDDQ A12 6.1G< 3.3H> IN
FBB_CLK1* J10 CLK VDDQ A12
VDDQ C12 VDDQ C12
2 MUST BE PLACED as close as possible to SNN_FBB0_NC J2 NC/RFU VDDQ E12 SNN_FBB1_NC J2 NC/RFU VDDQ E12 2
the BGA memory on the line AFTER the 14 FBB_CMD<14> J3 A12 (32Mx32) VDDQ N12 MUST BE PLACED as close as possible to 14 FBB_CMD<14> J3 A12 (32Mx32) VDDQ N12
MEMORY pin!! V4 SEN (GND) VDDQ R12 the BGA memory on the line AFTER the V4 SEN (GND) VDDQ R12
Minimize the stub length!! VDDQ V12 MEMORY pin!! VDDQ V12
Minimize the stub length!!
FBVDDQ
GND VSSQ B1 GND VSSQ B1
15 FBB_CMD<15> V9 RESET VSSQ D1 15 FBB_CMD<15> V9 RESET VSSQ D1
VSSQ P1 VSSQ P1
A9 MF (GND) VSSQ T1 A9 MF (VDDQ) VSSQ T1
VSSQ G2 GND FBVDDQ VSSQ G2 GND FBVDDQ
FBB_ZQ0 A4 ZQ VSSQ L2 FBB_ZQ1 A4 ZQ VSSQ L2
VSSQ B4 VSSQ B4
D4 R563 D4 R565
R519 R501 R545 VSSQ P4 549 R540 VSSQ P4 549
VSSQ R1 VSSQ R1
10K 10K 243 1% 243 1%
VSSQ T4 0402 VSSQ T4 0402 BI 5.2G< 5.3E<>
5% 5% 1% 1%
0402 0402 0402 VSSQ B9 COMMON 0402 VSSQ B9 COMMON
FBVDDQ COMMON COMMON COMMON VSSQ D9 R569 931 COMMON VSSQ D9 R571 931 FBAB_VREF_CTL 3 1G1D1S
P9 0402 1% COMMON P9 0402 1% COMMON Q508 D
VSSQ T9 VSSQ T9 2N7002
VSSQ G11 R550 C587 VSSQ G11 R553 C589 SOT23_1G1D1S
R530 121 FBB_CMD<22>
VSSQ VSSQ COMMON G1 GPIO10_FB_VREF_SW
IN 5.3H< 7.3H<
0402 1% NO STUFF GND GND GND GND L11 1.33K R2
.01UF GND L11 1.33K R2
.01UF 2 S 8.3H< 13.4C>
VSSQ B12 1% 16V VSSQ B12 1% 16V
R522 121 FBB_CMD<24>
VSSQ 0402 10% VSSQ 0402 10% MAX_VOLTAGE=60V
0402 1% NO STUFF
VSSQ D12 COMMON X7R VSSQ D12 COMMON X7R
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
R533 121 FBB_CMD<0>
VSSQ P12 0402
VSSQ P12 0402
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
0402 1% NO STUFF
VSSQ T12 COMMON
VSSQ T12 COMMON V_BE_GS=20V
GND
GND GND
FBB_VREF_CTL1 3 1G1D1S
Q506 D
2N7002
SOT23_1G1D1S
6.1G<> 3.1E<> BI
FBB_D<63..0> COMMON G1
2 S
M5 M5 M5 M5 MAX_VOLTAGE=60V
HY5RS123235BFP-14 HY5RS123235BFP-14 HY5RS123235BFP-14 HY5RS123235BFP-14 CONTINUOUS_CURRENT=0.115A
4 PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 R_DS_ON=7.5R
MAX_CURRENT=0.8A
4
VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 MAX_WATTAGE=0.2W
V_BE_GS=20V
COMMON COMMON COMMON COMMON
0 FBB_D<0> T2 DQ0 8 FBB_D<8> F2 DQ0 16 FBB_D<16> C11 DQ0 24 FBB_D<24> T11 DQ0
1 FBB_D<1> T3 DQ1 9 FBB_D<9> E2 DQ1 17 FBB_D<17> G10 DQ1 25 FBB_D<25> T10 DQ1 GND
2 FBB_D<2> R2 DQ2 10 FBB_D<10> F3 DQ2 18 FBB_D<18> C10 DQ2 26 FBB_D<26> R10 DQ2
3 FBB_D<3> R3 DQ3 11 FBB_D<11> G3 DQ3 19 FBB_D<19> B11 DQ3 27 FBB_D<27> M10 DQ3
6.1G<> 3.2E> BI
FBB_DQM<7..0> 4 FBB_D<4> M3 DQ4 12 FBB_D<12> B3 DQ4 20 FBB_D<20> B10 DQ4 28 FBB_D<28> N11 DQ4
0 FBB_DQM<0> 5 FBB_D<5> L3 DQ5 13 FBB_D<13> C2 DQ5 21 FBB_D<21> F11 DQ5 29 FBB_D<29> M11 DQ5
1 FBB_DQM<1> 6 FBB_D<6> M2 DQ6 14 FBB_D<14> B2 DQ6 22 FBB_D<22> F10 DQ6 30 FBB_D<30> R11 DQ6
2 FBB_DQM<2> 7 FBB_D<7> N2 DQ7 15 FBB_D<15> C3 DQ7 23 FBB_D<23> E11 DQ7 31 FBB_D<31> L10 DQ7
3 FBB_DQM<3>
4 FBB_DQM<4> FBB_DQM<0> N3 DQM FBB_DQM<1> E3 DQM FBB_DQM<2> E10 DQM FBB_DQM<3> N10 DQM
5 FBB_DQM<5> FBB_DQS_RN<0> P3 RDQS FBB_DQS_RN<1> D3 RDQS FBB_DQS_RN<2> D10 RDQS FBB_DQS_RN<3> P10 RDQS
6 FBB_DQM<6> FBB_DQS_WP<0> P2 WDQS FBB_DQS_WP<1> D2 WDQS FBB_DQS_WP<2> D11 WDQS FBB_DQS_WP<3> P11 WDQS
7 FBB_DQM<7>
Page7: FrameBuffer - Partition C 16/32Mx32 BGA136 GDDR3 NET DIFFPAIR NV_CRITICAL NV_IMPEDANCE
CMD-Addr Mapping
M3 CMD-Addr Mapping
M4 7.4A<> 4.1A<> FBC_D<63..0> 1 40OHM
HY5RS123235BFP-14 HY5RS123235BFP-14 BI
144 136 ADDR 144 136 ADDR 7.4A<> 4.1A> FBC_DQM<7..0> 1 40OHM
PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 BI
VERSION=BGA136 FBVDDQ VERSION=BGA136 FBVDDQ
CMD15 CMD1 RAS* CMD15 CMD1 RAS* 1
1 CMD25 CMD10 CAS*
COMMON
CMD25 CMD10 CAS*
COMMON 7.5A<> 4.1A< BI
FBC_DQS_RN<7..0> 40OHM 1
1 FBC_CMD<1> H3 RAS VDD F1 1 FBC_CMD<1> H10 RAS VDD F1 7.5A<> 4.1A> BI
FBC_DQS_WP<7..0> 1 40OHM
CMD9 CMD11 WE* 10 FBC_CMD<10> F4 M1 CMD9 CMD11 WE* 10 FBC_CMD<10> F9 M1
CMD8 CMD8 CS0* H9 CAS VDD A2 CMD8 CMD8 CS0* H4 CAS VDD A2
11 FBC_CMD<11> 11 FBC_CMD<11>
CMD7 CMD7 BA2 F9 WE VDD V2 CMD7 CMD7 BA2 F4 WE VDD V2
8 FBC_CMD<8> 8 FBC_CMD<8>
CMD1 CMD19 A<0> CS0 VDD A11 CMD1 CMD19 A<0> CS0 VDD A11
CMD3 CMD25 A<1> VDD CMD3 CMD25 A<1> VDD NET MIN_LINE_WIDTH
19 FBC_CMD<19> K4 A0 VDD V11 19 FBC_CMD<19> K9 A0 VDD V11
MIRRORED
CMD2 CMD22 0A<2> H2 F12 CMD2 CMD22 0A<2> H11 F12
NONMIRRORED
FBVDDQ 25 FBC_CMD<25>
A1 VDD FBVDDQ 25 FBC_CMD<25>
A1 VDD IN
FBC_CMD_VREF0 12MIL
CMD0 CMD24 0A<3> 22 FBC_CMD<22> K3 M12 CMD0 CMD24 0A<3> 4 FBC_CMD<4> K10 M12 FBC_DAT_VREF0 12MIL
CMD24 CMD0 0A<4> M4 A2 VDD CMD24 CMD0 0A<4> M9 A2 VDD IN
12MIL
24 FBC_CMD<24> 6 FBC_CMD<6> FBC_CMD_VREF1
R631 CMD22 CMD2 0A<5> K9 A3 A1 R589 CMD22 CMD2 0A<5> K4 A3 A1
IN
12MIL
0 FBC_CMD<0> 5 FBC_CMD<5> FBC_DAT_VREF1
0 CMD13 CMD4 1A<2> H11 A4 VDDQ C1 0 CMD13 CMD4 1A<2> H2 A4 VDDQ C1
IN
12MIL
2 FBC_CMD<2> 13 FBC_CMD<13> FBC_VREF_CTL0
5% CMD4 CMD6 1A<3> K10 A5 VDDQ E1 5% CMD4 CMD6 1A<3> K3 A5 VDDQ E1
IN
12MIL
21 FBC_CMD<21> 21 FBC_CMD<21> FBC_VREF_CTL1
0402 CMD5 CMD5 1A<4> L9 A6 VDDQ N1
0402 CMD5 CMD5 1A<4> L4 A6 VDDQ N1
IN
12MIL
NO STUFF 16 FBC_CMD<16> NO STUFF 16 FBC_CMD<16> 8.2H<> 7.3E<> FBCD_VREF_CTL
FBC_CLK0_MPCAP CMD6 CMD13 1A<5> K11 A7 VDDQ R1 CMD6 CMD13 1A<5> K2 A7 VDDQ R1
IN
12MIL
23 FBC_CMD<23> FBC_CLK1_MPCAP 23 FBC_CMD<23> FBC_ZQ0
CMD21 CMD21 A<6> M9 A8/AP VDDQ V1 CMD21 CMD21 A<6> M4 A8/AP VDDQ V1
IN
12MIL
20 FBC_CMD<20> 20 FBC_CMD<20> FBC_ZQ1
C724 CMD23 CMD16 A<7> K2 A9 VDDQ C4 C607 CMD23 CMD16 A<7> K11 A9 VDDQ C4
IN
17 FBC_CMD<17> 17 FBC_CMD<17>
.01UF R725 R632 CMD19 CMD23 A<8> L4 A10 VDDQ E4 .01UF R594 R588 CMD19 CMD23 A<8> L9 A10 VDDQ E4
9 FBC_CMD<9> 9 FBC_CMD<9>
16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4 16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4
10% 1% 1% CMD17 CMD17 A<10> VDDQ N4 10% 1% 1% CMD17 CMD17 A<10> VDDQ N4
X7R 0402 0402 VDDQ X7R 0402 0402 VDDQ
CMD16 CMD9 A<11> 12 FBC_CMD<12> G4 R4 CMD16 CMD9 A<11> 12 FBC_CMD<12> G9 R4
0402 COMMON COMMON 0402 COMMON COMMON
COMMON CMD10 CMD12 BA0 G9 BA0 VDDQ C9 COMMON CMD10 CMD12 BA0 G4 BA0 VDDQ C9
3 FBC_CMD<3> 3 FBC_CMD<3>
CMD18 CMD3 BA1 H10 BA1 VDDQ E9 CMD18 CMD3 BA1 H3 BA1 VDDQ E9
7 FBC_CMD<7> 7 FBC_CMD<7>
CMD11 CMD18 CKE BA2 VDDQ J9 CMD11 CMD18 CKE BA2 VDDQ J9
GND CMD12 CMD15 RST VDDQ GND CMD12 CMD15 RST VDDQ
18 FBC_CMD<18> H4 CKE VDDQ N9 18 FBC_CMD<18> H9 CKE VDDQ N9
7.1G< 4.2D> IN
FBC_CLK0 J11 CLK VDDQ R9 7.1G< 4.2D> IN
FBC_CLK1 J11 CLK VDDQ R9
7.1G< 4.2D> IN
FBC_CLK0* J10 CLK VDDQ A12 7.1G< 4.3D> IN
FBC_CLK1* J10 CLK VDDQ A12
VDDQ C12 VDDQ C12
MUST BE PLACED as close as possible to SNN_FBC0_NC J2 NC/RFU VDDQ E12 SNN_FBC1_NC J2 NC/RFU VDDQ E12
2 the BGA memory on the line AFTER the 14 FBC_CMD<14> J3 A12 (32Mx32) VDDQ N12 MUST BE PLACED as close as possible to 14 FBC_CMD<14> J3 A12 (32Mx32) VDDQ N12 2
MEMORY pin!! V4 SEN (GND) VDDQ R12 the BGA memory on the line AFTER the V4 SEN (GND) VDDQ R12
Minimize the stub length!! VDDQ V12 MEMORY pin!! VDDQ V12
Minimize the stub length!!
GND VSSQ B1 FBVDDQ GND VSSQ B1
15 FBC_CMD<15> V9 RESET VSSQ D1 15 FBC_CMD<15> V9 RESET VSSQ D1
VSSQ P1 VSSQ P1
A9 MF (GND) VSSQ T1 A9 MF (VDDQ) VSSQ T1
VSSQ G2 GND VSSQ G2 GND
FBC_ZQ0 A4 ZQ VSSQ L2 FBC_ZQ1 A4 ZQ VSSQ L2
VSSQ B4 FBVDDQ VSSQ B4 FBVDDQ
VSSQ D4 VSSQ D4
R613 R612 R621 P4 R581 P4
10K 10K 243 VSSQ T4 R609 243 VSSQ T4 R559
5% 5% 1% VSSQ B9 549 1% VSSQ B9 549
0402 0402 0402 VSSQ R1 0402 VSSQ R1
1% 1%
COMMON COMMON COMMON VSSQ D9 0402 COMMON VSSQ D9 0402
VSSQ P9 COMMON VSSQ P9 COMMON
FBVDDQ VSSQ T9 R610 931 VSSQ T9 R560 931 FBC_VREF_CTL0 3 1G1D1S
G11 0402 1% COMMON G11 0402 1% COMMON Q504 D
VSSQ L11 VSSQ L11
GND GND GND GND VSSQ GND VSSQ
2N7002
SOT23_1G1D1S
R618 121 FBC_CMD<22> B12 R608 C627 B12 R558 C588 COMMON G1 GPIO10_FB_VREF_SW 5.3H< 6.3H< 8.3H<
0402 1% NO STUFF
VSSQ D12 1.33K .01UF VSSQ D12 1.33K .01UF 2
IN 13.4C>
VSSQ 1%
R2
16V VSSQ 1%
R2
16V
S
R625 121 FBC_CMD<24>
VSSQ P12 0402 10% VSSQ P12 0402 10% MAX_VOLTAGE=60V
0402 1% NO STUFF
VSSQ T12 COMMON X7R VSSQ T12 COMMON X7R
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
R628 121 FBC_CMD<0> 0402 0402
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
0402 1% NO STUFF FBVDDQ COMMON FBVDDQ COMMON V_BE_GS=20V
GND
GND GND
Page8: FrameBuffer - Partition D 16/32Mx32 BGA136 GDDR3 NET DIFFPAIR NV_CRITICAL NV_IMPEDANCE
8.2A< 4.2H> FBD_CLK0 FBD_CLK0 1 80DIFF
IN
8.2A< 4.2H> FBD_CLK0* FBD_CLK0 1 80DIFF
IN
8.2D< 4.2H> FBD_CLK1 FBD_CLK1 1 80DIFF
IN
8.2D< 4.3H> FBD_CLK1* FBD_CLK1 1 80DIFF
IN
8.1G< 4.1H> FBD_CMD<28..0> 8.1A< 4.1H> FBD_CMD<25..0> 1 40OHM
IN IN
CMD-Addr Mapping
M1 CMD-Addr Mapping
M2
HY5RS123235BFP-14 HY5RS123235BFP-14 1
144 136 ADDR 144 136 ADDR 8.4A<> 4.1E<> FBD_D<63..0> 40OHM
PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 BI
VERSION=BGA136 FBVDDQ VERSION=BGA136 FBVDDQ 8.4A<> 4.1E> BI
FBD_DQM<7..0> 1 40OHM
CMD15 CMD1 RAS* COMMON CMD15 CMD1 RAS* COMMON
CMD25 CMD10 CAS* H3 F1 CMD25 CMD10 CAS* H10 F1 1
1 CMD9 CMD11 WE*
1 FBD_CMD<1>
RAS VDD CMD9 CMD11 WE*
1 FBD_CMD<1>
RAS VDD 8.5A<> 4.1E< BI
FBD_DQS_RN<7..0> 40OHM 1
10 FBD_CMD<10> F4 CAS VDD M1 10 FBD_CMD<10> F9 CAS VDD M1 8.5A<> 4.1E> BI
FBD_DQS_WP<7..0> 1 40OHM
CMD8 CMD8 CS0* 11 FBD_CMD<11> H9 A2 CMD8 CMD8 CS0* 11 FBD_CMD<11> H4 A2
CMD7 CMD7 BA2 F9 WE VDD V2 CMD7 CMD7 BA2 F4 WE VDD V2
8 FBD_CMD<8> 8 FBD_CMD<8>
CMD1 CMD19 A<0> CS0 VDD A11 CMD1 CMD19 A<0> CS0 VDD A11
CMD3 CMD25 A<1> VDD CMD3 CMD25 A<1> VDD NET MIN_LINE_WIDTH
19 FBD_CMD<19> K4 A0 VDD V11 19 FBD_CMD<19> K9 A0 VDD V11
MIRRORED
CMD2 CMD22 0A<2> H2 F12 CMD2 CMD22 0A<2> H11 F12
NONMIRRORED
FBVDDQ 25 FBD_CMD<25>
A1 VDD FBVDDQ 25 FBD_CMD<25>
A1 VDD IN
FBD_CMD_VREF0 12MIL
CMD0 CMD24 0A<3> 22 FBD_CMD<22> K3 M12 CMD0 CMD24 0A<3> 4 FBD_CMD<4> K10 M12 FBD_DAT_VREF0 12MIL
CMD24 CMD0 0A<4> M4 A2 VDD CMD24 CMD0 0A<4> M9 A2 VDD IN
12MIL
24 FBD_CMD<24> 6 FBD_CMD<6> FBD_CMD_VREF1
R714 CMD22 CMD2 0A<5> K9 A3 A1 R676 CMD22 CMD2 0A<5> K4 A3 A1
IN
12MIL
0 FBD_CMD<0> 5 FBD_CMD<5> FBD_DAT_VREF1
0 CMD13 CMD4 1A<2> H11 A4 VDDQ C1 0 CMD13 CMD4 1A<2> H2 A4 VDDQ C1
IN
12MIL
2 FBD_CMD<2> 13 FBD_CMD<13> FBD_VREF_CTL0
5% CMD4 CMD6 1A<3> K10 A5 VDDQ E1 5% CMD4 CMD6 1A<3> K3 A5 VDDQ E1
IN
12MIL
21 FBD_CMD<21> 21 FBD_CMD<21> FBD_VREF_CTL1
0402 CMD5 CMD5 1A<4> L9 A6 VDDQ N1
0402 CMD5 CMD5 1A<4> L4 A6 VDDQ N1
IN
12MIL
NO STUFF 16 FBD_CMD<16> NO STUFF 16 FBD_CMD<16> FBD_ZQ0
FBD_CLK0_MPCAP CMD6 CMD13 1A<5> K11 A7 VDDQ R1 CMD6 CMD13 1A<5> K2 A7 VDDQ R1
IN
12MIL
23 FBD_CMD<23> FBD_CLK1_MPCAP 23 FBD_CMD<23> FBD_ZQ1
CMD21 CMD21 A<6> M9 A8/AP VDDQ V1 CMD21 CMD21 A<6> M4 A8/AP VDDQ V1
IN
20 FBD_CMD<20> 20 FBD_CMD<20>
C849 CMD23 CMD16 A<7> K2 A9 VDDQ C4 C794 CMD23 CMD16 A<7> K11 A9 VDDQ C4
17 FBD_CMD<17> 17 FBD_CMD<17>
.01UF R722 R715 CMD19 CMD23 A<8> L4 A10 VDDQ E4 .01UF R677 R673 CMD19 CMD23 A<8> L9 A10 VDDQ E4
9 FBD_CMD<9> 9 FBD_CMD<9>
16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4 16V 243 243 CMD20 CMD20 A<9> A11 VDDQ J4
10% 1% 1% CMD17 CMD17 A<10> VDDQ N4 10% 1% 1% CMD17 CMD17 A<10> VDDQ N4
X7R 0402 0402 VDDQ X7R 0402 0402 VDDQ
CMD16 CMD9 A<11> 12 FBD_CMD<12> G4 R4 CMD16 CMD9 A<11> 12 FBD_CMD<12> G9 R4
0402 COMMON COMMON 0402 COMMON COMMON
COMMON CMD10 CMD12 BA0 G9 BA0 VDDQ C9 COMMON CMD10 CMD12 BA0 G4 BA0 VDDQ C9
3 FBD_CMD<3> 3 FBD_CMD<3>
CMD18 CMD3 BA1 H10 BA1 VDDQ E9 CMD18 CMD3 BA1 H3 BA1 VDDQ E9
7 FBD_CMD<7> 7 FBD_CMD<7>
CMD11 CMD18 CKE BA2 VDDQ J9 CMD11 CMD18 CKE BA2 VDDQ J9
GND CMD12 CMD15 RST VDDQ GND CMD12 CMD15 RST VDDQ
18 FBD_CMD<18> H4 CKE VDDQ N9 18 FBD_CMD<18> H9 CKE VDDQ N9
8.1G< 4.2H> IN
FBD_CLK0 J11 CLK VDDQ R9 8.1G< 4.2H> IN
FBD_CLK1 J11 CLK VDDQ R9
8.1G< 4.2H> IN
FBD_CLK0* J10 CLK VDDQ A12 8.1G< 4.3H> IN
FBD_CLK1* J10 CLK VDDQ A12
VDDQ C12 VDDQ C12
MUST BE PLACED as close as possible to SNN_FBD0_NC J2 NC/RFU VDDQ E12 SNN_FBD1_NC J2 NC/RFU VDDQ E12
the BGA memory on the line AFTER the 14 FBD_CMD<14> J3 A12 (32Mx32) VDDQ N12 MUST BE PLACED as close as possible to 14 FBD_CMD<14> J3 A12 (32Mx32) VDDQ N12
2 MEMORY pin!! V4 SEN (GND) VDDQ R12 the BGA memory on the line AFTER the V4 SEN (GND) VDDQ R12 2
Minimize the stub length!! VDDQ V12 MEMORY pin!! VDDQ V12
Minimize the stub length!!
GND VSSQ B1 FBVDDQ GND VSSQ B1
15 FBD_CMD<15> V9 RESET VSSQ D1 15 FBD_CMD<15> V9 RESET VSSQ D1
VSSQ P1 VSSQ P1
A9 MF (GND) VSSQ T1 A9 MF (VDDQ) VSSQ T1
VSSQ G2 GND FBVDDQ VSSQ G2 GND FBVDDQ
FBD_ZQ0 A4 ZQ VSSQ L2 FBD_ZQ1 A4 ZQ VSSQ L2
VSSQ B4 VSSQ B4
D4 R691 D4 R648
R699 R685 R702 VSSQ P4 549 R656 VSSQ P4 549
VSSQ R1 VSSQ R1 BI 7.1G< 7.3E<>
10K 10K 243 1% 243 1%
VSSQ T4 0402 VSSQ T4 0402
5% 5% 1% 1%
0402 0402 0402 VSSQ B9 COMMON 0402 VSSQ B9 COMMON
COMMON COMMON COMMON VSSQ D9 R692 931 COMMON VSSQ D9 R649 931 FBCD_VREF_CTL 3 1G1D1S
P9 0402 1% COMMON P9 0402 1% COMMON Q512 D
VSSQ T9 VSSQ T9 2N7002
VSSQ G11 R690 C813 VSSQ G11 R647 C751 SOT23_1G1D1S
VSSQ VSSQ COMMON G1 GPIO10_FB_VREF_SW
IN 5.3H< 6.3H< 7.3H<
FBVDDQ GND GND GND GND L11 1.33K R2
.01UF GND L11 1.33K R2
.01UF 2 S 13.4C>
VSSQ B12 1% 16V VSSQ B12 1% 16V
VSSQ D12
0402 10% VSSQ D12
0402 10% MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A
VSSQ COMMON X7R VSSQ COMMON X7R R_DS_ON=7.5R
R701 121 FBD_CMD<22>
VSSQ P12 0402
VSSQ P12 0402
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
0402 1% NO STUFF
VSSQ T12 COMMON
VSSQ T12 COMMON V_BE_GS=20V
GND
GND GND
FBD_VREF_CTL1 3 1G1D1S
Q517 D
2N7002
SOT23_1G1D1S
8.1G<> 4.1E<> BI
FBD_D<63..0> COMMON G1
2 S
M1 M1 M1 M1 MAX_VOLTAGE=60V
HY5RS123235BFP-14 HY5RS123235BFP-14 HY5RS123235BFP-14 HY5RS123235BFP-14 CONTINUOUS_CURRENT=0.115A
PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 PACK_TYPE=BGA136_V2 R_DS_ON=7.5R
MAX_CURRENT=0.8A
VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 VERSION=BGA136 MAX_WATTAGE=0.2W
V_BE_GS=20V
4 COMMON COMMON COMMON COMMON 4
0 FBD_D<0> T10 DQ0 8 FBD_D<8> G3 DQ0 16 FBD_D<16> C11 DQ0 24 FBD_D<24> T3 DQ0
1 FBD_D<1> R10 DQ1 9 FBD_D<9> C3 DQ1 17 FBD_D<17> C10 DQ1 25 FBD_D<25> T2 DQ1 GND
2 FBD_D<2> N11 DQ2 10 FBD_D<10> F2 DQ2 18 FBD_D<18> F10 DQ2 26 FBD_D<26> R3 DQ2
3 FBD_D<3> L10 DQ3 11 FBD_D<11> F3 DQ3 19 FBD_D<19> B11 DQ3 27 FBD_D<27> R2 DQ3
8.1G<> 4.1E> BI
FBD_DQM<7..0> 4 FBD_D<4> R11 DQ4 12 FBD_D<12> B3 DQ4 20 FBD_D<20> B10 DQ4 28 FBD_D<28> M3 DQ4
0 FBD_DQM<0> 5 FBD_D<5> M10 DQ5 13 FBD_D<13> E2 DQ5 21 FBD_D<21> F11 DQ5 29 FBD_D<29> L3 DQ5
1 FBD_DQM<1> 6 FBD_D<6> M11 DQ6 14 FBD_D<14> B2 DQ6 22 FBD_D<22> G10 DQ6 30 FBD_D<30> M2 DQ6
2 FBD_DQM<2> 7 FBD_D<7> T11 DQ7 15 FBD_D<15> C2 DQ7 23 FBD_D<23> E11 DQ7 31 FBD_D<31> N2 DQ7
3 FBD_DQM<3>
4 FBD_DQM<4> FBD_DQM<0> N10 DQM FBD_DQM<1> E3 DQM FBD_DQM<2> E10 DQM FBD_DQM<3> N3 DQM
5 FBD_DQM<5> FBD_DQS_RN<0> P10 RDQS FBD_DQS_RN<1> D3 RDQS FBD_DQS_RN<2> D10 RDQS FBD_DQS_RN<3> P3 RDQS
6 FBD_DQM<6> FBD_DQS_WP<0> P11 WDQS FBD_DQS_WP<1> D2 WDQS FBD_DQS_WP<2> D11 WDQS FBD_DQS_WP<3> P2 WDQS
7 FBD_DQM<7>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - Partition D 16/32Mx32 BGA136 GDDR3
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 8 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
C558 C554 C567 C527 C553 C538 C517 C529 C545 C525 C600 C594 C601 C615 C592 C805 C777 C785 C735 C737
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
C568 C520 C564 C519 C530 C556 C570 C555 C569 C540 C603 C616 C602 C595 C593 C733 C762 C734 C786 C782
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
C546 C547 C505 C504 C506 C507 C549 C574 C610 C598 C608 C618 C795 C736 C791 C807
1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
2 2
3 3
C532 C557 C563 C521 C561 C820 C551 C516 C544 C566 C664 C722 C680 C673 C681 C826 C829 C827 C830 C842
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
C518 C535 C548 C550 C562 C536 C565 C534 C573 C543 C723 C634 C633 C665 C679 C821 C817 C828 C847 C819
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
C508 C575 C576 C510 C509 C577 C503 C514 C706 C639 C648 C701 C836 C824 C850 C822
1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
4 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 4
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL FrameBuffer - Decoupling
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 9 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
D5
DACA_GREEN AJ14 DACA_GREEN
OUT 10.1G> 14.2A< DLPA006
3
GND DACA_RED 160MA
AH12 DACA_BLUE 85V
2 DACA_BLUE OUT 10.1G> 14.3A< SC70-6_TRIPLE 2
C841 COMMON
4.7UF R655 R646 R660 2
6.3V 150 150 150
10% DACA_IDUMP AJ13
1% 1% 1%
X5R 0402 0402 0402
0603 COMMON COMMON COMMON
COMMON GND
GND
GND
GND GND GND
5
PLACE NEAR GPU D5
DLPA006
1
DACA_GREEN 160MA
85V
SC70-6_TRIPLE
COMMON
2
DACB_VDD
LB507 240R@100MHz GND
BEAD_0402 COMMON G1
C801 C802 C796 G92-975-A1
4.7UF 1UF .1UF BGA1148
6.3V 6.3V 16V COMMON
5
10% 10% 10%
X5R X5R X7R 9/24 DACB (TVout) D5
0603 0402 0402 DLPA006
COMMON COMMON COMMON Y9 DACB_VDD DACA_BLUE 6
160MA
85V
SC70-6_TRIPLE
DACB_VREF Y8 DACB_VREF COMMON
3 2 3
GND DACB_RSET Y11 DACB_RSET
C800
.1UF R669 R664
16V 124 1.91K
10% 1% 1%
GND
X7R 0402 0402
0402 COMMON NO STUFF DACB_RED AA8 DACB_PR
OUT 10.1G> 14.2A<
COMMON
D6
DLPA006
6
DACB_PB 160MA
85V
GND GND GND GND SC70-6_TRIPLE
COMMON
PLACE NEAR GPU 2
GND
3V3 3V3
5
4 D6 4
G1 R3 R16 DLPA006
G92-975-A1 4.7K 4.7K DACB_Y 1
160MA
BGA1148 5% 5% 85V
COMMON 0402 0402 SC70-6_TRIPLE
COMMON COMMON COMMON
10/24 DACC 2
R674 10K DACC_VDD AH7 DACC_VDD I2CB_SCL R9 I2CB_SCL R11 33 I2CB_SCL_R OUT 14.1A<>
0402 5% COMMON
I2CB_SDA T8 I2CB_SDA R14 33 0402 5% COMMON I2CB_SDA_R BI 14.1A<>
SNN_DACC_VREF AK8 DACC_VREF 0402 5% COMMON GND
SNN_DACC_RSET AH8 DACC_RSET DACC_HSYNC AJ10 SNN_DACC_HSYNC
GND DACC_VSYNC AJ7 SNN_DACC_VSYNC
4
D6
DLPA006
3
DACB_PR 160MA
85V
SC70-6_TRIPLE
DACC_RED AJ9 SNN_DACC_RED COMMON
2
GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
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NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 10 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
Page11: IFPA/B LVDS Output and IFPC/D TMDS Output NET VOLTAGE MAX_CURRENT MIN_LINE_WIDTH
GND
240R@100MHz
4 LB511 IFPC_IOVDD AL5 4
BEAD_0402 COMMON
IFPC_IOVDD
C855 C832 C793 C792
3V3 4.7UF 4.7UF 1UF .1UF AH5 IFPD_TXC* 11.3G> 14.2D<
6.3V 6.3V 6.3V 16V IFPD_TXC AH4 IFPD_TXC
OUT
10% 10% 10% 10% IFPD_TXC OUT 11.3G> 14.2D<
X5R X5R X5R X7R
1G1D1S 3 0603 0603 0402 0402
IFPCD_IOVDD_R R52 0 IFPCD_IOVDD_EN* D Q520 COMMON COMMON COMMON COMMON AK2 IFPD_TXD3* 11.3G> 14.2D<
0402 5% COMMON
IFPD_TXD4 AK3 IFPD_TXD3
OUT
SI2305DS 11.3G> 14.2D<
4 1G SOT23_1G1D1S IFPD_TXD4 OUT
1G1D1S COMMON GND
D Q2 S 2 MAX_VOLTAGE=-8V
SI3900DV C47 R745 CONTINUOUS_CURRENT=-2.8A@70C
240R@100MHz GND AK4 IFPD_TXD4* 11.3G> 14.2D<
3G SOT23_6D_1G1D1S .1UF 10K
R_DS_ON=52mR
AJ4 IFPD_TXD5 AK5
OUT
14.4A> 12.2D< IN
MXM_RUNPWROK COMMON 16V 5%
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C LB512 IFPD_IOVDD
IFPD_IOVDD IFPD_TXD5 IFPD_TXD4
OUT 11.3G> 14.2D<
17.2A< 16.2B<
S 2 10% 0402
V_BE_GS=+/-8V
BEAD_0402 NO STUFF
MAX_VOLTAGE=20V X7R COMMON C846 C831 C840
CONTINUOUS_CURRENT=2.4A
0402 IFPCD_IOVDD_C 12mil Load for option #2. 4.7UF 1UF .1UF AM1 IFPD_TXD5* 11.4G> 14.2D<
R_DS_ON=0.2R
MAX_CURRENT=8A NO STUFF 6.3V 6.3V 16V IFPD_TXD6 AN1 IFPD_TXD5
OUT
MAX_WATTAGE=1.15W
10% 10% 10% IFPD_TXD6 OUT 11.4G> 14.2D<
V_BE_GS=+/-12V
GND X5R X5R X7R
0603 0402 0402
240R@100MHz COMMON COMMON COMMON
Load for IFPCD_IOVDD_D 12mil LB514
3 1G1D1S BEAD_0402 COMMON
options Q516 D
SI2305DS GND
SOT23_1G1D1S G1
#1 and #3. COMMON
IFPCD_IOVDD_D_EN
MAX_VOLTAGE=-8V 2 S R36 49.9
6 1G1D1S
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR 0402 1% NO STUFF R35 49.9
Q2 D MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C R695 49.9 0402 1% NO STUFF
SI3900DV V_BE_GS=+/-8V
Delay to control C818 C19 C18 C20 0402 1% NO STUFF R694 49.9
SOT23_6D_1G1D1S C863 R750 .01UF .01UF .01UF .01UF
COMMON G1 inrush current 16V 16V 16V 16V
R31 49.9 0402 1% NO STUFF
5 5 S on IFPD_IOVDD. .1UF 10K 0402 1% NO STUFF R32 49.9 5
16V 5% 10% 10% 10% 10%
MAX_VOLTAGE=20V
10% 0402 X7R X7R X7R X7R R30 49.9 0402 1% NO STUFF
CONTINUOUS_CURRENT=2.4A
R_DS_ON=0.2R X7R COMMON 0402 0402 0402 0402 0402 1% NO STUFF R29 49.9
MAX_CURRENT=8A
MAX_WATTAGE=1.15W 0402 NO STUFF NO STUFF NO STUFF NO STUFF 0402 1% NO STUFF
V_BE_GS=+/-12V
IFPCD_IOVDD_D_EN* R736 1K COMMON
13.4D> IN
GPIO1_DVIB_HPD 0402 5% COMMON
NVIDIA CORPORATION
GND 2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL IFPA/B LVDS Output, IFPC/D TMDS Output
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 11 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
1 XTAL_BUFF_OUT 50OHM 1 1
OUT
XTAL_BUFF_OUT_R 50OHM 1
OUT
XTAL_SSC_IN 50OHM 1
OUT
XTAL_SSC_IN_R 50OHM 1
OUT
Spread Spectrum
XTAL
3V3 R744 22
0402 5% COMMON
GND GND
3 3
JTAG
3V3
G1
G92-975-A1
R12 R13 R10 BGA1148
180 10K 10K COMMON
5% 5% 5%
0402 0402 0402 23/24 JTAG
COMMON COMMON COMMON
TP1
JTAG_TCLK AK6 JTAG_TCLK
TP3
JTAG_TMS AL8 JTAG_TMS
TP2
JTAG_TDI AL7 JTAG_TDI
TP501
JTAG_TDO AK7 JTAG_TDO
TP502
JTAG_TRST* AL9 JTAG_TRST
R2 R7
10K 270
5% 5%
0402 0402
COMMON COMMON
4 4
GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
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NV_PN 600-10398-0006-200 A
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
NET
1.2V
NV_IMPEDANCE
0.10A 16MIL
NV_CRITICAL_NET
1
G1 G1
G1
G92-975-A1
R710
47K
5%
R709
47K
5%
R8
10K
5%
R63
2.2K
5%
R749
2.2K
5%
G92-975-A1
BGA1148
COMMON
PLLAVDD G92-975-A1
BGA1148
COMMON
BGA1148 19/24 THERMAL 11/24 PLLVDD
COMMON 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON 3V3
17/24 I2C THERMDN (CATHODE) SNN_GPU_VID_PLLVDD AB11 VID_PLLVDD_NC
R62 5% 33 T1
I2CC_SCL P8 I2CC_SCL 0402 COMMON I2CC_SCL_R R60 200
I2CC_SDA P9 I2CC_SDA I2CC_SDA_R I2C ADDRESS: 0x98H 0402 5% NO STUFF LB504 240R@100MHz GPU_VID_PLLAVDD AC12 VID_PLLAVDD
R748 33 BEAD_0402 COMMON
0402 5% COMMON C48
C843 .1UF R738 R19 C797 C778 C787
2200PF 16V 47K 47K 4.7UF 1UF .1UF
U1 10%
U1 16V 5% 5% 6.3V 6.3V 16V
I2CH_SCL U9 I2CH_SCL
THERMDP (ANODE) 10% X7R 0402 0402 10% 10% 10%
HDCP_KEYROM_PROGD_V3 U503
I2CH_SDA V9 I2CH_SDA SO8 3V3 X7R 0402 COMMON COMMON X5R X5R X7R
MAX6649MUA NO STUFF
COMMON 0402 SO8_122MIL 0603 0402 0402
R9 NO STUFF NO STUFF 12MIL COMMON COMMON COMMON AA12
10K 6 8 2 1 VID_PLLGND
5% SCL VCC THERM
D+ VDD THERM_VDD GND
2 7 C13 THERM* 3 2
AE1 I2CS_SCL_GPU
0402
5 VCC .1UF D- 4
I2CS_SCL COMMON SDA THERM
16V
I2CS_SDA AE2 I2CS_SDA_GPU 3 SDA 10%
R61 5% 0 ALERT 6 PEX_VDD GND
GND 4 X7R 0402 NO STUFF THERM_SCL 8 SCL AC11 PLLVDD
SNN_CRYPT 2 GND 1 0402 THERM_SDA 7 SDA GND 5
R21 R28 NC COMMON R747 0
GND
0 0 Change to 190-00001-0001-003 0402 5% NO STUFF LB505 240R@100MHz GPU_PLLAVDD AB12
5% 5% C758 BEAD_0402 COMMON
PLLAVDD
0402 0402
COMMON COMMON GND GND 4.7UF
6.3V C799 C790 C781
R4 5% 0 10%
I2CS_SCL 0402 NO STUFF 4.7UF 1UF .1UF AF29
14.3A> IN X5R 6.3V 6.3V 16V H_PLLAVDD
14.3A<> I2CS_SDA 0603
BI 10% 10% 10%
R5 0 COMMON
X5R X5R X7R
0402 5% NO STUFF 0603 0402 0402
GND COMMON COMMON COMMON AD12 PLLGND
GND
GND
GPIO
PS_PGOOD_NV 16.2B> 17.4A<
IN
1G1D1S
1G1D1S
1G1D1S
G1
1G
G1 U2
MX25L1005
D
Q6
Q515
COMMON
BSS138
SOT23_1G1D1S
COMMON
BSS138
SOT23_1G1D1S
COMMON
COMMON
SOT23_1G1D1S
BSS138
3
COMMON
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
MAX_VOLTAGE=50V
CONTINUOUS_CURRENT=0.22A@31C
R_DS_ON=3.5R
MAX_CURRENT=0.88A
MAX_WATTAGE=0.36W@25C
V_BE_GS=+/-20V
V_BE_GS=+/-20V
MAX_WATTAGE=0.36W@25C
MAX_CURRENT=0.88A
R_DS_ON=3.5R
CONTINUOUS_CURRENT=0.22A@31C
MAX_VOLTAGE=50V
5%
24/24 MISC 0402
7 8
3 HOLD VCC
COMMON
AC4 ROM_CS* 1 WP C12
ROMCS CS .1UF
16V
G1 ROM_SI AB2 ROM_SI 5
G92-975-A1 AA3 ROM_SO 2 SI 10%
ROM_SO SO X7R
BGA1148
ROM_SCLK AA1 ROM_SCLK 6 4 0402
COMMON
3V3
SCK GND COMMON
18/24 GPIO GPIO8_THERM_ALERT_Q*
4 GPIO8_THERM_ALERT*
OUT 14.4A< BUFRST U5 SNN_GPU_BUFRST* 4
GPIO<0> N3 GPIO0_DVIA_HPD R726 1K GPIO0_DVIA_HPD_R
IN 14.1A> GND
U3 GPIO1_DVIB_HPD 0402 5% COMMON R711 Y12 SNN_GPU_STEREO R800 10K
GPIO<1> T4 R707 C845 49.9K STEREO 3V3
GPIO<2> GPIO2_LVDS_BL_PWM
OUT 14.3A< 3V3 1%
0402 5% COMMON
R2 GPIO3_LVDS_PPEN_Q GPIO3_LVDS_PPEN 14.3A<
10K 220PF N9 GPU_SWAPRDY 14.5A<>
GPIO<3> N1 GPIO4_LVDS_BLEN_Q GPIO4_LVDS_BLEN
OUT 5% 50V
50OHM 1
0402
50OHM 1
SWAPRDY_A BI
GPIO<4> OUT 14.3A< 2 0402 5% NO STUFF
GPIO<5> T3 GPIO5_NVVDD_CTL0
OUT 16.4A< D501 COMMON C0G 14.4A<> 13.1G< IN
SPDIF_IN C835 .01UF SPDIF_IN_GPU AB1 SPDIF
GPIO<6> T5 GPIO6_NVVDD_CTL1
OUT 16.5A< BAV99 0402 0402 16V SNN_MISC1 AC3 RFU
P1 GPIO7_NVVDD_CTL2 16.5A< SOT23 3 COMMON 10% R718
GPIO<7> M2
OUT 100V X7R 49.9K SNN_MISC2 AC9 R12 SNN_GPU_5V_CLAMP
GPIO<8> N2 100MA COMMON 1%
AB7 RFU CLAMP
GPIO<9> GPIO9_LVDS_SYS*
OUT 11.3A< COMMON GND GND 0402
SNN_MISC3
RFU
GPIO<10> R1 GPIO10_FB_VREF_SW
OUT 5.3H< 6.3H< 1 COMMON SNN_MISC4 AB6 RFU TESTMODE V1 GPU_TESTMODE
GPIO<11> R3 GPIO11_RASTER_SYNC
OUT
7.3H< 8.3H<
14.5A<> SNN_MISC5 AC7 RFU
P3 GPIO12_AC_BATT* 14.4A> 11.5A< SNN_MISC6 AB5 R26
GPIO<12> T2 GPIO13_FBVDDQ_CTL
IN OUT RFU 10K
17.4E<
GPIO<13> U4
OUT 5%
GPIO<14>
GPIO14_PWR_CTL1
OUT 16.2A< GND 0402
R38 1K GPIO1_DVIB_HPD_R
IN 14.2A> GND COMMON
R720 R728 R65 R6 R27 R43 0402 5% COMMON
10K 10K 10K 10K 10K 10K 3V3 R44 C21
5% 5% 5% 5% 5% 5% 10K 220PF
0402 0402 0402 0402 0402 0402 5% 50V
COMMON COMMON COMMON COMMON COMMON COMMON 2 0402 5% GND
D2 COMMON C0G
BAV99 0402
3 COMMON
SOT23
100V
GND GND GND GND GND GND 100MA
COMMON GND GND
1
5 GND 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL VID_PLLVDD, GPIO, Temp Sensor, VBIOS and HDCP ROM
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 13 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
Page14: MXM-III Connector, MIOA and MIOB Interface NET VOLTAGE MAX_CURRENT MIN_LINE_WIDTH
MIOA_VDDQ 2.5V 0.50A 16MIL
MIOA_VDDQ
MIOA_VREF 12MIL
IN
MIOA_CAL_PD_VDDQ 12MIL
IN
MIOA_CAL_PU_GND 12MIL
IN
10.4F> BI
I2CB_SCL_R 232 DDCB_SCLK DVI_A_TX0 237 IFPC_TXD0*
IN 11.3G> 11.4F>
10.4F<> BI
I2CB_SDA_R 230 DDCB_SDATA DVI_A_TX0 239 IFPC_TXD0
IN 11.3G> 11.4F>
G1
DVI-A 231 IFPC_TXD1* 11.3G> 11.4F> G92-975-A1
DVI_A_TX1 233
IN
BGA1148
DVI_A_TX1 IFPC_TXD1
IN 11.3G> 11.4F> 2V5 3V3 MIOA_VDDQ
COMMON
5 5
GND GND
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL Power Decoupling and GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 15 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
PS_PHASE1_NV 20A
IN
PS_PHASE2_NV 20A 20MIL
LOAD STEP CIRCUITRY IN
IN
PS_VIN_NV
PS_UG1_NV
16MIL
20MIL
IN
PS_BOOT1_NV 20MIL
IN
PS_BOOT1_RC_NV 20MIL
IN
PS_LG1_NV 20MIL
IN
PS_ISEN1_NV 16MIL
IN
PS_RC1_NV 25MIL
IN
PS_UG2_NV 20MIL
IN
1 IN
PS_BOOT2_NV 20MIL 1
PS_BOOT2_RC_NV 20MIL
IN
PS_LG2_NV 20MIL
IN
PS_ISEN2_NV 20MIL
IN
PS_RC2_NV 20MIL
IN
PS_PWM_VSUM_NV 16MIL
IN
PS_PWM_OCSET_NV 16MIL
IN
PS_DROOP_NV 16MIL
IN
PS_PWM_DFB_NV 16MIL
IN
PEX_VDD IN
PS_PWM_VO_NV 16MIL
PS_PWM_VDD_NV 20MIL
IN
R637 PS_PWM_VDIFF_NV 16MIL
10K IN
R700 PS_PWM_VDIFF_RC_NV 16MIL
1.5K 5% IN
PS_FB_NV 16MIL
5% 0402 IN
NO STUFF PS_CP_NV 16MIL
0402 IN
COMMON 1B1C1E 3NVVDD_STEP1_Q IN
PS_CP_RC_NV 16MIL
NVVDD_STEP1_R NVVDD_STEP1_C C Q513 PS_PWM_VW_NV 16MIL
IN
13.5C> IN
GPIO14_PWR_CTL1 R706 4.99K C823 .01UF R686 10K 1 B MMBT2222A
IN
PS_PWM_RBIAS_NV 16MIL
SOT23_1B1C1E
0402 1% COMMON 0402 16V 0402 5% COMMON COMMON 5V 5V IN
PS_SS_NV 16MIL
R704 10% R687 NVVDD_STEP1_B E 2
1.02K X7R 1.02K 16.4D< 15.3G> PS_VSENP_NV 8MIL
1% COMMON 1% IN
0402 0402
R611 PS_PWM_VDD_NV R652 10 16.5D< 15.3G> PS_VSENN_NV 8MIL
680 IN
COMMON COMMON 0402 5% COMMON
5% C753 C644
0402
COMMON
1UF 1UF
6.3V U502 6.3V
CTL1 HIGH WHEN THERE IS INCREASE IN CURRENT 10% 10%
X7R
ISL9502 X7R PWR_SRC
C622 DYNAMIC VID(0.5V..1.50V)
GND .01UF
0603 QFN48 0603
COMMON QFN48 COMMON
16V
2 COMMON C721 .01UF Iout_peak_to_peak = 2.5A 2
10%
GND 2 Phase PWM GND 0402 25V
GND C37 C43 C41 C42 C44 (Iout_max=50A; Vin=7.5V; Vout=1.2V; F=300KHz)
X7R
0402 3 31 10% .1UF 10UF 10UF 10UF 10UF
COMMON
VDD PVCC X7R 50V 25V 25V 25V 25V
COMMON 10% 10% 10% 10% 10% Iout_peak_to_peak = 2.3A
22 VDD VIN 20 PS_VIN_NV R641 10 X7R X5R X5R X5R X5R (Iout_max=50A; Vin=22V; Vout=1.0V; F=300KHz)
GND 0402 5% COMMON LFPAK D 5 0603 1206 1206 1206 1206
Q10 COMMON COMMON COMMON COMMON COMMON
13.3C< OUT
PS_PGOOD_NV 1 PGOOD BSC059N03S Iin_rms = 10A
17.4A< 35 PS_UG1_NV 4G LFPAK
Rvdiff UGATE1 COMMON (Iout_max=50A; Vin=7.5V; Vout=1.2V)
14.4A>
R634 1.8K 11.4A< IN
MXM_RUNPWROK 44 VR_ON S 1 MAX_VOLTAGE=30V
Cvdiff 0402 5% COMMON Rfb
12.2D<
17.2A< BOOT1 36 PS_BOOT1_NV R605 0 PS_BOOT1_RC_NV C625 0.22UF 2 CONTINUOUS_CURRENT=50A
R_DS_ON=5.5mR GND Iin_rms = 6.3A
0402 5% COMMON 0603 25V
COMMON
3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W (Iout_max=50A; Vin=22V; Vout=1.0V)
C716 220PF PS_PWM_VDIFF_RC_NV R642 365 PS_PWM_VDIFF_NV 13 34 PS_PHASE1_NV 10% X7R V_BE_GS=+/-20V
L2 0.68uH
0402 50V COMMON 0402 1% COMMON
VDIFF PHASE1 SMD_520X508 COMMON
RL CL
1 D4 C27
5% C0G R630 10K C709 0.22UF LFPAK 5 LFPAK 5 IR10MQ040N C522 C28
0402 5% COMMON 0603 25V
D D SMA 1000PF 470UF 10UF
Ccomp
X7R
Q9 Q11 50V COMMON 6.3V
C697 120PF 10% BSC022N03S BSC022N03S 40V
COMMON 2.1A 10% 20% 20%
0402 50V PS_FB_NV 11 32 PS_LG1_NV 4G LFPAK 4G LFPAK
FB LGATE1 COMMON COMMON 2 COMMON X7R 2.5V X5R
5% 1 1 POSCAP
Cfb
C0G
Rcomp S MAX_VOLTAGE=30V S MAX_VOLTAGE=30V 0402 0805
PS_RC1_NV
C698 120PF 10 24 C559 2 2 COMMON 3900MA@100KHZ,45C COMMON
PS_CP_RC_NV
COMMON R627 453K PS_CP_NV
COMP ISEN1 PS_ISEN1_NV CONTINUOUS_CURRENT=100A
R_DS_ON=2.2mR
CONTINUOUS_CURRENT=100A
R_DS_ON=2.2mR
9MOHM
0402 50V COMMON 0402 1% COMMON Rfsw
1000PF 3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W 3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W SMD_7343
5% C0G 50V R503
R626 4.42K PS_PWM_VW_NV 9 33 V_BE_GS=+/-20V V_BE_GS=+/-20V
PS_RC2_NV
1000PF 9MOHM
0 0 1 1 0 0 0 1.2000 <- R595 3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W 3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W SMD_7343
0 R586 50V R735
0 0 1 1 0 0 1 1.1875 <- 39 VID2 OCSET 8 PS_PWM_OCSET_NV R622 10K oc-trip 10%
V_BE_GS=+/-20V V_BE_GS=+/-20V
5% 0 2.21
0 0 1 1 0 1 0 1.1750 <- 0402 5%
0402 1% COMMON X7R 1%
GND GND
0 0 1 1 0 1 1 1.1625 <- COMMON 0402
40 VID3 0402 1206
0 0 1 1 1 0 0 1.1500 <- NO STUFF VO 18 COMMON GND COMMON
0 0 1 1 1 0 1 1.1375 <- PS_VID4_NV 41 VID4 C24
0 0 1 1 1 1 0 1.1250 <- C23
42 16 470UF 4.7UF
0 0 1 1 1 1 1 1.1125 <- PS_VID5_NV
VID5 DROOP PS_DROOP_NV GND COMMON 6.3V
0 1 0 0 0 0 0 1.1000 <- GND 20% 10%
0 1 0 0 0 0 1 1.0875 <- 3V3 PS_VID6_NV 43 R636 C757 1000PF 2.5V X5R
VID6 200
4 0 1 0 0 0 1 0 1.0750 <- GND 5%
0402 50V
10%
NVVDD POSCAP
3900MA@100KHZ,45C
0805 4
0 1 0 0 0 1 1 1.0625 <- COMMON
0402 COMMON X7R 9MOHM
0 1 0 0 1 0 0 1.0500 <- R579 R596 COMMON SMD_7343
0 1 0 0 1 0 1 1.0375 <- R606 0 0 21 17 PS_PWM_DFB_NV R645 1K PS_PWM_VO_NV R657 0 Connect from Output Cap VCC
10K 5% 5% GND DFB
0 1 0 0 1 1 0 1.0250 <-
5% 0402 0402
0402 5% COMMON 0402 5% COMMON GND GND
0 1 0 0 1 1 1 1.0125 <- NO STUFF COMMON 48 C767
0402 GND .01UF
0 1 0 1 0 0 0 1.0000 <- COMMON IN 15.3G> 16.2G<
16V
13.4C> GPIO5_NVVDD_CTL0
IN 10%
VSEN 14 PS_VSENP_NV X7R
GND GND 0402
3V3 49 15 C719 COMMON
THERM_GND RTN 1000PF Single-Phase Dual-Phase
50V
NC NC 10% GND R644 5% 100
X7R 0402 NO STUFF Rvdiff 1.8K 1.8K
R603 GND 0402
10K NO STUFF
25
47
SNN_ISL9502_NC2
GND
GPIO7_NVVDD_CTL2 R801 0 PS_VID1_NV 3V3 R580 Route to Rnv_vsen with single trace from Output Cap Via Rcomp 732K 412K
0402 5% NO STUFF 10K
5%
0402 Route to RGND pin with single trace from Output Cap Via Ccomp 100pF 330pF
R604 1G1D1S COMMON Via at RGND pin must be isolated from GND
10K 3
5% D
0402 Q510 100 ohm resistors are loaded in case GPU is not installed
COMMON 2N7002
SOT23_1G1D1S
13.4C> IN
GPIO7_NVVDD_CTL2 R802 0 1G NO STUFF
0402 5% COMMON S 2
5 R808 MAX_VOLTAGE=60V 5
0 CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
5% MAX_CURRENT=0.8A
0402 MAX_WATTAGE=0.2W
V_BE_GS=20V
NO STUFF
1
0402 50V
1% 10%
0402 X7R
COMMON COMMON
GND
2 GND 2
Vout = Vref * (1+R1/R2)
GND 1.10V = 0.8V * (1+1.54K/4.02K)
1.15V = 0.8V * (1+1.74K/4.02K)
1.20V = 0.8V * (1+2K/4.02K)
FBVDDQ
U501
ISL6269ACRZ
VR_SW=0.6V
3 5V MLFP16 PWR_SRC 3
MLFP16 Iout_peak_to_peak = 2.736A
COMMON (Iout_max=10A; Vin=7.5V; Vout=1.8V; F=500KHz)
12 PVCC VIN 1
Iout_peak_to_peak = 3.305A
STUFF FOR ISL6269A C501 C45 C46 (Iout_max=10A; Vin=22V; Vout=1.8V; F=500KHz)
5 .1UF 10UF 10UF
2 D 50V 25V 25V
R552 10 PS_PWM_VCC_FB
VCC LFPAK Q502 10% 10% 10%
C541 0402 5% COMMON C585 BSC059N03S X7R X5R X5R Iin_rms = 4.855A
4.7UF 4.7UF 14 PS_UG_FB 4G LFPAK 0603 1206 1206
UG COMMON (Iout_max=10A; Vin=7.5V; Vout=1.8V)
6.3V 6.3V
10% 20% S 1 MAX_VOLTAGE=30V
COMMON COMMON COMMON
X5R X5R 2 CONTINUOUS_CURRENT=50A
R_DS_ON=5.5mR Iin_rms = 2.75A FBVDDQ
0603 0603
BOOT 13 PS_BOOT_FB R536 0 PS_BOOT_RC_FB C560 .22UF 3 MAX_CURRENT=200A
MAX_WATTAGE=2.8W (Iout_max=10A; Vin=22V; Vout=1.8V)
COMMON COMMON 3 FCCM 0402 5% COMMON 0402 10V V_BE_GS=+/-20V
GND
17.1G< 11.1B< OUT DEM ENABLED COMMON
10%
X5R
L3 1uH
5V PHASE 15 PS_PHASE_FB 7_6X7_6 COMMON
C539 NV_PN=131-0058-000 C40 C39
GND FCCM=0 --GND
ENABLE DIODE EMULATION
1000PF HEIGHT=3.0MM
DC_RESISTANCE=9mR
C38 C36
R541 1 9 PS_ISEN_FB 5 50V CONTINUOUS_CURRENT=11A 330UF 330UF 10UF 10UF
ISEN R532 5.49K Ioc_Mim=15A D 10% MAX_CURRENT=22A
COMMON COMMON 6.3V 6.3V
10K 0402 1% COMMON 131-0018-000 can be the alternative
5%
LFPAK Q501 X7R 131-0123-000 can be the alternative 20% 20% 20% 20%
BSC030N03LS
PS_RC_FB
0402 D3 0402 2.5V 2.5V X5R X5R
11 PS_LG_FB 4G LFPAK 1 COMMON POSCAP POSCAP
NO STUFF 2 IR10MQ040N 0805 0805
PS_PGOOD_FB 16 LG COMMON
1 SMA 3900MA@100KHZ,45C 3900MA@100KHZ,45C COMMON COMMON
11.1A< OUT PGOOD C502 S MAX_VOLTAGE=30V
9MOHM 9MOHM
2 CONTINUOUS_CURRENT=100A 40V
1000PF R_DS_ON=3.0mR
2.1A SMD_7343 SMD_7343
50V 3 MAX_CURRENT=400A
MAX_WATTAGE=2.8W@25C 2 COMMON
R506
16.2B> 13.3C< PS_PGOOD_NV 4 10% V_BE_GS=+/-20V 2.21 GND GND GND GND
IN EN X7R 1%
0402 1206
PGND 10 COMMON COMMON
PS_FSET_FB 7 FSET
4 R535 C542 GND GND GND 4
33.2K .01UF TP GND(PAD) VO 8
1% 16V
0402 10%
COMMON X7R PS_CP_FB 5 COMP FB 6 PS_FB_FB R539 3.01K FBVDDQ = 0.6*[1+(Rtop/Rbot)]
0402 0402 1% COMMON
COMMON Rtop GPIO13 LOW 1.8V= 0.6V*[1+(3.01K/1.5K)]
R576 11.5K GPIO13 HIGH 1.55V= 0.6V*[1+(3.01K//11.5K)/1.5K]
Switching Fre = 500KHz R551 75K PS_CP_RC_FB C582 .01UF 0402 1% COMMON
0402 5% COMMON 0402 16V Rtop1
10% PS_FB_VCTL* 3
GND COMMON X7R
1G1D1S GPIO13 LOW 1.9V= 0.6V*[1+(2.49K/1.15K)]
Q505 D GPIO13 HIGH 1.5V= 0.6V*[1+(2.49K//5.62K)/1.15K]
C572 47PF 2N7002
SOT23_1G1D1S
0402 50V COMMON G1 PS_FB_VCTL R578 10K GPIO13_FBVDDQ_CTL
IN 13.4C>
5% 2 0402 5% COMMON
C0G
S
COMMON
R538 MAX_VOLTAGE=60V
C599 R583
1.5K CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
.01UF 10K
1% MAX_CURRENT=0.8A 16V 5%
0402 MAX_WATTAGE=0.2W
V_BE_GS=20V 10% 0402
COMMON X7R COMMON
0402
Rbot COMMON
1.80V = 0.6*[1+(2.00K/1.00K)]
GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL Power Supply II - FBVDDQ, PEX_VDD
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 17 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
RAM_CFG[3:0]
0'2 R18 10K MIOB_D<0> R17 10K RAM_CFG_0
0402 5% COMMON 0402 5% NO STUFF MS_0001: 16Mx32 DDR3 256-bit Qimonda
MS_0010: 16Mx32 DDR3 256-bit Hynix
MS_0011: 16Mx32 DDR3 256-bit Samsung
0'3 R721 10K MIOB_D<1> R730 10K RAM_CFG_1
0402 5% NO STUFF 0402 5% COMMON MS_0101: 32Mx32 DDR3-Stacked Die 256-bit Qimonda
MS_0110: 32Mx32 DDR3-Stacked Die 256-bit Hynix
MS_0111: 32Mx32 DDR3-Stacked Die 256-bit Samsung
0'4 R729 10K MIOB_D<8> R719 10K RAM_CFG_2
0402 5% COMMON 0402 5% NO STUFF
MS_0001: 32Mx32 DDR3-Monolithic 256-bit Qimonda
MS_0010: 32Mx32 DDR3-Monolithic 256-bit Hynix
2 0'5 R740 10K MIOB_D<9> R739 10K RAM_CFG_3 MS_0011: 32Mx32 DDR3-Monolithic 256-bit Samsung 2
0402 5% COMMON 0402 5% NO STUFF
CONTINUOUS_CURRENT=0.22A@31C
R64 2.2K MIOA_D<0> R688 2.2K -set to 0x0 to disable
0402 5% NO STUFF 0402 5% COMMON
5V
MAX_WATTAGE=0.36W@25C
SOT23_1G1D1S
MAX_CURRENT=0.88A
MAX_VOLTAGE=50V
V_BE_GS=+/-20V
R_DS_ON=3.5R
R751 0
COMMON
BSS138
0402 5% NO STUFF
Q518
0'18 MIOA_D<6> R698 2.2K MIOA_D6_PU 3GIO_PADCFG_LUT_ADR[0] DEFAULT: 0000
3
0402 5% COMMON
3V3 R753
47K 3GIO_PADCFG_LUT_ADR[1]
D
5%
0402
R752 Q12
G
COMMON
1G1D1S
47K 3 3GIO_PADCFG_LUT_ADR[2]
1
MIOA_D6_PU_EN
5% D
0402 1G1D1S
COMMON 2N7002
SOT23_1G1D1S
2.5D> OUT
MXM_PRESENT2* 1G COMMON MIOA_D<8> R56 2.2K 3GIO_PADCFG_LUT_ADR[3]
S 2 0402 5% NO STUFF
MAX_VOLTAGE=60V MIOA_D<9> R806 2.2K
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R 0402 5% NO STUFF
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W MIOB_HSYNC R807 2.2K 3V3
V_BE_GS=20V
0402 5% NO STUFF
4 Change to BS138 when MIOA_VDDQ=3.3V 4
GND
1'12
REG: NV_STRAP_1
1'15
R15 2.2K ROM_SI MIOA_EN_33V 1=3.3V (DEFAULT)
0402 5% NO STUFF
GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL Strap Configuration
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 18 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H
A B C D E F G H
Page19: Mechanical
1 1
MEC1 MEC501
MXM_III_MOUNTING_HOLES MXM_III_BACKPLATE_HOLES_HP
X2 X4
NO STUFF NO STUFF
1 1
2 MEC1 MEC501 2
MXM_III_MOUNTING_HOLES MXM_III_BACKPLATE_HOLES_HP
X2 X4
NO STUFF NO STUFF
2 2
MEC501
MXM_III_BACKPLATE_HOLES_HP
X4
NO STUFF
GND 3
MEC501
MXM_III_BACKPLATE_HOLES_HP
X4
NO STUFF
4
GND
3 3
4 4
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY MXM-III NB8E-GT/G92-700,512MB,8pcs 16Mx32 GDDR3 for APPLE SANTA CLARA, CA 95050, USA
PAGE DETAIL Mechanical
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10398-0006-200 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p398_a02 PAGE 19 OF 19
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-SEP-2007
A B C D E F G H