SONA COLLEGE OF TECHNOLOGY 1

DO’S AND DON’TS IN THE LAB

DO’S:-

1. Proper dress has to be maintained while entering in the Lab. (all should wear lab
coat and remove the shoes outside , girls should not leave lose hair)
2. All students should come to the Lab with necessary tools.
3. Students should carry observation notes and record completed in all aspects.
4. Correct specifications of the equipment have to be mentioned in the circuit
diagram.
5. Student should be aware of operating equipment.
6. Students should be at their concerned experiment table, unnecessary moment is
restricted.
7. Student should follow the indent procedure to receive and deposit the equipment
from the Lab Store Room.
8. After completing the connections Students should verify the circuits by the Lab
Instructor.
9. The reading must be shown to the Lab In-Charge for verification.
10. Students must ensure that all switches are in the OFF position, all the
connections are removed.

DON’Ts:-

1. Don‘t come late to the Lab.

2. Don‘t make or remove the connections with power ON.
3. Don‘t switch ON the supply without verifying by the Staff Member.
4. Don‘t leave the lab without the permission of the Lab In-Charge.
SONA COLLEGE OF TECHNOLOGY 2

S.NO LIST OF EXPERIMENTS Programme

outcomes
Cycle 1: Using MATLAB
1. Generation of Discrete time signals a,b,c,d,e,g
2. Linear and Circular convolution a,b,c,d,e,g
3. Auto and Cross Correlation a,b,c,d,e,g
4. Sampling and effect of Aliasing a,b,c,d,e,g

5. Design of FIR Filters a,b,c,d,e,g

6. Design of IIR Filters a,b,c,d,e,g
7. DFT and FFT a,b,c,d,e,f,g
8. Up sampling and Down sampling a,b,c,d,e,g
Cycle 2: Using TMS320C54 Processor
9. Arithmetic operations using DSP a,b,c,d,e,f,g
10. Sampling of input signal and display a,b,c,d,e,f,g
11. Implementation of FIR Filters a,b,c,d,e,f,g
12. Implementation of IIR Filters a,b,c,d,e,f,g
13. Linear convolution a,b,c,d,e,f,g
14. Generation of Signals a,b,c,d,e,g
15. Calculation of FFT a,b,c,d,e,g
 SONA COLLEGE OF TECHNOLOGY 3

CONTENTS

S.NO DATE NAME OF EXPERIMENT MARKS SIGNATURE

AWARDED OF STAFF
1. Generation of Discrete time signals

2. Linear and Circular convolution

3. Auto and Cross Correlation

4. Sampling and effect of Aliasing

5. Design of FIR Filters

6. Design of IIR Filters

7. DFT and FFT

8. Up sampling and Down sampling
9. Arithmetic operations using DSP

10. Sampling of input signal and display

11. Implementation of FIR Filters

12. Implementation of IIR Filters

13. Linear convolution

14. Generation of Signals

15. Calculation of FFT

SONA COLLEGE OF TECHNOLOGY 4

FAMILIARIZATION WITH MATLAB

AIM:

To familiarize with the MATLAB environment and to write MATLAB programs for the
following
1. Plot the unit impulse function
2. Plot the unit step function.
3. Plot the unit ramp and exponential function
4. Plot the sine, cosine, saw tooth and square wave functions

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

THEORY:

MATLAB is a high-performance language for technical computing. It integrates computation,

visualization, and programming in an easy-to-use environment where problems and solutions are
expressed in familiar mathematical notation. Typical uses include:
 Math and computation
 Algorithm development
 Modeling, simulation and prototyping
 Data analysis, exploration, and visualization
 Scientific and engineering graphics
 Application development, including Graphical User Interface building

MATLAB is an interactive system whose basic data element is an array that does not require
dimensioning. This helps in solving many technical computing problems, especially those with
matrix and vector formulations, in a fraction of the time it would take to write a program in a
scalar non interactive language such as C or Fortran.
The name MATLAB stands for matrix laboratory. MATLAB was originally written to
provide easy access to matrix software developed by the LINPACK and EISPACK projects, which
together represent the state-of-the-art in software for matrix computation.

The MATLAB system consists of five main parts:

SONA COLLEGE OF TECHNOLOGY 5

1. The MATLAB language. This is a high-level matrix/array language with control flow
statements, functions, data structures, input/output, and object-oriented programming
features. It allows both ―programming in the small‖ to rapidly create quick and dirty throw-
away programs and ―programming in the large‖ to create complete large and complex
application programs.
2. The MATLAB working environment. It includes facilities for managing the variables in
your workspace and importing and exporting data. It also includes tools for developing,
managing, debugging and profiling M-files, MATLAB‘s applications.
3. Handle Graphics. This is the MATLAB graphics system. It includes high-level commands
for two-dimensional and three-dimensional data visualization, image processing, and
animation and presentation graphics. It also includes low-level commands that allows the
user to fully customize the appearance of graphics as well as to build complete Graphical
User Interfaces on your MATLAB applications.
4. The MATLAB mathematical function library. This is a vast collection of computational
algorithms ranging from elementary functions like sum, sine, cosine, and complex
arithmetic to more sophisticated functions like matrix inverse, matrix eigen values, Bessel
functions and Fast Fourier Transforms.
5. The MATLAB Application Program Interface (API). This is a library that allows the
user to write C and Fortran programs that interact with MATLAB. It includes facilities for
calling routines from MATLAB (dynamic linking), calling MATLAB as a computational
engine, and for reading and writing MAT-files.

Simulink
Simulink a companion program to MATLAB, is an interactive system for simulating
nonlinear dynamic system. It is a graphical mouse-driven program that allows the user to model a
system by drawing a block diagram on the screen and manipulating it dynamically. It can work
with linear, nonlinear, continuous-time, discrete-time multivariable and multi-rate systems.
Block sets are add-ins to Simulink that provide additional libraries of blocks for specialized
applications like communications, signal processing and power systems.
Real-time Workshop is a program that allows the user to generate C code from block
diagrams and to run it on a variety of real-time systems.
SONA COLLEGE OF TECHNOLOGY 6

M-Files
Like most other programming languages, MATLAB provides mathematical expressions,
but unlike most programming languages, these expressions involve entire matrices. Files that
contain code in the MATLAB language are called M-files. M-files can be created using a text
editor, and can be used as any other MATLAB function or command. There are two kinds of M-
files:
 Scripts, which do not accept input arguments or return output arguments. They operate on
data in the workspace.
 Functions, which can accept input arguments and return output arguments. Internal
variables are local to the function.

Toolboxes:
MATLAB features a family of application-specific solutions called toolboxes. Toolboxes
are comprehensive collections of MATLAB functions (M-file) that extend the MATLAB
environment to solve particular classes of problems. Areas in which toolboxes are available
include signal processing, control systems, neural networks, fuzzy logic, wavelets, simulation, and
many others.
Signal Processing Toolbox:
The signal processing toolbox in MATLAB facilitates in analysis of signals and design of
systems. This contains a list of functions pertaining to the various areas of signal processing.
 Waveform generation and plotting : eg: sine, chirp
 Filter analysis and implementation :eg: conv, filter
 Linear system and transformation : eg: residuez, convmtx
 IIR Filter design : eg. butter, besself
 FIR Filter design: eg. cremez
 IIR Filter order selection: eg. buttord
 Transforms: eg. dft, fft
 Statistical signal processing: eg. csd, pcov
 Windows: eg. boxcar, triang
 Parametric modeling: eg. invfreqz, lpc
 Specialized operations: eg. buffer, deconv
 Analog prototype design: eg. buttap, besselap
 Frequency translation: eg. lp2bs, lp2bp
 Filter discretization: eg. bilinear
 Interactive tools: eg. sptool
SONA COLLEGE OF TECHNOLOGY 7

Expt No: 1
Date:

GENERATION OF DISCRETE TIME SIGNALS

AIM:

To write MATLAB programs for the following discrete time signals.

1. Unit Impulse Function

2. Unit step function
3. Unit ramp function
4. Exponential function
5. Sine function
6. Cosine function
7. Sawtooth function
8. Square Function

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

PROGRAM 1:

%TO PLOT THE UNIT IMPULSE FUNCTION

s1=[zeros(1,20) 1 zeros(1,20)];
n1=-20:20;
subplot(2,2,1)
stem(n1,s1)
title('unit impulse function')
xlabel('time')
ylabel('amplitude')

%TO PLOT THE UNIT STEP FUNCTION

s2=[zeros(1,20) ones(1,21)];
n2=-20:20;
subplot(2,2,2)
stem(n2,s2)
title('UNIT STEP FUNCTION')
xlabel('TIME')
ylabel('AMPLITUDE')

%TO PLOT THE UNIT RAMP FUNCTION

s3=[zeros(1,20) 0:20];
n3=-20:20;
subplot(2,2,3)
stem(n3,s3)
SONA COLLEGE OF TECHNOLOGY 8

title('UNIT RAMP FUNCTION')

xlabel('TIME')
ylabel('AMPLITUDE')

%TO PLOT THE EXPONENTIAL FUNCTION

n4=0:0.01:1;
subplot(2,2,4)
stem(n4,exp(n4))
title('EXPONENTIAL FUNCTION')
xlabel('TIME')
ylabel('AMPLITUDE')
figure;

%TO PLOT THE SINE FUNCTION

t1=0:pi/16:2*pi;
y1=sin(t1);
subplot(2,2,1)
stem(t1,y1)
title('SINE FUNCTION')
xlabel('TIME')
ylabel('AMPLITUDE')

%TO PLOT THE COSINE FUNCTION

t2=0:pi/16:2*pi;
y2=cos(t2);
subplot(2,2,2)
stem(t2,y2)
title('COSINE FUNCTION')
xlabel('TIME')
ylabel('AMPLITUDE')

%TO PLOT THE SAWTOOTH FUNCTION

t3=0:0.1:5;
y3=sawtooth(2*pi*t3);
subplot(2,2,3)
stem(t3,y3)
title('SAWTOOTH FUNCTION')
xlabel('TIME'), ylabel('AMPLITUDE')

%TO PLOT THE SQUARE FUNCTION

t4=0:0.001:1;
y4=square(2*pi*30*t4);
subplot(2,2,4)
stem(t4,y4)
title('SQUARE FUNCTION')
xlabel('TIME'), ylabel('AMPLITUDE')
SONA COLLEGE OF TECHNOLOGY 9

OUTPUT
SONA COLLEGE OF TECHNOLOGY 10

RESULT

MATLAB programs to generate various sequences and waves were written and the results
were plotted.

Viva Questions

1.What is Matlab?
2.What is the advanced version Matlab available today?
3.Name the version of Matlab used in your laboratory
4.What is simulation
5.What is Implementation
6. Define stem
7.Define Plot
8.What is subplot
9.What is axis tight
10.What is the need for using ‗figure‘ in coding
SONA COLLEGE OF TECHNOLOGY 11

Expt No: 2
Date:
CONVOLUTION
LINEAR

AIM:
To write MATLAB programs for the following:

1.Linear convolution
2.Circular convolution

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

THEORY:
Convolution sum is defined as the response of an LTI system to an arbitrary input.
Mathematically it is denoted as


y ( n)   x ( k ) h( n  k )
k 
where h(n) is the impulse response of the system.
Any input signal can be resolved into a set of weighted impulses. Convolution sum is
nothing else but the corresponding sum of the weighted inputs. We say that the input signal x(n) is
convolved with the impulse response to yield the output sequence.

Convolution follows some properties namely:-

 Commutative : x(n) * h(n) = h(n) * x(n)
 Associative : [x(n) * h1(n)]* h2(n) = x(n) * [h1(n) * h2(n)]
 Distributive : x(n) * [h1(n) + h2(n)] = x(n) * h1(n) + x(n) + h2(n)
(Here ‗*‘ denotes convolution)

There are four different types of convolution

1. Linear convolution: This is the convolution just described. Here it is not necessary that the
two sequences be of same length. The output sequence will have a length of N1+N2-1
where N1 and N2 are the lengths of the two input sequences.
2. Circular convolution: This is for periodic sequences. Here it is necessary that the two
input sequences be of the same length.
SONA COLLEGE OF TECHNOLOGY 12

Linear Convolution
PROGRAM :

Clc;
Close all;
Clear all;

x=input('Enter the first sequence x(n):');

subplot(3,1,1);
stem(x);
title(' Input sequence x(n)');
xlabel('Time Axis');
ylabel('Amplitude');

h=input('Enter the second sequence h(n):');

subplot(3,1,2);
stem(h);
title(' Input sequence h(n)');
xlabel('Time Axis');
ylabel('Amplitude');

y=conv (x,h);
subplot(3,1,3)
stem(y);
title(' Output sequence y(n)');
xlabel('Time Axis');
ylabel('Amplitude');
disp (‗ The resultant signal is‘) ; y

Circular Convolution

Clc;
Close all;
Clear all;

g=input('Enter the first sequence g(n):');

subplot(3,1,1);
stem(g);
title(' Input sequence g(n)');
xlabel('Time Axis');
ylabel('Amplitude');

h=input('Enter the second sequence h(n):');

subplot(3,1,2);
SONA COLLEGE OF TECHNOLOGY 13

stem(h);
title(' Input sequence h(n)');
xlabel('Time Axis');
ylabel('Amplitude');
NI=length (g);
N2=length (h);
N=max (N1,N2);
N3=N1-N2;

% Loop for getting equal sequence

If (N3>= 0)

h=[h,zeros(1,N3)];
else
g=[g,zeros(1,-N3)];
end

% Computation of circular convolution

For n=1:N,
y(n)=0;
For i=1:N,
j=n-i+1;
if (j<=0)
j=N+j;
end
y(n)=y(n)+g(i)*h(j)
end
end
disp (‗The resultant signal is‘) ; y
SONA COLLEGE OF TECHNOLOGY 14

Linear Convolution Output:

SONA COLLEGE OF TECHNOLOGY 15

Circular Convolution Output:

SONA COLLEGE OF TECHNOLOGY 16

RESULT:

MATLAB programs for linear and circular convolution has been written and the results
were plotted.

Viva Questions

1.Define Convolution
2.What is Linear Convolution
3.What is Circular Convolution
4.What are the basic steps involved in convolution
5.What is zero padding
6.What about the length of output in linear convolution
7.What about the length of output in circular convolution
8.What is the meaning of ‗disp‘ in program
9.What are the types of correlation
SONA COLLEGE OF TECHNOLOGY 17

Expt No: 3
Date:
Auto and Cross Correlation
AIM:
To write a MATLAB programs for Auto and Cross Correlation

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

PROGRAM

Auto Correlation

x = input ( ‗ enter the sequence‘ ) ;

y = xcorr ( x, x ) ;
figure ; subplot ( 2, 1, 1 );
stem ( x ) ; ylabel ( ‗ Amplitude - - > ‗ ) ;
xlabel ( ‗ ( a ) n - - > ‗ ) ;
subplot ( 2, 1, 2 ) ;
stem ( fliplr ( y ) ) ; ylabel ( ‗Amplitude - - > ‗ ) ;
xlabel ( ‗ ( a ) n - - > ‗ ) ;
disp ( ‗ The resultant signal is ‗ ) ; fliplr ( y )

Cross Correlation

clc ;
clear all ;
close all ;
x = input ( ‗ enter the 1st sequence ‗ ) ;
h = input ( ‗ enter the 2nd sequence ‗ ) ;
y = xcorr ( x, h ) ;
figure ; subplot ( 3, 1, 1 );
stem ( x ) ; ylabel ( ‗ Amplitude - - > ‗ ) ;
xlabel ( ‗ ( a ) n - - > ‗ ) ;
subplot ( 3, 1, 2 ) ;
stem ( h ) ; ylabel ( ‗Amplitude - - > ‗ ) ;
xlabel ( ‗ ( b ) n - - > ‗ ) ;
subplot ( 3, 1, 3 );
stem ( fliplr ( y ) ) ; ylabel ( ‗Amplitude - - > ‗ ) ;
xlabel ( ‗ ( c ) n - - > ‗ ) ;
disp ( ‗ The resultant signal is ‗ ) ; fliplr ( y )

RESULT:

MATLAB program for Auto and Cross Correlation has been written and verified
SONA COLLEGE OF TECHNOLOGY 18

Expt No: 4
Date:

SAMPLING AND EFFECT OF ALIASING

AIM:

To write MATLAB programs for sampling and to show the effect of aliasing

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

PROGRAM

clear; close all; clc;

T=5;
Np=512;
t=linspace(0,T,Np+1);
f=2;
x=sin(2* pi * f * t);

N=8;
Ts=T/N;
fs=1/Ts;
ts=Ts * (0:N-1);
xs=sin(2* pi * f * ts);
n=round(f/fs);
fapp=f-n * fs;
xa=sin(2 * pi * fapp * t);
figure;
plot(t, x, ‗r-‗, ts, xs, ‗b*‘ , t, xa, ‗m-‗);
title(‗Signal sampling at 1.6 Hz‘);
axis tight;
xlabel(‗Time‘);
ylabel(‗Signal value‘);

N=16;
Ts=T/N;
fs=1/Ts;
ts=Ts*(0:N-1);
xs=sin(2 * pi * f * ts);
n=round(f/fs);
fapp=f-n * fs;
SONA COLLEGE OF TECHNOLOGY 19

xa=sin(2 * pi * fapp * t);

figure;
plot(t, x, ‗r-‗, ts, xs, ‗b*‘ , t, xa, ‗m-‗);
title(‗Signal sampling at 3.2 Hz‘);
axis tight;
xlabel(‗Time‘);
ylabel(‗Signal value‘);

N=32;
Ts=T/N;
fs=1/Ts;
ts=Ts * (0:N-1);
xs=sin(2 * pi * f * ts);
n=round(f / fs);
fapp=f-n * fs;
xa=sin(2 * pi * fapp * t);
figure;
plot(t, x, ‗r-‗, ts, xs, ‗b*‘ , t, xa, ‗m-‗);
title(‗Signal sampling at 6.4 Hz‘);
axis tight;
xlabel(‗Time‘);
ylabel(‗Signal value‘);

Graph
SONA COLLEGE OF TECHNOLOGY 20
SONA COLLEGE OF TECHNOLOGY 21

RESULT:

MATLAB program for sampling at various frequency has been written and the aliasing
effect was verified

Viva Questions

1. Define Sampling
2. Define Aliasing
3. Define Nyquist rate
4. What is the meaning of linspace
5. What is axis tight
6. Define Interpolation
7. Define Decimation
8. What id multi rate signal processing
9. What are types of sampling
10. How to avoid aliasing effect
SONA COLLEGE OF TECHNOLOGY 22

Expt No: 5
Date:

DESIGN OF DIGITAL FIR FILTERS

AIM:

To write MATLAB programs for the design of FIR filters

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

THEORY:

A filter is defined as a system that selectively changes the frequency characteristics of a

signal. It is used to improve the quality of the signal by reducing the amount of noise present in the
signal.
Impulse response of a system is defined as the response of the system when an impulse
sequence is given as the input. We can therefore divide the class of linear time invariant systems
into two types, those that have a finite duration impulse response and those that have an infinite
duration impulse response. Those that belong to the first category are known as finite impulse
response or FIR system. Thus an FIR system has an impulse response that is zero outside of some
finite time interval. An FIR filter is defined by the equation

M 1
y (n)   bk x(n  k )
k 0

Those that belong to the second category are known as infinite impulse response or IIR system.
It is defined by the equation

N 1 M 1
y(n)   ak y(n  k )   bk x(n  k )
k 1 k 0

Digital filters play a very important role in DSP. Compared to analog filters, they are preferred in a
number of applications because of the advantages it provides over the analog counterpart. Some of
the typical advantages are
SONA COLLEGE OF TECHNOLOGY 23

 Digital filters have characteristics that are not possible with analog filters such as true
linear phase.
 Unlike the analog filters the performance of the digital filters does not vary with
environmental changes for example thermal variations.
 Several input signals or channels can be filtered by one digital filter without the need to
replicate the hardware.
 Both the filtered and unfiltered data can be saved for further use.
 Digital filters can be used at very low frequencies. Hence they find very wide use in
biomedical applications.

An FIR filter has only zeros and no poles. Hence the system is always stable. Another
important characteristic is that they provide linear phase. Thus the FIR filters are the ones widely
used. Different methods for design of Fir filters include the window method, frequency sampling
method and the minimax method.
An IIR filter on the other hand contains both poles and zeros. Hence the system tends to be
unstable. They also do not provide linear phase. But they require lesser number of computations
than an FIR filter of the same order thus leading to lesser memory requirements. They give a
sharper cutoff rate than an FIR filter. To design an IIR filter we go for the impulse invariance
method or the bilinear transformation method.

PROGRAM 1:
%PROGRAM TO IMPLEMENT AN FIR FILTER USING WINDOW METHOD

clear; close all; clc;

N=10;
fc =200;
fs=5*fc
Wn=fc/fs;
b=fir1(N-1, Wn, window(@hamming, N));
figure;
freqz(b,1,fc,fs);
title(‗Frequency Response‘);
[h w] = freqz(b, 1,512);
Db=20*log10(h);
figure;
plot (w/pi, real(Db)); grid;
title(‗Magnitude Response of a normalized filter‘);
xlabel (‗ Normalised frequency‘);
ylabel(‗Gain‘);
SONA COLLEGE OF TECHNOLOGY 24

GRAPH:
SONA COLLEGE OF TECHNOLOGY 25

RESULT:

Matlab program for the design of FIR filters were written and executed.

Viva Questions

1.Define Filter
2.What is FIR filter
3.What is the transfer function of FIR filter
4.Differentiate FIR and IIR filter
5.What are the properties of FIR filter
6.What is Linear phase FIR filter
7. What are the desirable characteristics of the window.
8. What are the advantages of Kaiser window.
10.What are the advantages and disadvantages of FIR filter
11.What are the techniques to design FIR filter
12.State the condition for a digital filter to be causal and stable
13.Draw the direct form realization of FIR system
14.What are the disadvantages of Fourier series method
15.What is Gibb‘s phenomenon
16.What is window and why it is necessary?
17.Give the equation specifying Hamming and Hanning, window
18. Give the equation specifying Bartlett and Blackman window
19.Compare Hamming window with Kaiser window
20.Give the equation specifying Kaiser window
21.What are the advantages of Kaiser window
22.What is the principle of designing FIR filters using frequency sampling method.
SONA COLLEGE OF TECHNOLOGY 26

Expt No: 6
Date:

DESIGN OF DIGITAL IIR FILTERS

AIM:

To write MATLAB programs for the design of IIR butterworth filters

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

THEORY:

A filter is defined as a system that selectively changes the frequency characteristics of a

signal. It is used to improve the quality of the signal by reducing the amount of noise present in the
signal.
Impulse response of a system is defined as the response of the system when an impulse
sequence is given as the input. We can therefore divide the class of linear time invariant systems
into two types, those that have a finite duration impulse response and those that have an infinite
duration impulse response. Those that belong to the first category are known as finite impulse
response or FIR system. Thus an FIR system has an impulse response that is zero outside of some
finite time interval. An FIR filter is defined by the equation

M 1
y (n)   bk x(n  k )
k 0

Those that belong to the second category are known as infinite impulse response or IIR system.
It is defined by the equation

N 1 M 1
y(n)   ak y(n  k )   bk x(n  k )
k 1 k 0

Digital filters play a very important role in DSP. Compared to analog filters, they are preferred in a
number of applications because of the advantages it provides over the analog counterpart. Some of
the typical advantages are

 Digital filters have characteristics that are not possible with analog filters such as true
linear phase.
 Unlike the analog filters the performance of the digital filters does not vary with
environmental changes for example thermal variations.
SONA COLLEGE OF TECHNOLOGY 27

 Several input signals or channels can be filtered by one digital filter without the need to
replicate the hardware.
 Both the filtered and unfiltered data can be saved for further use.
 Digital filters can be used at very low frequencies. Hence they find very wide use in
biomedical applications.

An IIR filter on the other hand contains both poles and zeros. Hence the system tends to be
unstable. They also do not provide linear phase. But they require lesser number of computations
than an FIR filter of the same order thus leading to lesser memory requirements. They give a
sharper cutoff rate than an FIR filter. To design an IIR filter we go for the impulse invariance
method or the bilinear transformation method.

%PROGRAM TO ILLUSTRATE THE DESIGN OF BUTTERWORTH FILTERS

clear; close all; clc;

fp=25;
fs=75;
f=[fp fs];
Fs = 5*max(f);
Rp=3;
Rs=60;
Wp=2*fp/Fs;
Ws=2*fs/Fs;
[N,wn]=buttord(Wp,Ws,Rp,Rs);
[B,A]=butter(N,Wn);
Figure;
freqz(B,A);
title(‗ Frequency Response‘);
[h,w]=freqz(B,A,fp,Fs);
Db=20*log 10(h);
figure;
plot(w/pi, real(Db));
grid;
title(‗Magnitude Response of a normalized filter‘);
xlabel (‗ Normalised frequency‘);
ylabel(‗Gain‘);
SONA COLLEGE OF TECHNOLOGY 28

GRAPH:
SONA COLLEGE OF TECHNOLOGY 29

RESULT:

Matlab program for the design of butterworth filters were written and executed.

Viva Questions

1. Give any two properties of Butterworth low pass filter.

2. What are the properties of Chebyshev filter?
3. Give the Chebyshev filter transfer function and its magnitude response.
4. Give the Butterworth filter transfer function and its magnitude response.
5. Distinguish between the frequency response of Chebyshev type I and type II filters.
6. Distinguish between Butterworth and Chebyshev filter.
7. Give the expression for location of poles of Butterworth filter.
8. What is the matched Z-transformation?
9. What is meant by impulse invariant method of designing IIR filter.
10. What is Bilinear transformation.
11. Give the bilinear transform equation between s-plane and z-plane.
12.What is warping effect?
13. Draw the general realization structure in direct form-I of IIR system.
14. Draw the cascade structure direct form II realization of 6th order filter.
15. Why impulse invariant method is not preferred in the design of IIR filter other than
lowpass filter.
16. Mention any two procedure for digitizing the transfer function of an analog filter
SONA COLLEGE OF TECHNOLOGY 30

Expt No: 7
Date:

DISCRETE FOURIER TRANSFORM COMPUTATION

AIM:

To write MATLAB programs for Discrete Fourier Transform

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

THEORY:

Fourier Transform gives the representation of the signal in the frequency domain. We can
know of the frequency components present in the signal. A finite duration sequence x(n) of length
L has a Fourier transform

L 1
X ( w)   x(n)e jwn
n 0

When we sample X(w) at equally spaced frequencies wk  2 k / N

the resultant samples are

N 1
X (k )   x(n)e j 2 kn / N
n 0

This relation is a formula for transforming a sequence x(n) of length L<=N into a sequence
of frequency samples X(k) of length N. Since the frequency samples are obtained by evaluating the
Fourier transform X(w) at a set of N(equally spaced) discrete frequencies, the above relation is
called the Discrete Fourier Transform (DFT).

The inverse DFT is given by the equation

The notation used to denote the N point DFT pair x(n) and X(k) is
DFT
x(n)X(k)
N
Convolution of two signals in the times domain corresponds to the multiplication in the
frequency domain.
SONA COLLEGE OF TECHNOLOGY 31

DFT
x1(n) * x2(n)  X1(k).X2(k) (‗*‘ denotes convolution)
N

From the formula of DFT let us try to evaluate the number of computations required. To
calculate a single point DFT we need N multiplications and (N-1) additions. For N values therefore
we‘ll require N2 multiplications and N(N-1) additions. If N happens to be a large number, the
number of computations required will become enormous.

The Fast Fourier Transform (FFT) is a computationally efficient algorithm for evaluating
the DFT. There are various algorithms for the DFT, the most common one being the radix-2
algorithm. Using the radix-2 algorithm we can bring down the required number of multiplications
to N/2 log 2 N and the required number of additions to
N log 2 N. The FFT makes use of the symmetry and periodicity property of the twiddle factor
which the DFT does not make use of.

Symmetry property : WNk  N / 2  WNk

Periodicity property : WNk  N  WNk

FFT algorithms find application in a variety of areas, including linear filtering, correlation,
and spectrum analysis. It is because of the FFT that DFT became popular.
SONA COLLEGE OF TECHNOLOGY 32

%PROGRAM TO ILLUSTRATE DFT COMPUTATION

clear; close all; clc;

x=1:8;
N=length(x);
for k=1:N
X(K)=0;
for n=1:N
X(k)= X(K) + x(n) *( cos(2*pi*(n-1)*(k-1)/N)-isin(2*pi*(n-1)*(k-1)/N) );
end
end
disp(X‘)
stem (1:N, real(X));
grid;
title(‗Real (X)‘);
xlabel(‗Frequency‘);
ylabel(‗Magnitude‘);
figure;
stem (1:N, imag(X));
grid;
title(‗Imag (X)‘);
xlabel(‗Frequency‘);
ylabel(‗Magnitude‘);

FFT

clear; close all; clc;

x=input (‗enter the sequence‘);
n=input(‗enter the length of fft‘);
y = fft(x,n);
Stem (y);
ylabel(‗Imaginary axis‘);
xlabel(‗Real axis‘);
y
SONA COLLEGE OF TECHNOLOGY 33

GRAPH:

DFT
SONA COLLEGE OF TECHNOLOGY 34

FFT

y=

Columns 1 through 3

20.0000 -5.8284 - 2.4142i 0

Columns 4 through 6

-0.1716 - 0.4142i 0 -0.1716 + 0.4142i

Columns 7 through 8

0 -5.8284 + 2.4142i

RESULT:

A MATLAB program to compute the 8 point DFT of a given sequence was written and the result
was plotted.
SONA COLLEGE OF TECHNOLOGY 35

Viva Questions

1.Define N point DFT

2. Define N point IDFT
3.List the properties of DFT
4.Compute the DFT of x(n)=S(n-no)
5. Compute the DFT of x(n)=an
6.Find the DFT of causal 3-sample averager
7. Find the DFT of non-causal 3-sample averager
8. Find the DFT of the sequence x(n)=(1,1,0,0)
9.Establish the relation between DFT and Z Transform
10.What is Zero padding? What are its uses?
11. Distinguish between DFT and DTFT
12.Why FFT is needed?
13.What is the speed improvement factor in calculating 64 point DFT using FFT algorithm
14.Calculate the no of multiplication and addition in DFT and FFT
15.What is FFT
16. What is meant by Radix 2 FFT
17.What is Decimation in time algorithm
18. What is Decimation in frequency algorithm
19. Distinguish between DIT and DIF
20.What is Twiddle factor
SONA COLLEGE OF TECHNOLOGY 36

Expt No: 8
Date:

UP SAMPLING AND DOWN SAMPLING

AIM:

To write MATLAB programs for Up Sampling And Down Sampling

ESSENTIALS REQUIRED:

Hardware: IBM PC or compatible

Software : MATLAB v5.1 or higher

PROGRAM

UP SAMPLING

y=zeros (1, 1* length (x) );

y( [ 1:1: length (y) ] )= x;
figure (1)
stem (m,x);
xlabel ({ ‗ Time n‘ ; ‘(a)‘ } );
ylabel ( ‗Amplitude‘ );
figure (2)
stem (m, y (1 : length (x) ) );
xlabel ( { ‗ Time n‘ ; ‘(b)‘ } );
ylabel ( ‗Amplitude‘ );

DOWN SAMPLING

y = x ( [ 1: M : length (x) ] ) ;
% plot the input sequence
subplot ( 2, 1, 1 ) ;
stem ( n, x ( 1 : N ) ) ;
title ( ‗Input Sequence ‗ ) ;
xlabel ( ‗ Time n‘ ) ;
ylabel ( ‗ Amplitude‘ ) ;
% plot the down sampled signal sequence
subplot ( 2, 1, 2 ) ;
stem (n, y ) ;
title ( [ ‗ Output sequence down sampling factor‘ , num2str ( M ) ] ) ;
xlabel ( ‗ Time n‘ ) ;
ylabel ( ‗ Amplitude‘ ) ;
SONA COLLEGE OF TECHNOLOGY 37

RESULT:

A MATLAB program for up sampling and down sampling were written and the result were
plotted.

STUDY OF TMS 320C54 ARCHITECTURE

Study of TMS 320C50 Architecture

The ‘54x DSPs use an advanced, modified Harvard architecture that maximizes processing
power by maintaining one program memory bus and three data memory buses. These processors
also provide an arithmetic logic unit (ALU) that has a high degree of parallelism, application-
specific hardware logic, on-chip memory, and additional on-chip peripherals. These DSP families
also provide a highly specialized instruction set, which is the basis of the operational flexibility
and speed of these DSPs. Separate program and data spaces allow simultaneous access to program
instructions and data, providing the high degree of parallelism. Two reads and one write operation
can be performed in a single cycle. Instructions with parallel store and application-specific
SONA COLLEGE OF TECHNOLOGY 38

instructions can fully utilize this architecture. In addition, data can be transferred between data and
program spaces. Such parallelism supports a powerful set of arithmetic, logic, and bit-manipulation
operations that can all be performed in a single machine cycle. Also included are the control
mechanisms to manage interrupts, repeated operations, and function calls.
Central Processing Unit (CPU)
The CPU of the ‘54x devices contains:
A 40-bit arithmetic logic unit (ALU)
Two 40-bit accumulators
A barrel shifter
A 17 × 17-bit multiplier/adder
A compare, select, and store unit (CSSU)

Arithmetic Logic Unit (ALU)

The ‘54x devices perform 2s-complement arithmetic using a 40-bit ALU and two 40-bit
accumulators (ACCA and ACCB). The ALU also can perform Boolean operations. The ALU can
function as two 16-bit ALUs and perform two 16-bit operations simultaneously when the C16 bit
in status register 1 (ST1) is set.

Accumulators
The accumulators, ACCA and ACCB, store the output from the ALU or the multiplier /
adder block; the accumulators can also provide a second input to the ALU or the multiplier / adder.
The bits in each accumulator is grouped as follows:
Guard bits (bits 32–39)
A high-order word (bits 16–31)
A low-order word (bits 0–15)
Instructions are provided for storing the guard bits, the high-order and the low-order accumulator
words in data memory, and for manipulating 32-bit accumulator words in or out of data memory.
Also, any of the accumulators can be used as temporary storage for the other.

Barrel Shifter
The ‘54x‘s barrel shifter has a 40-bit input connected to the accumulator or data memory
(CB, DB) and a 40-bit output connected to the ALU or data memory (EB). The barrel shifter
produces a left shift of 0 to 31 bits and a right shift of 0 to 16 bits on the input data. The shift
requirements are defined in the shift-count field (ASM) of ST1 or defined in the temporary register
SONA COLLEGE OF TECHNOLOGY 39

(TREG), which is designated as a shift-count register. This shifter and the exponent detector
normalize the values in an accumulator in a single cycle. The least significant bits (LSBs) of the
output are filled with 0s and the most significant bits (MSBs) can be either zero-filled or sign-
extended, depending on the state of the sign-extended mode bit (SXM) of ST1. Additional shift
capabilities enable the processor to perform numerical scaling, bit extraction, extended arithmetic,
and overflow prevention operations.

Multiplier/Adder
The multiplier / adder performs 17 × 17-bit 2s-complement multiplication with a 40-bit
accumulation in a single instruction cycle. The multiplier / adder block consists of several
elements: a multiplier, adder, signed/unsigned input control, fractional control, a zero detector, a
rounder (2s-complement), overflow/saturation logic, and TREG. The multiplier has two inputs:
one input is selected from the TREG, a data-memory operand, or an accumulator; the other is
selected from the program memory, the data memory, an accumulator, or an immediate value. The
fast on-chip multiplier allows the ‘54x to perform operations such as convolution, correlation, and
filtering efficiently. In addition, the multiplier and ALU together execute multiply/accumulate
(MAC) computations and ALU operations in parallel in a single instruction cycle. This function is
used in determining the Euclid distance, and in implementing symmetrical and least mean square
(LMS) filters, which are required for complex DSP algorithms.

Compare, Select, and Store Unit (CSSU)

The compare, select, and store unit (CSSU) performs maximum comparisons between the
accumulator‘s high and low words, allows the test/control (TC) flag bit of status register 0 (ST0)
and the transition (TRN) register to keep their transition histories, and selects the larger word in the
accumulator to be stored in data memory. The CSSU also accelerates Viterbi-type butterfly
computation with optimized on-chip hardware.

Program Control
Program control is provided by several hardware and software mechanisms:
The program controller decodes instructions, manages the pipeline, stores the status of
operations, and decodes conditional operations. Some of the hardware elements included in the
program controller are the program counter, the status and control register, the stack, and the
address-generation logic.
SONA COLLEGE OF TECHNOLOGY 40

Some of the software mechanisms used for program control include branches, calls,
conditional instructions, a repeat instruction, reset, and interrupts.

The ‘54x supports both the use of hardware and software interrupts for program control.
Interrupt service routines are vectored through a relocatable interrupt vector table. Interrupts can
be globally enabled/disabled and can be individually masked through the interrupt mask register
(IMR). Pending interrupts are indicated in the interrupt flag register (IFR). For detailed
information on the structure of the interrupt vector table, the IMR and the IFR, see the device-
specific data sheets.

Status Registers (ST0, ST1)

The status registers, ST0 and ST1, contain the status of the various conditions and modes
for the ‘54x devices. ST0 contains the flags (OV, C, and TC) produced by arithmetic operations
and bit manipulations in addition to the data page pointer (DP) and the auxiliary register pointer
(ARP) fields. ST1 contains the various modes and instructions that the processor operates on and
executes.
Auxiliary Registers (AR0–AR7)
The eight 16-bit auxiliary registers (AR0–AR7) can be accessed by the central airthmetic
logic unit (CALU) and modified by the auxiliary register arithmetic units (ARAUs). The primary
function of the auxiliary registers is generating 16-bit addresses for data space. However, these
registers also can act as general-purpose registers or counters.
Temporary Register (TREG)
The TREG is used to hold one of the multiplicands for multiply and multiply/accumulate
instructions. It can hold a dynamic (execution-time programmable) shift count for instructions with
a shift operation such as ADD, LD, and SUB. It also can hold a dynamic bit address for the BITT
instruction. The EXP instruction stores the exponent value computed into the TREG, while the
NORM instruction uses the TREG value to normalize the number. For ACS operation of Viterbi
decoding, TREG holds branch metrics used by the DADST and DSADT instructions.
Transition Register (TRN)
The TRN is a 16-bit register that is used to hold the transition decision for the path to new
metrics to perform the Viterbi algorithm. The CMPS (compare, select, max, and store) instruction
updates the contents of the TRN based on the comparison between the accumulator high word and
the accumulator low word.
Stack-Pointer Register (SP)
SONA COLLEGE OF TECHNOLOGY 41

The SP is a 16-bit register that contains the address at the top of the system stack. The SP
always points to the last element pushed onto the stack. The stack is manipulated by interrupts,
traps, calls, returns, and the PUSHD, PSHM, POPD, and POPM instructions. Pushes and pops of
the stack predecrement and postincrement, respectively, all 16 bits of the SP.

Circular-Buffer-Size Register (BK)

The 16-bit BK is used by the ARAUs in circular addressing to specify the data block size.
Block-Repeat Registers (BRC, RSA, REA)
The block-repeat counter (BRC) is a 16-bit register used to specify the number of times a
block of code is to be repeated when performing a block repeat. The block-repeat start address
(RSA) is a 16-bit register containing the starting address of the block of program memory to be
repeated when operating in the repeat mode. The 16-bit block-repeat end address (REA) contains
the ending address if the block of program memory is to be repeated when operating in the repeat
mode.
Interrupt Registers (IMR, IFR)
The interrupt-mask register (IMR) is used to mask off specific interrupts individually at
required times. The interrupt-flag register (IFR) indicates the current status of the interrupts. 1.2.16
Processor-Mode Status Register (PMST) The processor-mode status register (PMST) controls
memory configurations of the ‘54x devices.
Power-Down Modes
There are three power-down modes, activated by the IDLE1, IDLE2, and IDLE3
instructions. In these modes, the ‘54x devices enter a dormant state and dissipate considerably less
power than in normal operation. The IDLE1 instruction is used to shut down the CPU. The IDLE2
instruction is used to shut down the CPU and on-chip peripherals. The IDLE3 instruction is used to
shut down the ‘54x processor completely. This instruction stops the PLL circuitry as well as the
CPU and peripherals.

Bus Structure
The ‘54x device architecture is built around eight major 16-bit buses: One program-read
bus (PB) which carries the instruction code and immediate operands from program memory
Two data-read buses (CB, DB) and one data-write bus (EB), which interconnect to various
elements, such as the CPU, data-address generation logic (DAGEN), program-address generation
logic (PAGEN), on-chip peripherals, and data memory The CB and DB carry the operands read
SONA COLLEGE OF TECHNOLOGY 42

from data memory. The EB carries the data to be written to memory. Four address buses (PAB,
CAB, DAB, and EAB), which carry the addresses needed for instruction execution

Memory
The minimum memory address range for the ‘54x devices is 192K words — composed of
64K words in program space, 64K words in data space, and 64K words in I/O space. Selected
devices also provide extended program memory space of up to 8M words. The program memory
space contains the instructions to be executed as well as tables used in execution. The data memory
space stores data used by the instructions. The I/O memory space interfaces to external memory-
mapped peripherals and can also serve as extra data storage space. The ‘54x DSPs provide both
on-chip RAM and ROM to improve system performance and integration. Table 1–3 shows the on-
chip memory options available on the ‘54x family of devices.

On-Chip Peripherals
All the ‘54x devices have the same CPU structure; however, they have different on-chip
peripherals connected to their CPUs. The on-chip peripheral options provided are: Software-
programmable wait-state generator Programmable bank-switching Parallel I/O ports DMA
controller Host-port interface (standard 8-bit, enhanced 8-bit, and 16-bit) Serial ports
(standard, TDM, BSP, and McBSP) General-purpose I/O pins 16-bit timer with 4-bit
prescaler Phase-locked loop (PLL) clock generator

Result:
The TMS320C54 processor architecture and its internal features have been studied.
SONA COLLEGE OF TECHNOLOGY 43

Ex.No.7
Date :
Arithmetic Manipulations using ‘C54 Processor
Aim:
To write a assembly language program for the arithmetic operations like addition,
subtraction, multiplication and division using ‗C54 processor

Apparatus required:

Sl.NO Item Description Qty

1. DSK  54 LC 1
2. User Manual  50 LC 1
3. Serial Cable RS232C 1

ADDITION

FLOW CHART

Start

Variable Initialization

Load Accumulator with High word

Load Accumulator with Low word

Add the content of

Accumulator with the next
double word
Add the content of Accumulator
with the carry along with the next
higher double word

Store the content of the

accumulator in data memory

Stop
SONA COLLEGE OF TECHNOLOGY 44

Program

ADDITION

INP1 .SET 0H
INP2 .SET 1H
OUT .SET 2H
.mmregs
.text
START:
LD #140H,DP
RSBX CPL
NOP
NOP
NOP
NOP
LD INP1,A
ADD INP2,A
STL A,OUT
HLT: B HLT

Result

Input:
Data Memory:
A000h 0004h
A001h 0004h

Output:
Data Memory:
A002h 0008h
SONA COLLEGE OF TECHNOLOGY 45
SONA COLLEGE OF TECHNOLOGY 46

SUBTRACTION

FLOW CHART

Start

Variable Initialization

Load Accumulator with High word

Load Accumulator with Low word

Subtract the content of Accumulator

with the next double word

Subtract the content of

Accumulator with the carry along
with the next higher double word

Store the content of the

accumulator in data memory

Stop
SONA COLLEGE OF TECHNOLOGY 47

Program

INP1 .SET 0H
INP2 .SET 1H
OUT .SET 2H
.mmregs
.text
START:
LD #140H,DP
RSBX CPL
NOP
NOP
NOP
NOP
LD INP1,A
SUB INP2,A
STL A,OUT
HLT: B HLT

Input:
Data Memory:
A000h 0004h
A001h 0002h

Output:
Data Memory:
A002h 0002h

MULTIPLICATION
FLOW CHART
Start

Variable Initialization

Treg = X0

Multiply with Y0

Store the content of the

product register to
accumulator and then to
memory Stop
SONA COLLEGE OF TECHNOLOGY 48

Multiplication

.mmregs
.text
START:
STM #0140H,ST0 ;load DP
STM #40H,PMST
STM #0A000H,AR0 ;point AR0 to 9000h
ST #1H,*AR0 ;load 1st input to 9000h
LD *AR0+,T ;1st input to T- register
ST #2H,*AR0 ;2nd input to 9001h
MPY *AR0+,A ;multiply 2nd input with t-reg &store
STL A,*AR0 ;it in acc and 9002h
HLT: B HLT
.END

OUTPUT
A002H 2H

DIVISION

Division

DIVID .SET 0H
DIVIS .SET 1H
OUT .SET 2H
.mmregs
.text
START:
STM #140H,ST0
RSBX CPL
RSBX FRCT
NOP
NOP
NOP
NOP
LD DIVID,A ;dividend to acc
RPT #0FH
SUBC DIVIS,A ;A / DIVIS -> A
STL A,OUT ;result in 9002h
HLT: B HLT
.END

INPUT
DATA MEMORY
A000H 000AH
A001H 0002H

OUTPUT
A002H 0005H
SONA COLLEGE OF TECHNOLOGY 49

RESULT:

The assembly program for arithmetic operation has been written and the result was verified.

Viva Questions

1.What is DSP processor

2.What are the advantages of DSP processor TMS320C54
3.What are major blocks available in TMS320C54 processor
4.What is the memory capacity of TMS320C54 processor
5.How many accumulators available in TMS320C54 processor
6.What is ALU
7.What is Barrel shifter
8.What is MAC
9.What is Status register
10.What is Block repeat register
SONA COLLEGE OF TECHNOLOGY 50

Exp.No.8
Date:
SAMPLING
Aim:
To sample the given sine waveform at DAC channel 1 of C54 processor.

Apparatus Required:
Sl.NO Item Description Qty
1. DSK  54 LC 1
2. User Manual  54 LC 1
3. Serial Cable RS232C 1
4. Probes Crocodile type 2 set
5. CRO 1
6. Function Generator 1

PROGRAM

.mmregs
.text
STM #080H,AR0
BUSY:
STM #0100h,ST0
CHK_BUSY:
; PORTR 07,0
; BITF 0,#20H
; BC CHK_BUSY,TC
PORTR 6,0
CALL DELAY
PORTR 4,0
CALL DELAY
NOP
NOP
NOP
NOP
LD 0,A
AND #0FFFH,A
XOR #0800H,A
STL A,*AR0+
PORTW 0,04
B BUSY
DELAY:
STM #0FH,AR1
DEL1:
NOP
NOP
NOP
BANZ DEL1,*AR1-
RET
.END
SONA COLLEGE OF TECHNOLOGY 51

OUTPUT

RESULT:

The assembly program for sampling has been written and the output was obtained.

Viva Questions

1. Define Sampling
2. Define Aliasing
3. Define Nyquist rate
4. What is the meaning of linspace
5. What is axis tight
6. Define Interpolation
7. Define Decimation
8. What id multi rate signal processing
9. What are types of sampling
10. How to avoid aliasing effect
SONA COLLEGE OF TECHNOLOGY 52

Ex.No.9
Date:

IMPLEMENTATION OF FIR FILTERS

To write a assembly language program for the computation of FIR Low pass filters & high
pass filters using windows like Rectangular window, Hamming window, Hanning window,
Blackman window, Kaiser window, Triangular window.

Apparatus required:

Sl.NO Item Description Qty

1. DSK  50 LC 1
2. User Manual  50 LC 1
3. Serial Cable RS232C 1
4. Probes Crocodile type 2 set
5. CRO 1
6. Function Generator 1

The Window Definitions of various window types are listed below as a Table
Window Type Transition band or band width Minimum stopband attenuation
Rectangular 4/N  21 dB
Bartlet 8/N  25 dB
Hanning 8/N  43 dB
Hamming 8/N  53 dB
Blackmann 12/N  78 dB
Kaiser Variable Variable

The Low Pass Filter Equations of different window types are given below as a table

Window Type Window Function

Rectangular Window 1 0n  N
WR (n) or (n)  
0 otherwise
Hamming Window   2n  
(n)    (1  ) cos    , where  = 0.56
  N  1 
OR
  2n 
0.54  0.46 cos   0  n  N 1
Ham (n)    N 1 

 0 otherwise
Hanning Window   2n  
(n)    (1  ) cos    where  = 0.5
  N  1 
OR
  2n 
0.5  0.4cos   0  n  N 1
Han (n)    N 1 

 0 otherwise
SONA COLLEGE OF TECHNOLOGY 53

Kaiser Window   
2 
I0   1  2n 
  (N  1)  
   N 1   N 1 
w k (n)   n   
I0 ()  2   2 

Example Design
Low Pass Filter Design – Using Rectangular Window

Formula
Impulse Function

2 fc 
sin 2n fc '
fs , n0

H d (n)  
fs 2n fc  
fs

2 fc , n 0
 fs

Rectangular Window Function

1 0n  N
WR (n) or (n)  
0 otherwise

upon Simplification…
ie since h d (n)  WR (n)*Hd (n)
for n >0

  
 sin 2n fc
fs ,
h d (n)   n n 0



& for n = 0
h d (n)  2 fc
fs

Design an FIR Filter using rectangular window for the given filter order of 52 and the cut off
frequency is 4.00000Khz

Given:
fc = 4 KHz ; fs = 45Khz
N = 51 { n = 3.3 / f
= > f = 3.3 /N
f = 3.3 / 51 = 0.0647
Transition Width = f * fs
= 2.911Khz [Transition width = fSB - fPB
fSB – Stop Band Frequency
fPB – Pass Band Frequency
SONA COLLEGE OF TECHNOLOGY 54

Fc - fSB  fPB
2
Calculation:
h d (n)  WR (n)*Hd (n)

For n = 0

h d (n)  2 fc => 2 * (4 / 4.5) = 0.1777 [Q15 Format is = HEX (value * (65535 /2))]
fs
= 0.1777 *(65535 /2) = 16BEh
For n > 0

h d (1) 
sin 2 *1 4  45 => 0.16867 * 65535 /2 = 1596 h
 *1

h d (2) 
sin 2 *2 4  45 => 0.143047 * 65535 /2 = 124Fh
 *2
….
……

Similarly find the co-efficient for the given order…as we are using the filter design formulae for
symmetrical analysis, it is enough to calculate till 26 and the other half is duplicate in the opposite
direction.

Fill the co-efficient in the CTABLE for the further manipulations.

Follow the same method for designing all types of filters and verify the roll off using CRO.

LOW-PASS FILTER

; Filter type : FIR-LPF

; Window type : Rectangular window
; Sampling frequency : 41khz
; Cut-off frequency : 4khz
; No. of taps : 52
SONA COLLEGE OF TECHNOLOGY 55

.mmregs
.text
START:
STM #01h,ST0
RSBX CPL
RSBX FRCT
NOP
NOP
STM #150H,AR1
LD #0H,A
RPT #34H
STL A,*AR1+
LOOP:
PORTR 06,0
CHK_BUSY:
; PORTR 07,0
; BITF 0,#20H
; BC CHK_BUSY,TC
PORTR 04,0
LD 0,A
AND #0FFFH,A
XOR #0800H,A
SUB #800H,A
STM #150H,AR1
STL A,*AR1
STM #183H,AR2
LD #0H,A
RPT #33H
MACD *AR2-,TABLE,A
STH A,1,0H
LD 0H,A
ADD #800H,A
STL A,1H
PORTW 1H,04H
B LOOP
;fs = 41khz ; fc = 4khz ; N = 52
TABLE:
.word 01FH
.word 010EH
.word 01ABH
.word 01B4H
.word 0117H
.word 0H
.word 0FECDH
.word 0FDEEH
.word 0FDC2H
.word 0FE6EH
.word 0FFCDH
.word 016FH
SONA COLLEGE OF TECHNOLOGY 56

.word 02C0H
.word 0333H
.word 0274H
.word 097H
.word 0FE19H
.word 0FBCBH
.word 0FA9BH
.word 0FB53H
.word 0FE50H
.word 0362H
.word 09C5H
.word 01048H
.word 01599H
.word 01895H
.word 01895H
.word 01599H
.word 01048H
.word 09C5H
.word 0362H
.word 0FE50H
.word 0FB53H
.word 0FA9BH
.word 0FBCBH
.word 0FE19H
.word 097H
.word 0274H
.word 0333H
.word 02C0H
.word 016FH
.word 0FFCDH
.word 0FE6EH
.word 0FDC2H
.word 0FDEEH
.word 0FECDH
.word 0H
.word 0117H
.word 01B4H
.word 01ABH
.word 010EH
.word 01FH
SONA COLLEGE OF TECHNOLOGY 57

HIGH PASS FIR FILTER

; Sampling freq : 43khz

; Cut-off freq : 2khz
;N : 52
; Filter type : High pass filter
; Window type : Rectangular

; Program Description:

; 1. Make all the x(n) zero initially

; 2. Read the data from the adc.
; 3. Store the adc data in x(0)
; 4. Make the pointer to point the x(n_end)
; 5. Perform the convolution of x(n) and the coefficients h(n) using
; MACD instruction.
; 6. Send the convolution output to the dac
; 7. Repeat from step 2.

.mmregs
.text
START:
STM #01h,ST0 ;intialize the data page pointer
RSBX CPL ;Make the processor to work using DP
RSBX FRCT ;reset the fractional mode bit
NOP
NOP
;*****loop to make all x(n) zero initially*****
STM #150H,AR1 ;initialize ar1 to point to x(n)
LD #0H,A ;make acc zero
RPT #34H
STL A,*AR1+ ;make all x(n) zero
;*****to read the adc data and store it in x(0)*****
LOOP:
PORTR 06,0 ;start of conversion
CHK_BUSY:
; PORTR 07,0 ;check for busy
; BITF 0,#20H
; BC CHK_BUSY,TC
PORTR 04,0 ;read the adc data
LD 0,A
AND #0FFFH,A ;AND adc data with 0fffh for 12 bit adc
XOR #0800H,A ;recorrect the 2's complement adc data
SONA COLLEGE OF TECHNOLOGY 58

SUB #800H,A ;remove the dc shift

STM #150H,AR1 ;initialize ar1 with x(0)
STL A,*AR1 ;store adc data in x(0)
STM #183H,AR2 ;initialize ar2 with x(n_end)
;*****start of convolution*****
LD #0H,A ;sum is 0 initially
RPT #33H
MACD *AR2-,TABLE,A ;convolution process
STH A,1,0H
LD 0H,A
ADD #800H,A ;add the dc shift to the convolution output
STL A,1H
PORTW 1H,04H ;send the output to the dac
B LOOP

TABLE:
.word 0FCEFH
.word 62H
.word 0FD50H
.word 14AH
.word 0FE1BH
.word 28FH
.word 0FF11H
.word 3E5H
.word 0FFD1H
.word 4ECH
.word 0FFF5H
.word 54FH
.word 0FF28H
.word 4DAH
.word 0FD38H
.word 398H
.word 0FA2EH
.word 1DDH
.word 0F627H
.word 55H
.word 0F131H
.word 4BH
.word 0EA6DH
.word 568H
.word 0D950H
.word 459EH
.word 459EH
.word 0D950H
.word 568H
.word 0EA6DH
.word 4BH
.word 0F131H
.word 55H
.word 0F627H
SONA COLLEGE OF TECHNOLOGY 59

.word 1DDH
.word 0FA2EH
.word 398H
.word 0FD38H
.word 4DAH
.word 0FF28H
.word 54FH
.word 0FFF5H
.word 4ECH
.word 0FFD1H
.word 3E5H
.word 0FF11H
.word 28FH
.word 0FE1BH
.word 14AH
.word 0FD50H
.word 62H
.word 0FCEFH

TABULATION

Input Voltage: ---------------

Frequency Output Voltage Gain Gain(db)

SONA COLLEGE OF TECHNOLOGY 60

RESULT:

The assembly program for FIR Filter has been written and the output was obtained.

Designed cut off frequency : _____________

Obtained cut off frequency : _____________

Viva Questions

1.Define Filter
2.What is FIR filter
3.What is the transfer function of FIR filter
4.Differentiate FIR and IIR filter
5.What are the properties of FIR filter
6.What is Linear phase FIR filter
7. What are the desirable characteristics of the window.
8. What are the advantages of Kaiser window.
10.What are the advantages and disadvantages of FIR filter
11.What are the techniques to design FIR filter
12.State the condition for a digital filter to be causal and stable
13.Draw the direct form realization of FIR system
14.What are the disadvantages of Fourier series method
15.What is Gibb‘s phenomenon
16.What is window and why it is necessary?
17.Give the equation specifying Hamming and Hanning, window
18. Give the equation specifying Bartlett and Blackman window
19.Compare Hamming window with Kaiser window
20.Give the equation specifying Kaiser window
21.What are the advantages of Kaiser window
22.What is the principle of designing FIR filters using frequency sampling method.
SONA COLLEGE OF TECHNOLOGY 61

Ex.No.10
Date:

IMPLEMENTATION OF IIR FILTERS

To write a assembly language program for the computation of IIR Low pass filters & high
pass filters.

Apparatus required:

Sl.NO Item Description Qty

1. DSK  50 LC 1
2. User Manual  50 LC 1
3. Serial Cable RS232C 1
4. Probes Crocodile type 2 set
5. CRO 1
6. Function Generator 1

PROGRAM

IIR LOW PASS FILTER

Filter type : Low pass filter

; Filter order :2
; Filter design type : Butterworth
; Pass band attenuation : 3db
; First corner freq : 0.2
; Second corner freq : 0.24
; Sampling freq : 50Khz
; Cut-off freq : 10Khz

;
; FROM PCDSP COEFFICIENTS
;
XN .SET 0H
XNM1 .SET 1H
XNM2 .SET 2H
YN .SET 3H
YNM1 .SET 4H
YNM2 .SET 5H
XN1 .SET 6H
XN1M1 .SET 7H
XN1M2 .SET 8H
YN1 .SET 9H
YN1M1 .SET 0AH
YN1M2 .SET 0BH
TEMP .SET 0CH
SONA COLLEGE OF TECHNOLOGY 62

A10 .SET 0100H

A11 .SET 0FFA2H
A12 .SET 0032H
B10 .SET 0100H
B11 .SET 0200H
B12 .SET 0100H

.mmregs
.text
START:
STM #40H,PMST
RSBX CPL
STM #01H,ST0
RSBX FRCT
NOP
NOP
NOP
;initialize xn,x(n-1),x(n-2),yn,y(n-1),y(n-2)
ST #0H,XN
ST #0H,XNM1
ST #0H,XNM2
ST #0H,YN
ST #0H,YNM1
ST #0H,YNM2
ST #0H,XN1
ST #0H,XN1M1
ST #0H,XN1M2
ST #0H,YN1
ST #0H,YN1M1
ST #0H,YN1M2
REPEAT:
;to read data from ADC
PORTR 06,20 ; start of conversion
CHK_BUSY: ; check status
; PORTR 07,20
; BITF 20,#20H
; BC CHK_BUSY,TC
PORTR 04,20 ; read ADC data
LD 20,A
AND #0FFFH,A
XOR #0800H,A ; to correct 2's complement
SUB #800H,A
STL A,XN ; xn
STL A,TEMP
;
LD #0H,B ; sum = B = 0
LD #B10,A ; b0 = T
STLM A,T
MPY XN,A ; b0*xn = A
SONA COLLEGE OF TECHNOLOGY 63

SFTL A,-8
ADD A,B ; b0*xn =B

LD #B11,A ; b0 = T
STLM A,T
MPY XNM1,A ; b0*xn = A
SFTL A,-8
ADD A,B ; b0*xn =B

LD #B12,A ; b0 = T
STLM A,T
MPY XNM2,A ; b0*xn = A
SFTL A,-8
ADD A,B ; b0*xn =B

LD #A11,A ; b0 = T
STLM A,T
MPY YNM1,A ; b0*xn = A
SFTL A,-8
SUB A,B ; b0*xn =B

LD #A12,A ; b0 = T
STLM A,T
MPY YNM2,A ; b0*xn = A
SFTL A,-8
SUB A,B ; b0*xn =B
STL B,YN
STL B,XN1

LD YNM1,A
STL A,YNM2
LD YN,A
STL A,YNM1
LD XNM1,A
STL A,XNM2
LD XN,A
STL A,XNM1

LD YN,A
ADD #800H,A
STL A,YN
PORTW YN,04H
B REPEAT

IIR HIGH PASS FILTER

;Filter type : High pass filter

;Filter order :2
;Filter design type : Butterworth
SONA COLLEGE OF TECHNOLOGY 64

; Pass band attenuation : 3db

; First corner freq : 0.2
; Second corner freq : 0.24
; Sampling freq : 50Khz
; Cut-off freq : 10Khz
;
;FROM PCDSP COEFFICIENTS
;
XN .SET 0H
XNM1 .SET 1H
XNM2 .SET 2H
YN .SET 3H
YNM1 .SET 4H
YNM2 .SET 5H
XN1 .SET 6H
XN1M1 .SET 7H
XN1M2 .SET 8H
YN1 .SET 9H
YN1M1 .SET 0AH
YN1M2 .SET 0BH
TEMP .SET 0CH
A10 .SET 0100H
A11 .SET 0FFEDH
A12 .SET 002CH
B10 .SET 0100H
B11 .SET 0FE00H
B12 .SET 0100H

.mmregs
.text
START:
STM #40H,PMST
RSBX CPL
STM #01H,ST0
RSBX FRCT
NOP
NOP
NOP
;initialize xn,x(n-1),x(n-2),yn,y(n-1),y(n-2)
ST #0H,XN
ST #0H,XNM1
ST #0H,XNM2
ST #0H,YN
ST #0H,YNM1
ST #0H,YNM2
ST #0H,XN1
ST #0H,XN1M1
ST #0H,XN1M2
ST #0H,YN1
SONA COLLEGE OF TECHNOLOGY 65

ST #0H,YN1M1
ST #0H,YN1M2
REPEAT:
;to read data from ADC
PORTR 06,20 ;start of conversion
CHK_BUSY: ;check status
; PORTR 07,20
; BITF 20,#20H
; BC CHK_BUSY,TC
PORTR 04,20 ;read ADC data
LD 20,A
AND #0FFFH,A
XOR #0800H,A ;to correct 2's complement
SUB #800H,A
STL A,XN ;xn
STL A,TEMP
;
LD #0H,B ;sum = B = 0
LD #B10,A ;b0 = T
STLM A,T
MPY XN,A ;b0*xn = A
SFTL A,-8
ADD A,B ;b0*xn =B

LD #B11,A ;b0 = T
STLM A,T
MPY XNM1,A ;b0*xn = A
SFTL A,-8
ADD A,B ;b0*xn =B

LD #B12,A ;b0 = T
STLM A,T
MPY XNM2,A ;b0*xn = A
SFTL A,-8
ADD A,B ;b0*xn =B

LD #A11,A ;b0 = T
STLM A,T
MPY YNM1,A ;b0*xn = A
SFTL A,-8
SUB A,B ;b0*xn =B

LD #A12,A ;b0 = T
STLM A,T
MPY YNM2,A ;b0*xn = A
SFTL A,-8
SUB A,B ;b0*xn =B
STL B,YN
STL B,XN1
SONA COLLEGE OF TECHNOLOGY 66

LD YNM1,A
STL A,YNM2
LD YN,A
STL A,YNM1
LD XNM1,A
STL A,XNM2
LD XN,A
STL A,XNM1

LD YN,A
ADD #800H,A
STL A,YN
PORTW YN,04H
B REPEA

TABULATION

Input Voltage: ---------------

Frequency Output Voltage Gain Gain(db)

SONA COLLEGE OF TECHNOLOGY 67

RESULT:

The assembly program for IIR Filter has been written and the output was obtained.

Designed cut off frequency : _____________

Obtained cut off frequency : _____________

Viva Questions

1. Give any two properties of Butterworth low pass filter.

2. What are the properties of Chebyshev filter?
3. Give the Chebyshev filter transfer function and its magnitude response.
4. Give the Butterworth filter transfer function and its magnitude response.
5. Distinguish between the frequency response of Chebyshev type I and type II filters.
6. Distinguish between Butterworth and Chebyshev filter.
7. Give the expression for location of poles of Butterworth filter.
8. What is the matched Z-transformation?
9. What is meant by impulse invariant method of designing IIR filter.
10. what is Bilinear transformation.
11. Give the bilinear transform equation between s-plane and z-plane.
12.What is warping effect?
13. Draw the general realization structure in direct form-I of IIR system.
14. Draw the cascade structure direct form II realization of 6th order filter.
15. Why impulse invariant method is not preferred in the design of IIR filter other than
lowpass filter.
16. Mention any two procedure for digitizing the transfer function of an analog filter
SONA COLLEGE OF TECHNOLOGY 68

Exp.No:11
Date:

LINEAR CONVOLUTION

Aim:
To write an assembly program for linear convolution using C54 processor.

Apparatus Required:

Sl.NO Item Description Qty

1. DSK  54 LC 1
2. User Manual  54 LC 1
3. Serial Cable RS232C 1

LINEAR CONVOLUTION

.mmregs
.text

START:
STM #40H,ST0
RSBX CPL
RSBX FRCT
NOP
NOP
NOP
NOP
STM #0A000H,AR0 ;AR0 for X(n)
STM #00100H,AR1 ;AR1 for H(n)
STM #0A020H,AR2 ;AR2 for temporary location
;temporary storage locations are initially zero

LD #0H,A
RPT #4H
STL A,*AR2+
STM #0A004H,AR0 ;padding of zeros after x(n)
LD #0H,A
RPT #5H
STL A,*AR0+
STM #0A000H,AR0
STM #0A020H,AR2
STM #0A030H,AR3 ;location for storing output Y(n)
STM #6H,BRC ;counter for number of Y(n)
RPTB CONV ;start of the program
LD *AR0+,A
SONA COLLEGE OF TECHNOLOGY 69

STM #0A020H,AR2
STL A,*AR2
STM #0A023H,AR2
LD #0H,A
RPT #3H
MACD *AR2-,0100H,A

CONV STL A,*AR3+

HLT: B HLT

;INPUT: X(n) DATA MEMORY

; 0A000 0001H
; 0A001 0003H
; 0A002 0001H
; 0A003 0003H

;INPUT: H(n) PROGRAM MEMORY

; 00100 0000H
; 00101 0001H
; 00102 0002H
; 00103 0001H

;OUTPUT Y(n) DATA MEMORY

; 0A030 0001
; 0A031 0005
; 0A032 0008
; 0A034 0008
; 0A035 0007
; 0A036 0003

RESULT:

The assembly program for linear convolution has been written and the output was verified.
SONA COLLEGE OF TECHNOLOGY 70

Viva Questions

1Define Convolution
2.What is Linear Convolution
3.What is Circular Convolution
4.What are the basic steps involved in convolution
5.What is correlation
6.What is zero padding
7.What about the length of output in linear convolution
8.What about the length of output in circular convolution
9.What is the meaning of ‗disp‘ in program
10.What are the types of correlation
SONA COLLEGE OF TECHNOLOGY 71

Exp.No.12
Date:
GENERATION OF SIGNALS
Aim:
To generate sine waveform, square waveform, triangle waveform and sawtooth waveform
at DAC channel 1 of C54 processor.

Apparatus Required:

Sl.NO Item Description Qty

1. DSK  54 LC 1
2. User Manual  54 LC 1
3. Serial Cable RS232C 1
4. Probes Crocodile type 2 set
5. CRO 1
6. Function Generator 1

PROGRAM
Sine wave generation

DATA .SET 0H
ADD .SET 1H
TABLE .SET 200H
.mmregs
.text
START:
STM #140H,ST0 ;initialize the data page pointer
RSBX CPL make the processor to work using DP
NOP
NOP
NOP
NOP
REP:
LD #TABLE,A ;Load the address first value of the sine
;table to the accumulator
STM #372,AR1 ;no. of sine table values
LOOP:
READA DATA ;read the sine table value
PORTW DATA,04H ;send it to the dac
ADD #1H,A ;increment the sine table address which
;is in the accumulator
BANZ LOOP,*AR1- ;repeat the loop until all 372 values has
;been sent
B REP ;repeat the above
SONA COLLEGE OF TECHNOLOGY 72

output

Square wave generation

DATA .SET 0H
.mmregs
.text
START:
STM #140H,ST0 ;initialize the data page pointer
RSBX CPL ;make the processor to work using DP
NOP
NOP
NOP
NOP
REP:
ST #0H,DATA ;send 0h to the dac
CALL DELAY ;delay for some time
ST #0FFFH,DATA ;send 0fffh to the dac
CALL DELAY ;delay for some time
B REP ;repeat the same
DELAY:
STM #0FFFH,AR1
DEL1:
PORTW DATA,04H
BANZ DEL1,*AR1-
RET
SONA COLLEGE OF TECHNOLOGY 73

OUTPUT
SONA COLLEGE OF TECHNOLOGY 74

TRIANGLE WAVE
DATA .SET 0H
.mmregs
.text

START:

STM #140H,ST0 ;initialize the data page pointer

RSBX CPL ;make the processor to work using DP
NOP
NOP
NOP
NOP
REP:

ST #0H,DATA ;initialize the value as 0h

INC:

LD DATA,A ;increment the value

ADD #1H,A
STL A,DATA
PORTW DATA,04H ;send the value to the dac
CMPM DATA,#0FFFH ;repeat the loop until the value
becomes 0fffh
BC INC,NTC
DEC:
LD DATA,A ;decrement the value
SUB #1H,A
STL A,DATA
PORTW DATA,04H ;send the value to the dac
CMPM DATA,#0H
BC DEC,NTC ;repeat the loop until the value becomes 0h
B REP ;repeat the above

OUTPUT
SONA COLLEGE OF TECHNOLOGY 75

SAWTOOTH WAVEFORM

DATA .SET 0H
.mmregs
.text
START:
STM #140H,ST0 ;initialize the data page pointer
RSBX CPL ;make the processor to work using DP
NOP
NOP
NOP
NOP
REP:
ST #0H,DATA ;initialize the value as 0h
INC:
LD DATA,A
ADD #1H,A ;increment the value
STL A,DATA
PORTW DATA,04H ;send the value to the dac
CMPM DATA,#0FFFH ;repeat the loop until the value becomes
0fffh
BC INC,NTC
B REP ;repeat the above

OUTPUT

RESULT:

The assembly program for generation of signals has been written and the output was obtained.

Viva Questions

1.What is CPL
2.What is LD
3.What is ST
4.What is RXBX
5.What is STM
SONA COLLEGE OF TECHNOLOGY 76

Exp.No.13
Date:
CALCULATION OF FFT
Aim:
To perform a computation of DFT using Radix 2 DIT FFT (8 point FFT) of the given sequence.

Apparatus Required:

Sl.No. Item Specification Quantity

1. DSK  50 LC 1
2. Serial Cable RS 232 C 1
3. User Manual  50 LC 1

Theory
Fast Fourier Transform (FFT) is a fast and efficient method to compute DFT particularly saying
Complex DFT. Analyzing FFT needs to know the difference between Real and Complex DFT.

 In real DFT, the time domain signal comprises only the real part. But in complex DFT, the time
domain signal has both the real as well as imaginary part. (see diagram)
 The real DFT transforms an N point time domain signal, into two N/2 +1 point frequency domain
signals. In comparison, the complex DFT transforms two N point time domain signals into two N
point frequency domain signals.

REAL DFT
TIME DOMAIN FREQUENCY DOMAIN
REAL PART

0 N-1 0 N/2
IMAGINARY PART

0 N/2

COMPLEX DFT

TIME DOMAIN FREQUENCY DOMAIN

REAL PART REAL PART

0 N-1 0 N/2 N-1

IMAGINARY PART IMAGINARY PART

0 N-1 0 N/2 N-1

SONA COLLEGE OF TECHNOLOGY 77

Calculation of complex DFT from a given N point real DFT.

In time domain, the real part of the complex DFT is obtained by moving the N point real DFT and the
imaginary part is obtained by setting the value of zero in all the samples. Calculation of complex DFT
results in a real and imaginary signal in the frequency domain, each composed of N points. Samples 0
through N/2 of these signals correspond to the real DFT‘s spectrum.
Procedure
Operation of the FFT on the complex DFT involves the following 3 steps.

 Decomposing an N point time domain signal into N time domain signals each consists of single
point.
 To calculate the N frequency spectra corresponding to the N time domain signals.
 N frequency spectra are synthesized into s single frequency spectrum.
These 3 steps are explained using either DIT (Decimation In Time) algorithm or DIF (Decimation In
Frequency) algorithm.
Decimation refers to the significant reduction in the number of calculation performed on time domain
signals. For ex.. if the number of original samples are 256 and we want to take only 128 samples by taking
every alternate points, then it is called a Decimation in the Time samples.

Step 1:
First, the time domain signals are decomposed as shown in the following fig.
1 signal of 8 points 01234567

2 signals of 4 points
0246 1357

4 signals of 2 points
04 26 15 37

8 signals of 1 point 0 4 2 6 1 5 3 7
SONA COLLEGE OF TECHNOLOGY 78

In the above figure, 8 point signal is decomposed through three separate stages. First stage breaks the 8
point signal into two signals each consisting of four points. Second stage decomposes the data into four
signals of 2 points, and the final stage breaks the four signals into 8 signals composed on a signal point. An
interlaced decomposition is used in each time a signal is broken into two, ie the signal is separated into its
even and odd numbered samples.

This decomposition requires Log2N stage ie, 8 point signal (23) requires 3 stages, a 16 point signal
requires 4 stages and a 512 point signal requires 7 stages, etc., All the points found in the final stage are in
bit reversed order ie, the binary value of 1 is 001, after bit reversing the binary value is changed into 100,
this represents the decimal 4. The below table gives the detail about the bit reversed.

Normal Order Bit Reversed Order

Decimal Binary Binary Decimal
0 000 000 0
1 001 100 4
2 010 010 2
3 011 110 6
4 100 001 1
5 101 101 5
6 110 011 3
7 111 111 7

Step 2:
The next step in the FFT algorithm is to find the frequency spectra of the 1 point time domain signals. The
frequency spectrum of the 1 point time domain signals is equal to itself. This means that nothing is required
to do this step. Don‘t forget that each of the 1 point signals is now a frequency spectrum and not a time
domain signals.
Step 3:
The last step in the FFT is to combine the N frequency spectra into the single frequency spectrum.

The basic pattern used for this purpose is shown in the following fig
SONA COLLEGE OF TECHNOLOGY 79

Primary +
Node

2 point 2 point
input output

Dual XS +
Node

This simple flow diagram is called ―Butterfly‖ due to its appearance. This consists of two input points
called the ―Dual Node‖ and the ―Primary Node‖. The spacing between the nodes in the sequence is called
the dual – node spacing.
FLOW CHART

START

INITIALIZE

DIGIT REVERSE
INPUTS

SETUP FOR NEXT

STAGE

SETUP FOR NEXT

GROUP

SETUP FOR NEXT

BUTTERFLY

COMPUTE
BUTTERFLY

MORE
BUTTERFLIES?
YES

MORE BFP
GROUPS ? SCALING
YES

MORE
STAGES ?
YES

STOP
SONA COLLEGE OF TECHNOLOGY 80

Explanation with Example

The DIT algorithm is explained using one example.
This example is explain according to the steps involved in the FFT algorithm
Step 1:
First decompose the single signal of 8 points into eight signals of 1 point.
Step 2:
The next step is to find the frequency spectra of the 1 point time domain signals. Frequency spectrum of the
1 point time domain signals is equal to itself. So no calculation is necessary for this steps.
Step 3:
The final step is to form a single frequency spectrum by controlling all frequency spectra. Using ―butterfly‖
structure these steps are explained in DIT. To draw the butterfly diagram, we must know the properties of
the ―W‖ function. It is shown below for reference..

J WN3N/4

WNN/2 WN N
0
i REAL

WNN/4

Therefore for N = 8, ‗W‘ functions are

SONA COLLEGE OF TECHNOLOGY 81

Output of 8 pointDFT using DIT FFT algorithm is

X[K] = {3900 + j0000, 0000+jE5B0, FF00 +j0000, 0000 +j 03B0, 0100 +j0000, 0000 +jFC50, FF00 + j0000,
0000 +jA50}
1
x[0] = 9 X[0] = 37

9
x[1] = 3 X[4] = -3
-1

1 6
x[2] = 1
X[2] = 5 + j2

11
x[3] = 4 X[6] = 5 - j2
-1

1 7
x[4] = 2 X[1] = 7 + j02

-3
x[5] = 6 X[5] = 7 +i2
-1
-4
x[6] = 5 1
X[3] = 7 - i2

-3
x[7] = 7 X[7] = 7 - j02
-1
SONA COLLEGE OF TECHNOLOGY 82

INPUT .SET 0A200H

REV .SET 0A300H
INC .SET 0A400H
TWIDC .SET 0A500H
TWIDS .SET 0A550H
BFY .SET 0H
BFYC .SET 1H
DNS .SET 2H
DNSC .SET 3H
GRP .SET 4H
GRPC .SET 5H
STG .SET 6H
STGC .SET 7H
K .SET 8H
INCTF .SET 9H
AX .SET 0AH
BX .SET 0BH
CX .SET 0CH
DX .SET 0DH
ACMBD .SET 0EH
ADPBC .SET 0FH
AR10 .SET 10H
AR11 .SET 11H
AR12 .SET 12H
AR13 .SET 13H
AR14 .SET 14H
ATEMP .SET 15H
BTEMP .SET 16H
B3 .SET 0F000H
B2 .SET 0F00H
B1 .SET 00F0H
B0 .SET 000FH
DATA .SET 30H
TXD .SET 31H

.mmregs
.text
START:
; STM #40H,PMST
RSBX CPL
STM #140H,ST0
RSBX FRCT
NOP
NOP
NOP
NOP
CALL BIT_REV
CALL INCLUDE
ST #1H,BFY
ST #4H,GRP
ST #2H,DNS
ST #3H,STG
LD STG,A
SUB #1H,A
STL A,STGC
SONA COLLEGE OF TECHNOLOGY 83

STM #TWIDC,AR0
RPT #3H
MVPD TABCOS,*AR0+
STM #TWIDS,AR0
RPT #3H
MVPD TABSIN,*AR0+
STM #2H,AR5 ;AR5 = STAGE LOOP
STGLOP:
ST #0H,K
LD BFY,A
SUB #1H,A
STL A,BFYC
LD GRP,A
SUB #1H,A
STL A,GRPC
LD DNS,A
STLM A,AR0
SUB #1H,A
STL A,DNSC
LD DNSC,A
LD GRP,A
CMPM GRP,#4H ;N/2=8/2=4H
BC NO_CHG,NTC
LD #0H,A
NO_CHG:

STL A,INCTF
LD GRPC,A
STLM A,AR3 ;AR3 = GROUP LOOP
STM #INC,AR1
GRPLOP:

ST #0H,K ;k is initially 0 in all groups

LD BFYC,A
STLM A,AR4 ;AR4 = BFLY LOOP
BFYLOP:

LD *AR1+0,A
CALL MUL
LD DNS,A
STLM A,AR0
LD *AR1-0,A
CALL ADDSUB
LD K,A
ADD INCTF,A
STL A,K
BANZ BFYLOP,*AR4-
LD DNS,A
STLM A,AR0
LD *AR1+0,A
BANZ GRPLOP,*AR3-
MPY BFY,#2,A ;BFY * 2 = BFY
SONA COLLEGE OF TECHNOLOGY 84

STL A,BFY
MPY DNS,#2,A ;DNS * 2 = DNS
STL A,DNS
STLM A,AR0
LD GRP,A
STL A,-1,GRP ;GRP / 2 = GRP
BANZ STGLOP,*AR5-
hlt: B hlt
MUL:

STM #TWIDC,AR2
LD K,A
STLM A,AR0
NOP
NOP
LD *AR2+0,A
LD *AR2,A
STL A,CX
STM #TWIDS,AR2
LD K,A
STLM A,AR0
LD *AR2+0,A
LD *AR2,A
STL A,DX
LD *AR1+,A
STL A,AX
LD *AR1-,A
STL A,BX
LD AX,A
STLM A,T
MPY CX,A ;A*C
LD BX,B
STLM B,T
MPY DX,B ;B*D
SUB B,A ;AC-BD -> A
STL A,-8,ACMBD
LD AX,A
STLM A,T
MPY DX,A ;A*D
LD BX,B
STLM B,T
MPY CX,B ;B*C
ADD A,B ;AD+BC -> B
STL B,-8,ADPBC
LD ACMBD,A
STL A,*AR1+
LD ADPBC,A
STL A,*AR1-
LD DNS,A
STLM A,AR0
RET
SONA COLLEGE OF TECHNOLOGY 85

ADDSUB:

LD *AR1+0,A
STL A,ATEMP
LD *AR1-0,B
STL B,BTEMP
ADD A,B
STL B,*AR1
LD ATEMP,A
SUB BTEMP,A
LD *AR1+0,B
STL A,*AR1-0
LD *AR1+,A
LD *AR1+0,A
STL A,ATEMP
LD *AR1-0,B
STL B,BTEMP
ADD A,B
STL B,*AR1
LD ATEMP,A
SUB BTEMP,A
LD *AR1+0,B
STL A,*AR1-0
LD *AR1-,A
LD *+AR1(2),A
LDM AR1,A
STL A,AR10
RET

BIT_REV:

STM #INPUT,AR4
STM #REV,AR5
STM #4H,AR0 ;N/2
STM #7H,BRC ;N-1
RPTB REPREV
LD *AR4+0B,A
REPREV: STL A,*AR5+
RET

INCLUDE:

STM #REV,AR1
STM #INC,AR2
STM #7H,BRC
RPTB REPINC
LD *AR1+,A
STL A,*AR2+
LD #0H,A
REPINC: STL A,*AR2+
RET
SONA COLLEGE OF TECHNOLOGY 86

TABCOS:

.word 00100H
.word 000B5H
.word 00000H
.word 0FF4BH
TABSIN:

.word 00000H
.word 0FF4BH
.word 0FF00H
.word 0FF4BH

;***************************************************************************

;INPUT: DATA MEMORY

; 0A200 0700
; 0A201 0B00
; 0A202 0F00
; 0A203 0B00
; 0A204 0700
; 0A205 0300
; 0A206 0000
; 0A207 0300

;OUTPUT: DATA MEMORY

; 0A400 3900
; 0A401 0000
; 0A402 0000
; 0A403 E5B0
; 0A404 FF00
; 0A405 0000
; 0A406 0000
; 0A407 03B0
; 0A408 0100
; 0A409 0000
; 0A40A 0000
; 0A40B FC50
; 0A40C FF00
; 0A40D 0000
; 0A40E 0000
; 0A40F 1A50

Result:
The assembly language program for the computation of 8 point DIT – FFT was written, executed and the
results were verified.
SONA COLLEGE OF TECHNOLOGY 87

Viva Questions

1.Define N point DFT

2. Define N point IDFT
3.List the properties of DFT
4.Compute the DFT of x(n)=S(n-no)
5. Compute the DFT of x(n)=an
6.Find the DFT of causal 3-sample averager
7. Find the DFT of non-causal 3-sample averager
8. Find the DFT of the sequence x(n)=(1,1,0,0)
9.Establish the relation between DFT and Z Transform
10.What is Zero padding? What are its uses?
11. Distinguish between DFT and DTFT
12.Why FFT is needed?
13.What is the speed improvement factor in calculating 64 point DFT using FFT algorithm
14.Calculate the no of multiplication and addition in DFT and FFT
15.What is FFT
16. What is meant by Radix 2 FFT
17.What is Decimation in time algorithm
18. What is Decimation in frequency algorithm
19. Distinguish between DIT and DIF
20.What is Twiddle factor