unit-2 DE
unit-2 DE
unit-2 DE
CIRCUIT DESIGN
Digital Electronics
Mr.K.Vinoth., M.Tech, MBA
Assistant Professor
Department of ECE
SMVEC
UNIT- II COMBINATIONAL CIRCUIT
DESIGN
• Following are the four steps to construct and analyze any combinational
circuit
Step-1: Identify the number of inputs and outputs of the circuit.
Step-2: Creating the Truth Table.
Step-3: Simplify the Boolean function for each output. ...
Step-4: Constructing circuit using Boolean function obtained from
third step.
Design of Half Adder
1. Identify the number of inputs and outputs of the circuit
Block Diagram of Half Adder
2.Creating the Truth Table.
Truth table of Half Adder
3.Simplify the Boolean function for each
output.
K-Map Simplification
4.Constructing circuit using Boolean
function obtained from third step.
Design of Half Subtractor
Block Diagram of Half Subtractor
Truth Table
K-Map Simplification:
Logic Diagram:
Design of Full Adder
Block Diagram of Half Subtractor
Truth Table
K-Map Simplification:
Logic Diagram:
Design of Full Subtractor
Block Diagram of Full Subtractor
Truth Table
K-Map Simplification:
Logic Diagram
PARALLEL ADDER (BINARY ADDER)
• The n-bit parallel adder can be constructed using number of full adder circuits in parallel.
The block diagram of n-bit parallel adder using number of full adder circuits connected in
cascade i.e. the carry output of each adder is connected to the carry input of the next
higher order adder is shown
BCD ADDER
• The digital system handles the decimal number in the form of binary coded decimal
numbers (BCD). A BCD adder is a circuit that adds two BCD bits and produces a sum digit
also in BCD. BCD number uses 10 digits, 0 to 9 which are represented in binary form as 0
0 0 0 to 1 1 1 1 i.e. each BCD digit represented in as a 4-bit number.
Logic Diagram
Magnitude Comparator
• We logically design a circuit for which we will have two inputs one for A
and other for B and have three output terminals, one for A > B condition,
one for A = B condition and one for A < B condition.
Block Diagram
Logic Equation
Logic Diagram