IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 28, NO.

4, OCTOBER 2013 2071

LCL DC/DC Converter for DC Grids

Dragan Jovcic, Senior Member, IEEE, and Lu Zhang, Student Member, IEEE

Abstract—This paper proposes an LCL dc-dc converter concept • connecting with medium-voltage collection/distribution dc
which is capable of achieving very high stepping ratios with grids; this is particularly important for marine energy farms
megawatt-level power transfers. The converter can find potential which will likely have dc interarray links.
application in connecting high-power dc sources to high-voltage
dc transmission including future dc transmission networks. There is currently a significant interest in developing dc/dc
This converter is based on two ac/dc insulated-gate bipolar converters at the megawatts power level. There are many types
transistor-based converters and an internal passive LCL circuit of dc/dc converters that have been utilized at low power levels;
without internal ac transformers. The LCL circuit is designed to nevertheless, it is very challenging to achieve high efficiency
enable voltage stepping without any reactive power circulation
and with potentially soft switching operation which minimizes the
with high stepping ratios at high power levels.
switching losses. The designed converter has the ability to achieve A study of using a bidirectional buck-boost dc/dc converter
current regulation even under extreme external dc faults and, is presented in [5]. However, it is emerging that only a low step-
therefore, the converter can operate through dc faults. The switch ping ratio can be achieved.
utilization is better than similar topologies and losses are rea- A dual active bridge (DAB) dc/dc converter is studied in [6]
sonably low. A dual-active-bridge transformer-based converter
design is presented to compare with the proposed LCL converter. and [7], and a similar topology but using single active bridge
A detailed PSCAD model confirms conclusions using a 100-MW dc/dc converter with an internal ac transformer is presented in
20-kV/300 kV test system. An LCL 200-W 20-V/100-V dc/dc [8]. A 5-MW dc/dc converter with a stepping ratio of 8 is ex-
prototype converter is built to validate the proposed topology. plored and losses of 3%–4% are reported in [9]. A major part of
Index Terms—DC-DC power conversion, high-voltage dc these losses is from the magnetic core loss in the ac transformer
(HVDC) transmission, insulated-gate bipolar transistor (IGBT) because of high-frequency operation. Another limitation of this
converter. family of converters is high current under dc faults which im-
plies switch tripping and usually leads to transformer saturation
which demands further overrating [8].
I. INTRODUCTION These topologies can be supplemented with resonant LC cir-
cuits to reduce converter switching stresses [9], [10], but the

A LL HVDCs operate as two-terminal systems, but tradi- limitations with internal transformers will remain.
tionally, there has been great interest for connecting to dc A megawatt-size thyristor-based dc-dc converter without an
lines or dc tapping [1]. The HVDC light (HVDC with voltage- internal transformer has been proposed recently [11]. This con-
source converters) [2] has now been implemented in numerous verter is capable of achieving a moderate stepping ratio and has
applications and shows potential for developing dc networks. an inherent ability of fault isolation. However, the main disad-
The European HVDC Supergrid is being studied at various po- vantage of this converter and other resonant topologies is the
litical levels in parallel with engineering research [3]. The dc low switch utilization and low efficiency at a high stepping ratio.
networks have advantages over HVDC in terms of better secu- The switches on the low-voltage side must be rated for high
rity and reliability, and better utilization of transmission assets voltage and high current.
and can provide more operating flexibility. This paper aims at developing a dc/dc converter topology
DC-DC converters play important role in dc grids in: for MW-size power transfer systems that could achieve a very
• interconnecting existing HVDC links (which have their high-voltage stepping ratio without an intermediate ac trans-
local, optimized DC voltage level) into a dc grid [4]; former. We investigate a topology based on internal passive
• providing a connection between offshore and onshore dc LCL circuits; therefore, eliminating issues with high-frequency
systems (overhead lines have higher dc voltage); transformers.
• providing a connection to future dc cables, which will have The ac capacitors and air-core inductors will be employed
higher dc voltage as cable technology improves; since they can operate at very high switching frequencies and
can be built for high current and high voltage. We will utilize
IGBTs unlike other transformerless dc/dc converters which
Manuscript received May 21, 2012; revised December 19, 2012 and June 10,
2013; accepted July 06, 2013. Date of publication September 12, 2013; date utilize thyristors [11]. The use of IGBTs brings the advantage
of current version September 19, 2013. This work was supported by the Engi- of developing a voltage-source bridge that can keep the ac-side
neering and Physical Sciences Research Council U.K. (EPSRC ) under Grant voltage controllable and no larger than a dc-side voltage. VSC
EP/H010262/1. Paper no. TPWRD-00512-2012.
The authors are with the Electrical Engineering Department, University converters are therefore more suitable for transformerless
of Aberdeen, Aberdeen AB24 3UE, U.K. (e-mail:d.jovcic@abdn.ac.uk; voltage stepping, since the low-voltage side switches will see
r02lz0@abdn.ac.uk). low-voltage stress. Furthermore, the VSC approach facilitates
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. constant frequency, implying simpler filters compared with
Digital Object Identifier 10.1109/TPWRD.2013.2272834 [11].

0885-8977 © 2013 IEEE

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2072 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 28, NO. 4, OCTOBER 2013

Fig. 1. Two-phase dc/dc converter topology.

An LCL resonant converter with fault current limitation in in-

duction heating applications is demonstrated in [12]. However,
this topology is suitable for supplying only a passive resistive
load.

II. CONVERTER DESIGN

A. Basic Circuit Equations

The LCL dc/dc converter topology in a two-phase inner LCL
configuration is proposed in Fig. 1. The converter can also be
Fig. 2. Low-voltage dc/ac bridge ac voltage and firing sequence with bipolar
readily expanded to a multiphase topology. modulation.
The primary design goal is the controllable power transfer be-
tween the low-voltage dc source/network and high-voltage
network . It is assumed that the voltage sources and do
where and are phase angles of respective voltages, which
not change polarity but they can deliver or sink power (bidirec-
can be externally controlled. Subscripts and denote the cor-
tional power flow by current direction change).
responding phasor components.
The converter consists of a low-voltage dc/ac bridge with
For convenience of analysis, we introduce the DQ compo-
switches – , the inner circuit given by and , and
nents of the control signal , and which are linked
the high-voltage dc/ac bridge with switches – .
to the aforementioned angles and DQ components of as
Each dc/ac bridge is operated using bipolar modulation. The
relationship of ac voltage and firing signals is shown in Fig. 2.
The modulation switching frequency is the lowest (4)
possible value generating the symmetrical ac waveform. The
phase angle of ac voltage can be manipulated by changing the (5)
phase shift of the corresponding square wave .
Using Fourier series expansion and neglecting all harmonics, (6)
the rms line-neutral ac voltage magnitudes of the
fundamental component at the operating frequency are Similarly, for voltage

(7)

(1) (8)

where (9)
, and the dc voltages and are con-
stant. It can be seen that the magnitude of ac voltages is directly We can position the coordinate frame arbitrarily, and without
controlled using the control signal magnitude ( and ). loss of generality is located on the -axis 0)
The maximum voltage is obtained for full conduction, when
1. (10)
In a further study, the ac voltage is assumed as a sine at the
fundamental frequency. We introduce phasors of ac voltages The basic equations for the inner LCL circuit are
as
(11)
(2) (12)
(3) (13)
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JOVCIC AND ZHANG: LCL DC/DC CONVERTER FOR DC GRIDS 2073

where , and is the converter switching frequency Using (25) and (23), we derive power expression
and other variables are defined in Fig. 1. From (11)–(13), we
can express the capacitor voltage and currents

(14) (26)

(15) where is the number of phases ( 2 for the converter in

Fig. 1). Therefore, is used for controlling power.
(16) On the high-voltage side, ac current is from (18)

We will conveniently rewrite equations (15) and (16) as

(27)
(17)

Using (27), the zero reactive power condition at terminal 2 is

(18)
(28)
where the coefficients and are

(19) After rearranging (28) and using (25)

(20)
(29)
(21)

The aforementioned variables and are purposely in- Therefore, replacing (24) in (29) to provide zero reactive
troduced to study converter behavior. Ultimately, we need to de- power on the high-voltage side, we operate the converter as
termine the three parameters , and , but they cannot be
readily related to converter performance. The coefficient is a (30)
positive nonzero constant that is fully determined by the power
transfer level. Coefficients and are manipulated in the de-
sign stage, as discussed in Section II-C. Since The above equation implies that the phase angle of ac voltage
, from (19)–(21), we have upper limits is constant and for a given and

(22) (31)

B. Converter Controllability for Minimal Reactive Power C. Calculation of and

Circulation
The influence of and will be discussed in this sec-
It is essential to minimize reactive power flow in the LCL tion, considering full power transfer. We assume that maximum
circuit in order to operate with minimum current magnitudes control signals are provided at maximum power transfer (in
and reduce switching losses. order to obtain minimal currents)
The converter has three control signals that can be manipu-
lated and . to minimize reactive power. Using (32)
(17), the low-voltage side AC current is
Replacing (32) in (25)

(33)
(23)
Since , we obtain the boundaries for
The condition for zero reactive power at terminal 1,
0, is obtained from (23)
(34)
(24)
where is the stepping ratio . Using (33), we can also
Therefore, the control law for is found from (24) calculate the maximum component control signal

(25) (35)
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2074 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 28, NO. 4, OCTOBER 2013

TABLE I
TEST SYSTEM DATA

TABLE II
THE 100-MW TEST SYSTEM INDUCTOR PARAMETERS

Fig. 3. System variables as is varied. (19)–(20) are close to the switching frequency, then the corre-
sponding ac voltage cannot control the local ac current.

Replacing (33) in (29) at maximum power (32): D. Converter Losses

The losses in this converter include: electronic loss (conduc-
(36) tion losses and switching losses ) and inductor losses
at the low- and high-voltage side. They are calculated as
Rewriting (36), we obtain the formula for calculating
(39)
(37)
(40)
The coefficient is calculated from the active power condi-
(41)
tion (26), and replacing (33)
where is the pole voltage. The values of onstate resistance
, threshold voltage , energy , and voltage are taken
from the manufacturer’s sheets for switches in Table I.
(38) is the switch onstate averaged current and is the switch
on-state rms current, which is obtained from PSCAD. is in-
Therefore, we have as a single design parameter. ductor resistance and is inductor rms current.
Fig. 3 shows system variables against , for a 100-MW The inductor parameters are based on an air-core solenoid
20-kV/300 kV tests system with parameters given in Table I. design which is summarized in Table II (two inductors on the
It is seen that inductors and are reducing as is in- same core to maximize flux). The air core inductors have weight
creasing, but capacitor is increasing. It is convenient that advantages as seen in Table II, but also they can operate at high
the capacitor voltage is also reducing as is increasing. The frequencies and they will not saturate under fault conditions.
control signals and go up as increases, but the For each value of , an inductor is designed and the simulation
condition is observed. The last graph shows model is developed in PSCAD.
the resonant frequency from (21), which should be away Fig. 4 shows the total losses with different at full power
from the switching frequency in order to avoid underdamped (100 MW). As is increasing to positive, the losses are
responses. Also, if the local resonances and from increasing primarily because of high-side switching losses.
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JOVCIC AND ZHANG: LCL DC/DC CONVERTER FOR DC GRIDS 2075

Fig. 4. Total converter losses as is varied.

Although for all values of , the converter operates with ac

currents in phase with voltages, smaller on the high-voltage
side implies higher harmonics and this leads to an increase in
switching losses. It can be seen for that the losses
are very low, and the converter is attractive for high-power Fig. 5. Rated and fault currents versus .
applications.

E. Converter DC Fault Analysis Dividing (45) to (18), the magnitude of fault current relative
to the rated current will be
We assume that the converter is operating at full power prior
to the fault. We study the inherent converter response assuming
that the controller is inactive during faults. ( and re- (46)
main at the rated values.)
1) Faults on the DC Voltage : We are interested in extreme
dc faults, which imply . Using this condition with Equating (46) to 1 and using (37), we obtain the condition
(17) and (18), we can have the magnitude of ac fault current where fault current exceeds the rated current
as
(47)
(42)
which is always satisfied for negative considering (34).
2) Faults on DC Voltage : The converter currents under
where subscript “ ” denotes the rated values. the extreme fault on can be obtained from (17) and (18) by re-
The magnitude of fault current relative to the rated current placing 0. Since the converter is symmetrical, following
can be obtained by dividing (42) to (17): the same process as for faults on , it can be concluded that
the condition where exceeds the rated current is identical to
(47). The condition that fault current is below 2 times rated
(43)
current is identical to (44).
Therefore, we can summarize that (44) and (47) are the main
The singularity case of is not feasible conditions for analyzing fault currents.
in (43) since this would imply that in (26) and this Fig. 5 shows the rated currents and fault current magnitudes
would violate (34). Equating (43) to 1, we conclude that fault for a range of . Under 0, the fault current is
current will always be greater than the rated current. In general, always higher than the rated current , but for most ,
lower implies lower fault currents. To keep the fault the range is close to the rated current. The fault current is
current below 2 times rated current, we have always below the rated value for the range of interest. In case
, the conclusions are similar.
(44) In general, the lowest fault currents are obtained for close
to zero.

which implies that for the 80% range of , the fault current will F. Summary Design Steps
be low. The fault current magnitude is found from (18)
The following list shows prescriptive design steps for the
aforementioned converter. It is assumed that the following is
(45) given: dc voltages and , and power level .
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2076 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 28, NO. 4, OCTOBER 2013

Fig. 7. The 100-MW converter response after dc fault 0.

Fig. 6. The 100-MW converter operation in steady state.

III. PSCAD SIMULATION

Step 1) Assume a range of values using (34). The can
be determined by (37). Fig. 6 shows the PSCAD simulation of the 100-MW test
Step 2) For the maximum power transfer, control signals system at full power. The converter operates at maximum
and are calculated from (33) and (35). voltage and power level since the conduction angles are 180 .
Step 3) Calculate using (38). It can be seen that the internal ac circuit achieves the required
Step 4) Plot graphs as in Fig. 3 and determine inductance voltage and current stepping. The LCL circuit performs as an
and capacitance for each ac transformer and this minimizes stress on switches. The ac
currents and voltages are in phase, at each ac/dc bridge, which
(48) implies zero current switching and gives the lowest conduction
and switching losses. It is also observed that dc currents consist
(49) of ideal half-sine, although has some negative values
(50) because of high harmonics. Note that all of the voltages in
Fig. 6 are measured as pole-neutral values.
Step 5) Calculating converter losses as in Section II-D and Fig. 7 shows the ac currents and after the dc fault
plot the loss curve as in Fig. 4. 0) at 0.45 s. The steady-state fault current
Step 6) Plot graphs for fault magnitudes as in Fig. 5. Con- stays lower than the rated current and fault current
sidering low losses, should be selected as a large is within 1.7 p.u. of as predicted in the design. The
negative value. Also, a high magnitude negative and transient overcurrent peaks are around 1.1 p.u. and 2.7
value for gives which might be de- p.u., respectively, but these currents are restricted to antiparallel
sired in some cases to reduce current harmonics on diodes. There might be a need for modest diode overrating.
. However, it is important that the curve As the long-term strategy for permanent faults, switches
from Fig. 3 is away from the switching frequency, – are tripped. There is no need for special fast overcurrent
which precludes large negative values. Furthermore, protection for this converter. The PSCAD simulation results
lower negative is desired to limit the fault current therefore confirm all of the results from analytical studies.
magnitude.
Using the design steps just shown, we have selected IV. DAB-EQUIVALENT DC/DC DESIGN
as the optimal value, which can provide low loss (around 1.6%) In order to illustrate the main benefits of the LCL converter,
and good converter performance. we present an equivalent DAB dc/dc converter in this sec-
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JOVCIC AND ZHANG: LCL DC/DC CONVERTER FOR DC GRIDS 2077

TABLE III
THE 100-MW DAB AND LCL CONVERTERS’ PARAMETERS AND LOSSES

Fig. 8. DAB dc/dc converter topology.

TABLE IV
THE 200-W PROTOTYPE CONVERTER PARAMETERS

TABLE V
INDUCTOR PARAMETERS FOR THE 200-W CONVERTER
Fig. 9. Steady-state operation of the DAB converter.

tion. The main topology for the DAB converter is shown in

Fig. 8 and the design follows the methodologies in [13]–[16].
The amorphous core material is selected and the switching
frequency is 500 Hz, as recommended in [13] and [14] for
high-power designs. As frequency increases, the core losses
(hysteresis and eddy current) increase sharply. Using Steinmetz
equation [15], assuming that the peak flux is ,
considering only fundamental component, the core losses
amount to approximately 1.7% at 500 Hz. It is necessary to add
two small series inductors ( 0.4 mH) in order to limit
the current peaks within switch ratings. These inductors also
reduce the dc fault current, but the fault currents are still very
high and the DAB converter is normally tripped in case of dc V. EXPERIMENTAL VERIFICATION
faults. In this section, the experimental results of the 200-W labo-
Fig. 9 shows the ac waveforms of the DAB converter in ratory prototype converter are shown to validate the designed
steady-state operation. The square waveform of ac currents and topology and simulation model. The hardware setup consists of
since both DAB currents cannot be in phase with ac voltages, the dc power supply, LCL circuit, metal–oxide semiconductor
imply high switching currents. This is a major disadvantage (MOSFET) switches and driver board, and Texas Instrument
compared with sine currents in Fig. 6. microcontroller. The converter can boost the low-voltage input
The 100-MW, 40-kV/600-kV, 0.5-kHz DAB converter’s pa- 20 V to 80 V–100 V dc output. Table IV shows the converter
rameters, size, and losses are summarized in Table III, and com- parameters. The inductors are designed based on an air-core so-
pared with similar 1.5-kHz LCL converters with 3. lenoid and the inductor parameters are summarized in Table V.
The weight of the DAB is considerably (6.7 times) larger than Two inductors are located on the same core back to back in order
the LCL converter. The LCL inductors are large, but their com- to improve magnetic flux (shown as and ).
bined weight and losses are still well below DAB. The core loss We did not optimize the design but only made elementary
of DAB is significant and makes the overall DAB losses 1.8 calculations to determine the tradeoff between losses and size.
times the LCL losses. The obtained efficiency of up to 81% is considered good for a
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2078 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 28, NO. 4, OCTOBER 2013

Fig. 12. Measured HV-side variables in steady state. AC voltage (50

V/div), Capacitor voltage Vc (200 V/div), ac current (5 A/div), dc current
(10 A/div), and time (20 s/div).

Fig. 10. The 200-W prototype dc/dc converter.

Fig. 13. Measured variables after a dc fault . Voltage (100

V/div), ac currents (10 A/div), (5 A/div). Time (20 s/div).

Fig. 13 shows the response after the dc fault . The

current on the faulted side increases to 1.3 p.u. after the
Fig. 11. Measured LV-side variables in steady state. AC voltage (50 fault and the switches will withstand this overcurrent condition.
V/div), ac current (20 A/div), dc current (10 A/div)., and time (20 It is observed that does not increase under fault conditions
s/div).
(it slightly drops) and, therefore, this converter can ride through
extreme dc faults.

200-W power level and it is similar to other DAB low-power

designs (i.e., 1-kW DAB dc/dc converter in [7]. VI. CONCLUSION
Note that the LV-side MOSFETs only have a 60-V rating,
which is smaller than 100-V stress at the HV side, and this con- This paper presents an LCL dc/dc converter which has
firms the ability of the LCL circuit to achieve voltage stepping. demonstrated the capability of the high stepping ratio at high
Fig. 10 shows the converter built in the lab. power. An inner LCL circuit is used instead of an ac transformer
The converter is tested in the step-up mode working with a which enables operation at high frequencies with low losses.
passive resistive load on the high-voltage side . The The studies show that the converter operates at zero reac-
measured converter variables are shown in Figs. 11 and 12. All tive power, zero current switching, and loss is minimized. Com-
of the voltages are measured as pole-pole and line-line values pared with the 100-MW power DAB dc/dc converter design, the
on the oscilloscopes (whereas those in previous equations are proposed LCL converter has acceptable losses and can achieve
pole-neutral). It can be seen that the ac voltages , are in good responses under faults (no special overcurrent protection
phase with ac currents and , which practically confirms is required).
accuracy of the design in Section II-B. The dc currents A 100-MW 40-kV/600-kV high-power dc/dc converter
also show the desired half-sine shape although the HV model is developed in PSCAD and tested in detail. The sim-
side has more harmonics. ulation results confirm the aforementioned conclusions. The
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JOVCIC AND ZHANG: LCL DC/DC CONVERTER FOR DC GRIDS 2079

operating principles of the proposed converter topology are [13] L. Max, “Design and control of a DC collection grid for a wind farm,”
validated on a 200-W prototype converter. Ph.D. dissertation, Dept. Eng. Environ., Chalmers Univ. of Technol.,
Göteborg, Sweden, 2009.
[14] A. V. Bossche, V. C. Valchev, and G. B. Geoorgiev, “Measurement and
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