Computer Architecture and

Organization
Dr. Bimal Kumar Meher
Associate Professor
Dept. of CSE
Topics to be covered
• Computer Architecture vs Organization
• Functional units of a computer
• Basic operational concepts
• Bus structure
• Performance
Challenges before a Computer Designer
• A Computer Designer has some key challenges:
• Selection of Important attributes
• Performance optimization
• Energy efficiency
• Cost-effective
• To meet these challenges a designer should have the skills of
• Instruction set design
• Functional organization
• Hardware design
Computer architecture
• Computer architecture covers all three aspects of computer Design
• Instruction Set Architecture (ISA)
• Computer Organization or microarchitecture
• Hardware design
• ISA-It is programmer visible machine interface such as
• instruction set
• registers
• memory organization
• exception handling etc.
• Two main approaches are
• CISC (Complex Instruction Set Computer)
• RISC (Reduced Instruction Set Computer)
Computer Organization
• Computer Organization (or microarchitecture) includes high-level
aspects of a computer’s design, such as
• the memory system,
• the memory interconnect
• design of the internal processor or CPU
• Note: It is possible that, two processors have same instruction set
architectures but have different organizations
• Example:
• AMD Opteron and the Intel Core i7 processors implement the x86
instruction set, but they have very different organizations (pipeline
and cache organizations)
Hardware
• Hardware refers to the internal details of a computer
• the detailed logic (IC) design
• the packaging technology
• Power and cooling mechanism etc.
• Note: Computers with identical instruction set architectures and
nearly identical organizations, can differ in the detailed hardware
implementation.
• Example:
• the Intel Core i7 and the Intel Xeon 7560 belong to two different class
of computers because of different clock rates and different memory
systems.
Functional Units of a Computer

• Input
Arithmetic
• Output Input and
• Memory logic

Memory
• Arithmetic and Logic
Control
Unit (ALU)
Output
• Control
Registers
I/O
Processor
Operations of a Computer (summary)
• The computer accepts
information (programs and data)
through the input unit and
stores it in memory. Arithmetic
Input and
• The information is then fetched logic
from memory into the ALU for
Memory
desired operation (processing).
Control
• Processed information leaves Output
the computer through output
Registers
unit. I/O
Processor
• All of these activities are
coordinated by the control unit.
Control Unit
• It is the nerve center which sends the
control signal to other units and senses
their states.
• It decodes an instruction and generate
necessary signals to complete execution. Arithmetic
Input and
• Selects registers to be used as source and logic
destination in an operation.
Memory
• Timing signals for I/O operations are
generated by the control circuits Control
Output
• Data transfer between the processor and
memory are also controlled by the Registers
control unit through the timing signal. I/O
Processor
• Note: Timing signals are signals that
determine when a given action is to take
place.
 Arithmetic and Logic Unit (ALU)
• The instructions are executed in the ALU
of the processor.
• Example:
• Let there be an instruction to add two Arithmetic
Input and
numbers. logic
• Step 1: First load the operands into Memory
memory
Control
• Step 2: Then bring them into the Output
processor and store them in registers
• Step 3: Then perform addition in ALU I/O
Registers
and store the result back in the register. Processor

• Step 4: Finally transfer the result from

register to the memory.
Instruction vs Program
• Information handled by the computer can be classified as
either:
• Instruction or
• Data
• Instructions (also called machine instructions) are explicit
commands that:
• Govern the transfer of information within a computer
• Specify the arithmetic and logic operations
• Program is a list of instructions that perform a specific task.
Basic Operational Concepts
• An instruction consists of two parts:
• Operation code (Opcode)
• Operands
• Example: Add LOCA, R0
• This is an addition instruction.
• Step 1: First the instruction is fetched from memory into the
processor.
• Step 2: Then the operand at memory location LOCA is fetched and
added to the contents of register R0.
• So, the sum is stored inside register R0.
• Note:
• The original contents of LOCA are preserved.
• The original contents of R0 is overwritten.
Separate Memory Access and ALU Operation
• A problem of previous Add instruction is that it combines a memory
access operation with an ALU operation.
• However, it can be realized by using a two-instruction sequence as
follows:
• Load LOCA, R1
• Add R1, R0
• Step 1: The Load instruction transfers the contents of memory
location LOCA into the processor register R1.
• Step 2: The Add instruction adds the contents of R1 and R0 and
places the sum into R0.
• Whose contents will be overwritten?
 MAR MDR
Control

PC R0

R1
Processor
IR

ALU
Rn - 1

n general purpose

Connection between Processor and Memory

registers

Figure 1.2. Connections between the processor and the memory.

• Along with the ALU and CU, a

processor contains a no. of
registers as follows:
• IR (Instruction Register)
• PC (Program Counter)
• GPR (General Purpose
Register)
• MAR (Memory Address
Register)
• MDR (Memory Data Register)
Registers
• Instruction Register (IR): It is a special purpose register that
• holds the instruction that is currently being executed.
• Program Counter (PC): It is another special purpose register that
• Keeps track of the execution of the program
• It keeps the address of the next instruction to be fetched and executed.
• General Purpose Register (GPR) (R0 – Rn-1): These are general purpose
registers which store data/address during execution.
• Memory address register (MAR): It holds the address of the location
to be accessed.
• Memory data register (MDR): It contains the data to be written into
or read out of the addressed location.
How an instruction executes?
• Followings show the typical operational steps of execution:
Note: Program resides in the memory through input unit.

1. PC is set to point to the first instruction of the program

2. The address stored inside PC is transferred to MAR and a READ
control signal is sent to memory
3. PC now holds the address of the next instruction.
4. The first instruction is read out and loaded into MDR
5. Then the contents of MDR are transferred to IR
6. Now the instruction becomes ready for decoding and execution.
How an instruction executes? (contd…)
7. If the instruction involves an operation to be performed by ALU,
then the operands to be brought into the registers (as follows).
8. The address of the operand is sent to MAR and a READ cycle is
initiated.
9. When the the operand is read from memory to MDR, then it is
transferred to the ALU.
10. After getting the required no. of operands, the ALU can perform the
desired operation and the result is stored in some register.
Question:Now write the steps how this result will be transferred to
memory?
How an instruction executes? (contd…)
11. Then the result is stored in MDR for transferring to a memory
location.
12. Then the address of the location where the result to be stored is
sent to MAR and a WRITE cycle is initiated.
13. The data stored in MDR is transferred to the addressed location in
memory.
Bus Structure
• A bus is a group of lines (wires) that serves as a connecting path for
several devices
• Normally, a word of data is transferred at a time.
• If the word size=32bits, then 32 bits are transferred in parallel.
• Therefore, the bus should have 32 lines or wires.
• Along with the data bus, there should be address bus and control bus.

Input Output Memory Processor

Single Bus
Single Bus vs Multiple Bus
• Single Bus: This is the simplest way to connect the functional units.
• Only two units can actively use the bus at any given time.
• Bus control lines are used to arbitrate multiple requests to use of the
bus.
• The benefit of single bus is its low cost and flexibility for attaching
peripheral devices.
• Multiple Bus: More than one buses can exist between the devices.
• Benefit of this is, more than one transfer is possible at a time
(concurrency).
• Although this leads to better performance, but incurs more cost.
Speed issues in Bus
• We know that, different devices have different transfer/operate
speed.
• If the speed of bus is bounded by the slowest device connected to it,
the efficiency will be very low.
• How to solve this?
• A common approach is to use Buffer Registers with the devices.
• A Buffer register holds the information during transfer.

Input Output Memory Processor

Single Bus
Speed issues in Bus (contd…)
• Example: Let a processor sends characters to the printer.
• Since the speed of processor is much higher than the printer, hence
there will be synchronization problem.
• To address this issue, a buffer is maintained with the printer.
• Once the buffer is loaded, the printer can start printing without the
intervention of the processor.
• So the processor and bus can provide service to other devices.
Output
Input Buffer Memory Processor

Single Bus
Performance of a Computer
• The most important measure of a computer is how quickly it can
execute programs.
• Three factors affecting performance:
• Hardware design
• Instruction set
• Compiler
• Hardware design mainly refers to the design of processor, memory
and bus.
• Instruction set refers to the machine level instructions for a certain
processor in order to achieve faster execution.
• Since a compiler translates a program in HLL to machine level
code/object code so design of an efficient compiler also increases
performance.
Performance of a Computer (contd…)
• The processor and a relatively small cache memory can be fabricated
on a single integrated circuit chip.
• So, the cache keeps the frequently used instructions and data by
fetching them from main memory.
• Since the access time of cache memory is less than the access time of
main memory, hence it minimizes the execution time.

Main Cache
memory memory Processor

Bus
Processor Clock
• Processor circuits are controlled by the timing signal called the clock.
• Clock cycle: The regular time intervals.
• Note 1: To execute a machine instruction, the processor divides the
instruction into a sequence of basic steps.
• Note 2: Each step should be completed in one clock cycle.
• Note 3: Therefore, the length of one clock cycle (P) is an important
parameter that affects processor performance.
• Clock rate (R): It is defined as the no. of cycles per sec(Hz).
• Therefore, R = 1 / P
• Modern processors measures the R in millions (mega) or billions (Giga)
cycles per sec
• Example 1: 500 million cycle per sec = 500 MHz
• Example 2: 2500 million cycles per sec = 2.5 GHz.
Basic Performance Equation
• How to achieve high performance?
• Let T = processor time required to execute a program written in HLL
• Let N = no. of actual machine level instructions required for execution
• Let S = average no. of basic steps needed to execute one machine
instruction. Each step completes in one clock cycle.
• Then T is calculated by using the basic performance equation:
• T = (N x S) / R, where R is the clock rate (cycles per sec.)
• Note: To achieve high performance, the computer designer should
reduce the value of T which implies
• reducing the value of N and S, and
• increasing the value of R.
How to increase the clock rate (R)?
• There are two possibilities to increase the clock rate (R) as follows:
1. Improve the integrated-circuit (IC) technology to make the circuits
faster
• This reduces the time needed to complete a basic step.
• This allows the clock period P to be reduced and the clock rate R to be
increased.
2. Reduce the amount of processing done in one basic step
• however, this may increase the number of basic steps needed
Problem
• Let there be a processor P1 of clock rate 700MHz, N=5, and S=2 and
another processor P2 of clock rate 900MHz, N=5, and S=3, then which
processor is faster?

• TP1= (5 x 2) / (700 x 106) = 100/7 ns = 14.28 ns

• TP2= (5 x 3) / (900 x 106) = 150/9 ns = 16.66 ns

• Observation: A processor having 900MHz clock may not provide

better performance than a 700MHz processor because it may have a
different value of S.
Benchmark Performance Evaluation
• The computer community usually measures the performance of a
computer by using some benchmark programs.
• Benchmark programs are some standard real application programs used for
computer performance evaluation.
• These programs include domains like computer games, compiler, database,
scientific application etc.
• A nonprofit organization called System Performance Evaluation
Corporation (SPEC) selects and publishes such programs with test results
for many commercially available computers (reference computers).
• Example:
• SPEC95 has a set of benchmark programs for SUN SPARCstation 10/40.
• SPEC2000 has a set of benchmark programs for Ultra-SPARC10.
SPEC Rating
• SPEC rating is a measure of actual execution time by considering the
processor, memory, compiler, and Operating System of a computer as a
whole.
Running time on the reference computer
• SPEC Rating =
Running time on the computer under test
• Example: Let the running time on the reference computer is 25ns and that
on the computer under test is 5ns. The SPEC Rating = 5.
• That means the computer under test is 5 times faster than Ultra-SPARC10
under SPEC2000 benchmark standard.
• Note: This test is repeated for all programs in the SPEC suite and the
geometric mean of the results is computed.
• So the overall SPEC rating is given by:
1
𝑛
• SPEC Rating = 𝑖=1 𝑆𝑃𝐸𝐶𝑖
𝑛
• where SPECi is the rating for program i and n is the no. of programs in the suite.