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DPCO syllabus- course file

The syllabus outlines the course JIT2321 Digital Principles and Computer Organization, which covers topics such as Boolean algebra, combinational logic, computer fundamentals, processor design, and memory and I/O interfacing. The course includes both theoretical components and practical experiments, aiming to equip students with knowledge in digital circuits and computer architecture. Assessment methods include continuous evaluations and a final written examination.

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Sinduja Baskaran
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96 views2 pages

DPCO syllabus- course file

The syllabus outlines the course JIT2321 Digital Principles and Computer Organization, which covers topics such as Boolean algebra, combinational logic, computer fundamentals, processor design, and memory and I/O interfacing. The course includes both theoretical components and practical experiments, aiming to equip students with knowledge in digital circuits and computer architecture. Assessment methods include continuous evaluations and a final written examination.

Uploaded by

Sinduja Baskaran
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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SYLLABUS

L T P C
JIT2321 DIGITAL PRINCIPLES AND COMPUTER
ORGANIZATION 3 0 2 5

COURSE OBJECTIVES:

● To design digital circuits using simplified Boolean functions


● To analyze and design combinational circuits
● To understand the basic structure and operation of a digital computer.
● To study the design of the data path unit, and control unit for the processor and to
familiarize with the hazards.
● To understand the concept of various memories and I/O interfacing.

UNIT I BOOLEAN ALGEBRA AND LOGIC GATES 9


Number Systems — Arithmetic Operations — Binary Codes- Boolean Algebra and Logic
Gates —Properties of Boolean Algebra — Boolean Functions — Canonical and Standard
Forms — Simplification of Boolean Functions using Karnaugh Map — Logic Gates

UNIT II COMBINATIONAL LOGIC 9


Combinational Circuits –Binary Adder – Subtractor – Decimal Adder — Binary Multiplier -
Magnitude Comparator – Decoder – Encoder – Multiplexers – De-multiplexer

UNIT III COMPUTER FUNDAMENTALS 9


Functional Units of a Digital Computer: Von Neumann Architecture – Operation and
Operands of Computer Hardware Instruction – Instruction Set Architecture (ISA): Memory
Location, Address and Operation – Instruction types– Addressing Modes

UNIT IV PROCESSOR 9
Instruction Execution – Building a Data Path – Designing a Control Unit – Pipelining – Data
Hazard – Control Hazards.

UNIT V MEMORY AND I/O 9


Memory Concepts and Hierarchy – Cache Memories: Mapping and Replacement Techniques
– Virtual Memory – DMA – I/O – Accessing I/O: Parallel and Serial Interface – Interrupt I/O

TOTAL: 45 PERIODS

List of Experiments
1. Verification of Boolean theorems using logic gates.
2. Design and implementation of combinational circuits using gates for arbitrary
functions.
3. Implementation of 4-bit binary adder circuits
4. Implementation of 4-bit binary Subtractor circuits.
5. Implementation of code converters.
6. Implementation of BCD adder.
7. Implementation of encoder and decoder circuits.
8. Implementation of functions using Multiplexers
9. Implementation of functions using Demultiplexers.
10.Simulator based study of Computer Architecture.

TOTAL: 30 PERIODS
COURSE OUTCOMES:
Bloom’s
*:
No. Outcomes Taxonomy
Level*
CO1 Gain knowledge in number systems an Boolean function. K1,K2

CO2 Understanding Logic gates and all the combinational logic K1,K2
CO3 Learning the basic Functional units and ISA K1,K2,K3
CO4 Gain knowledge about Pipelining Hazards K1,K2
CO5 Acquire knowledge about memory of computer and its functions. K1,K2,K3
REMEMBER – K1, UNDERSTAND – K2, APPLY – K3, ANALYSIS – K4, EVALUATION – K5, CREATE –
K6

TEXT BOOKS:
1. M. Morris Mano, Michael D. Ciletti, “Digital Design : With an Introduction to the
Verilog HDL, VHDL, and System Verilog”, Sixth Edition, Pearson Education, 2018.
2. David A. Patterson, John L. Hennessy, “Computer Organization and Design, The
Hardware/Software Interface”, Sixth Edition, Morgan Kaufmann/Elsevier, 2020.

REFERENCES:
1. Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Naraig Manjikian, “Computer
Organization and Embedded Systems”, Sixth Edition, Tata McGraw-Hill, 2012.
2. William Stallings, “Computer Organization and Architecture – Designing for
Performance”, Tenth Edition, Pearson Education, 2016.
3. M. Morris Mano, “Digital Logic and Computer Design”, Pearson Education, 2016.

WEB REFERENCES:
● https://www.geeksforgeeks.org/difference-between-multiplexer-and-demultiplexer/
● https://www.geeksforgeeks.org/introduction-of-sequential-circuits/
● https://www.geeksforgeeks.org/microarchitecture-and-instruction-set-architecture/
● NPTEL :: Com https://archive.nptel.ac.in/courses/106/105/106105163/
● Difference bet https://www.geeksforgeeks.org/difference-between-serial-port-and
Mapping of CO with PO/PSO

Program Outcomes PSO


PO PO PO PO PO PO PO PO PO PO1 PO1 PO PSO1 PSO2 PSO3
1 2 3 4 5 6 7 8 9 0 1 12
CO1 1 2 2 3 3 2 3 3 1 2 2 3 3 2 3
CO2 - - 2 2 2 3 1 2 3 3 3 1 3 3 3
CO3 - - 3 3 2 3 3 3 3 3 2 2 3 2 3
CO4 - - 3 2 3 3 2 3 2 3 3 2 1 3 3
CO5 - - 2 3 3 2 3 2 3 2 3 2 3 3 3
AVG 2.6 2.6 3 1 2 2.4 2.6 2.6 2.6 2.4 2.6 2.4 2.6 2.6 3
COURSE ASSESSMENT METHODS (DIRECT):
Continuous End Semester

Assessment Test 1,2, Class Tests, Assignments Written Examination

Faculty Dept. Academic Coordinator HOD

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