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Chapter 2

Chapter 2 of the document discusses data representation in embedded systems, focusing on binary, octal, decimal, and hexadecimal systems. It covers unsigned and signed integer representations, including methods like signed magnitude, one's complement, and two's complement, along with overflow conditions. Additionally, it introduces magic 32-bit numbers used for debugging and memory allocation patterns.

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0% found this document useful (0 votes)
19 views36 pages

Chapter 2

Chapter 2 of the document discusses data representation in embedded systems, focusing on binary, octal, decimal, and hexadecimal systems. It covers unsigned and signed integer representations, including methods like signed magnitude, one's complement, and two's complement, along with overflow conditions. Additionally, it introduces magic 32-bit numbers used for debugging and memory allocation patterns.

Uploaded by

khoanguyen1511kg
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 36

Embedded Systems with ARM Cortex-M Microcontrollers

in Assembly Language and C

Chapter 2
Data Representation

Dr. Yifeng Zhu


Electrical and Computer Engineering
University of Maine

Spring 2018

1
Bit, Byte, Half-word, Word, Double-Word

2
Binary, Octal, Decimal and Hex
Decimal Binary Octal Hex
0 0000 00 0x0
1 0001 01 0x1
2 0010 02 0x2
3 0011 03 0x3
4 0100 04 0x4
5 0101 05 0x5
6 0110 06 0x6
7 0111 07 0x7
8 1000 010 0x8
9 1001 011 0x9
10 1010 012 0xA
11 1011 013 0xB
12 1100 014 0xC
13 1101 015 0xD
14 1110 016 0xE
15 1111 017 0xF

3
Magic 32-bit Numbers
 Used as a special pattern for debug
 Used as a special pattern of memory values during allocation and de-
allocation

0xDEADBEEF Dead Beef


0xBADDCAFE Bad Cafe
0xFEE1DEAD Feel Dead
0x8BADF00D Ate Bad Food
0xBAADF00D Bad Food
0xDEADC0DE Dead Code
0xFACEB00C Facebook
0xDEADD00D Deade Dude

4
Unsigned Integers

Convert from Binary to Decimal:

𝟏𝟎𝟏𝟏𝟐 = 𝟏 × 𝟐𝟑 +𝟎 × 𝟐𝟐 +𝟏 × 𝟐𝟏 + 𝟏 × 𝟐𝟎
=𝟖+𝟐+𝟏
= 𝟏𝟏

Five-bit binary code


5
Unsigned Integers
Convert Decimal to Binary

Example 1 Example 2

5210 = 1101002 3210 = 1000002

6
Carry/borrow flag bit for unsigned numbers
• When adding two unsigned numbers in an n-bit system, a
carry occurs if the result is larger than the maximum
unsigned integer that can be represented (i.e. 2𝑛 − 1).

• When subtracting two unsigned numbers, borrow occurs if


the result is negative, smaller than the smallest unsigned
integer that can be represented (i.e. 0).

• On ARM Cortex-M3 processors, the carry flag and the


borrow flag are physically the same flag bit in the status
register.
• For an unsigned subtraction, Carry = NOT Borrow

7
Carry/borrow flag bit for unsigned numbers
If the traverse crosses the boundary between 0 and 𝟐𝒏 − 𝟏, the carry flag is set on
addition and is cleared on subtraction.
11111 00000 00001
11110 00010
11101 00011 Carry 1 1 1 0 0
31 0 1
11100
29
30 2
3
00100
1 1 1 0 0 28
11011 28 4 00101

11010
27
+6
Carry
5
00110
+ 0 0 1 1 0 + 6
28 + 6
11001
26 6
00111
1 0 0 0 1 0 2
25 7

11000 24 8 01000
Extra bit is 5-bit result
23 9
10111 01001 discarded.
22 10
10110 01010
21 11

10101 20 12 01011 • Carry flag = 1, indicating carry has occurred


19 13
10100 18
17 16 15
14 01100 on unsigned addition.
10011
10010 01110
01101
• Carry flag is 1 because the result crosses
10001 10000 01111
the boundary between 31 and 0.
A carry occurs when adding 28 and 6
8
Carry/borrow flag bit for unsigned numbers
If the traverse crosses the boundary between 0 and 𝟐𝒏 − 𝟏, the carry flag is set on
addition and is cleared on subtraction.
11111 00000 00001
11110 00010
11101 00011

11100
31 0 1
00100
Borrow 1 1 1 0 0
30 2
29
11011 28 -5
3
4 00101 0 0 0 1 1 3
Carry 3-5
11010
27 5
00110 - 0 0 1 0 1 - 5
26 6
11001
25 7
00111 1 1 1 1 0 30
11000 24 8 01000

23 9
10111 01001 5-bit result
22 10
10110 01010
21 11

10101 20 12 01011 • Carry flag = 0, indicating borrow has


occurred on unsigned subtraction.
19 13
10100 18 14 01100
17 16 15
10011 01101 • For subtraction, carry = NOT borrow.
10010 01110
10001 10000 01111

A borrow occurs when subtracting 5 from 3.

9
Signed Integer Representation
Overview
 Three ways to represent signed binary integers:
 Signed magnitude
 𝒗𝒂𝒍𝒖𝒆 = (−𝟏)𝒔𝒊𝒈𝒏 × 𝑴𝒂𝒈𝒏𝒊𝒕𝒖𝒅𝒆
 One’s complement (𝜶)
 𝜶 + 𝜶 = 𝟐𝒏 − 𝟏
 Two’s complement (𝜶)
 𝜶 + 𝜶 = 𝟐𝒏

One’s Two’s
Sign-and-Magnitude
Complement Complement
Range [−2𝑛−1 + 1, 2𝑛−1 − 1] [−2𝑛−1 + 1, 2𝑛−1 − 1] [−2𝑛−1 , 2𝑛−1 − 1]
Zero Two zeroes (±0) Two zeroes (±0) One zero
Unique
2𝑛 − 1 2𝑛 − 1 2𝑛
Numbers

10
Signed Integers
Method 1: Signed magnitude
Sign-and-Magnitude:
𝒗𝒂𝒍𝒖𝒆 = (−𝟏)𝒔𝒊𝒈𝒏 × 𝑴𝒂𝒈𝒏𝒊𝒕𝒖𝒅𝒆
• The most significant bit is the sign.
• The rest bits are magnitude.

 Example: in a 5-bit system


 +710 = 001112
 -710 = 101112

 Two ways to represent zero


 +010 = 000002
 -010 = 100002

 Not used in modern systems


 Hardware complexity
 Two zeros
11
Signed Integers
Method 2: One’s Complement
One’s Complement (𝜶):
𝜶 + 𝜶 = 𝟐𝒏 − 𝟏

The one's complement


representation of a negative
binary number is the bitwise
NOT of its positive counterpart.

Example: in a 5-bit system


+710 = 001112
-710 = 110002

+710 + (-710) = 001112 + 110002


= 111112
= 25 - 1

12
Signed Integers
Method 3: Two’s Complement
Two’s Complement (𝜶):
𝜶 + 𝜶 = 𝟐𝒏

TC of a negative number can be


obtained by the bitwise NOT of its
positive counterpart plus one.

Example 1: TC(3)

Binary Decimal
Original number 0b00011 3
Step 1: Invert
0b11100
every bit
Step 2: Add 1 + 0b00001
Two’s complement 0b11101 -3

13
Signed Integers
Method 3: Two’s Complement
Two’s Complement (TC)
𝜶 + 𝜶 = 𝟐𝒏

TC of a negative number can be


obtained by the bitwise NOT of its
positive counterpart plus one.

Example 2: TC(-3)

Binary Decimal
Original number 0b11101 -3
Step 1: Invert
0b00010
every bit
Step 2: Add 1 + 0b00001
Two’s complement 0b00011 3

14
Comparison
00000/ 00000/
11110 11111 00001
10001 10000 00001
11101 00010 11111 00000 00001
10010 00010 11110 00010
10011 00011 11100 00011 11101 00011
0 1 -1 0 1 0
-1 11011 -2 2 00100 -1 1
10100 -2 2 00100 11100 -2 2 00100
-3 3 -3 3 -3 3
10101 00101 11010 -4 4 00101 11011 00101
-4 4 -4 4
-5 -5 5 -5
5 11001 00110 5
10110 00110 11010 00110
-6 6 -6 6 -6 6
10111 00111 11000 00111 11001 00111
-7 7 -7 7 -7 7

-8 01000 11000 -8 01000


11000 -8 8 01000 10111 8 8

9 -9 9 -9 9
-9 10111 01001
11001 01001 10110 01001
-10 10 -10 10
-10 10
11010 01010 10101 01010 10110 01010
-11 11 -11 11
-11 11
10100 12 01011 10101 -12 12 01011
11011 -12 12 01011 -12
-13 13
-13 13 -13 13
11100 01100 10011 01100 10100 -14 14 01100
-14 14 -14 14 -15 -16 15
-15 15 -15 15
11101 01101 10010 01101 10011 01101
11110 01110 10001 01110 10010 01110
11111 01111 10000 01111 10001 10000 01111

Signed magnitude One’s complement Two’s Complement


representation representation representation
0 = positive Negative = invert all TC = invert all bits,
1 = negative bits of a positive then plus 1

15
Overflow flag for signed numbers
 When adding signed numbers represented in two’s
complement, overflow occurs only in two scenarios:
1. adding two positive numbers but getting a non-positive result, or
2. adding two negative numbers but yielding a non-negative result.

 Similarly, when subtracting signed numbers, overflow occurs in


two scenarios:
1. subtracting a positive number from a negative number but getting a
positive result, or
2. subtracting a negative number from a positive number but
producing a negative result.

 Overflow cannot occur when adding operands with different


signs or when subtracting operands with the same signs.

16
Overflow bit flag for signed numbers
11111 00000 00001
11110 00010
11101 00011
-1 0 1
11100 -2 2 00100
-3 3
11011 -4 4 00101

-5 5
11010 00110
-6 6
11001 00111
-7 7

11000 -8 8 01000

-9 9
10111 01001
-10 10
10110 01010
-11 11
Overflow +5
10101 -12 12 01011
-13 13
10100 -14 14 01100
-15 -16 15
10011 01101

1. On addition, overflow occurs if 𝑠𝑢𝑚 ≥ 24


10010 01110
10001 10000 01111

when adding two positives.


2. Overflow never occurs when adding two
An overflow occurs when adding two
numbers with different signs.
positive numbers and getting a negative
result.

17
Overflow bit flag for signed numbers
11111 00000 00001
11110 00010
11101 00011
-1 0 1
11100 -2 2 00100
-3 3
11011 -4 4 00101

-5 5
11010 00110
-6 6
11001 00111
-7 7

11000 -8 8 01000

-9 9
10111 01001
-10 10
10110 01010
-11 11
Overflow
10101 -12 -7 12 01011
-13 13
10100 -14 14 01100
-15 -16 15
10011 01101
10010 01110
10001 10000 01111
On addition, overflow occurs if
𝑠𝑢𝑚 < −24 when adding two
An overflow occurs when adding two negative negatives.
numbers and getting a positive result.

18
Signed or Unsigned
a = 0b10000
b = 0b10000
c = a + b
 Are a and b signed or unsigned numbers?

 CPU does not know the answer at all.


 Therefore the hardware sets up both the carry flag and
the overflow flag.
 It is software’s (programmers’/compilers’) responsibility
to interpret the flags.

19
Signed or unsigned
 Whether the carry flag or the overflow flag should be used depends on the
programmer’s intention.

 When programming in high-level languages such as C, the compiler


automatically chooses to use the carry or overflow flag based on how this
integer is declared in source code (“int” or “unsigned int”).
20
Signed or Unsigned
a = 0b10000
b = 0b10000
c = a + b
 Are a and b signed or unsigned numbers?

uint a;
uint b; Check the carry flag!

c = a + b

C Program

21
Signed or Unsigned
a = 0b10000
b = 0b10000
c = a + b
 Are a and b signed or unsigned numbers?

int a;
int b; Check the overflow flag!

c = a + b

C Program

22
Signed Integer Representation
Method 3: Two’s Complement
Assume a four-bit system:

Expression Result Carry? Overflow? Correct Result?


0100 + 0010 0110
0100 + 0110 1010
1100 + 1110 1010
1100 + 1010 0110

23
Signed Integer Representation
Method 3: Two’s Complement
Assume a four-bit system:

Expression Result Carry? Overflow? Correct Result?

0100 + 0010 0110 No No Yes


0100 + 0110 1010 No Yes No
1100 + 1110 1010 Yes No Yes
1100 + 1010 0110 Yes Yes No

24
Why use Two’s Complement

Two’s complement simplifies hardware

Operation Are signed and unsigned operations the same?


Addition Yes
Subtraction Yes
Multiplication Yes if the product is required to keep the same number
of bits as operands
Division No

25
Adding two signed integers:
(-9) + 6
-9 + 6
9 flip +1 -9
1 0 1 1 1 0 0 1 1 0 01001 10110 10111
Two’s
23 6 Complement

Simple Hardware Adder

29 3
flip +1
1 1 1 0 1 00010 00011
Two’s Complement
-3 Counterpart

26
Subtracting two signed integers:
(-9) - 6
-9 - 6
9 flip +1 -9
1 0 1 1 1 0 0 1 1 0 01001 10110 10111
Two’s
23 6 Complement

Simple Hardware Subtractor

17
15 flip +1 -15
1 0 0 0 1 01111 10000 10001

-15

27
Two’s Complement Simplifies Hardware
Implementation
 In two’s complement, the same hardware works correctly
for both signed and unsigned addition/subtraction.

 If the product is required to keep the same number of


bits as operands, unsigned multiplication hardware works
correctly for signed numbers.

 However, this is not true for division.

28
Condition Codes
Bit Name Meaning after add or sub
N negative result is negative
Z zero result is zero
V overflow signed overflow
C carry unsigned overflow

C is set upon an unsigned addition if the answer is wrong


C is cleared upon an unsigned subtract if the answer is wrong
V is set upon a signed addition or subtraction if the answer is wrong

Why do we care about these bits?

29
29
Formal Representation for Addition
R = X +Y

When adding two 32-bit integers X and Y, the flags are


 N = R31
 Z is set if R is zero.
 C is set if the result is incorrect for an unsigned addition
𝐶 = 𝑋31 & 𝑌31 ∥ 𝑋31 & 𝑅31 ∥ 𝑌31 & 𝑅31
 V is set if the result is incorrect for a signed addition.
𝑉 = 𝑋31 & 𝑌31 & 𝑅31 ∥ 𝑋31 & 𝑌31 & 𝑅31

30
Formal Representation for Subtraction
R = X -Y

When subtracting two 32-bit integers X and Y, the flags are


 N = R31
 Z is set if R is zero.
 C is clear if the result is incorrect for an unsigned
subtraction
𝐶 = 𝑌31 & 𝑅31 ∥ 𝑋31 & 𝑅31 ∥ 𝑋31 & 𝑌31
 V is set if the result is incorrect for an signed subtraction.
𝑉 = 𝑋31 & 𝑌31 & 𝑅31 ∥ 𝑋31 & 𝑌31 & 𝑅31

31
Dec Hex Char Dec Hex Char Dec Hex Char Dec Hex Char
0 00 NUL 32 20 SP 64 40 @ 96 60 ‘

ASCII 1
2
3
01
02
03
SOH
STX
ETX
33
34
35
21
22
23
!
"
#
65
66
67
41
42
43
A
B
C
97
98
99
61
62
63
a
b
c
4 04 EOT 36 24 $ 68 44 D 100 64 d
5 05 ENQ 37 25 % 69 45 E 101 65 e
6 06 ACK 38 26 & 70 46 F 102 66 f
7 07 BEL 39 27 ’ 71 47 G 103 67 g
8 08 BS 40 28 ( 72 48 H 104 68 h
American 9 09 HT 41 29 ) 73 49 I 105 69 i
Standard 10 0A LF 42 2A * 74 4A J 106 6A j
11 0B VT 43 2B + 75 4B K 107 6B k
Code for 12 0C FF 44 2C , 76 4C L 108 6C l
Information 13 0D CR 45 2D - 77 4D M 109 6D m
14 0E SO 46 2E . 78 4E N 110 6E n
Interchange 15 0F SI 47 2F / 79 4F O 111 6F o
16 10 DLE 48 30 0 80 50 P 112 70 p
17 11 DC1 49 31 1 81 51 Q 113 71 q
18 12 DC2 50 32 2 82 52 R 114 72 r
19 13 DC3 51 33 3 83 53 S 115 73 s
20 14 DC4 52 34 4 84 54 T 116 74 t
21 15 NAK 53 35 5 85 55 U 117 75 u
22 16 SYN 54 36 6 86 56 V 118 76 v
23 17 ETB 55 37 7 87 57 W 119 77 w
24 18 CAN 56 38 8 88 58 X 120 78 x
25 19 EM 57 39 9 89 59 Y 121 79 y
26 1A SUB 58 3A : 90 5A Z 122 7A z
27 1B ESC 59 3B ; 91 5B [ 123 7B {
28 1C FS 60 3C < 92 5C \ 124 7C |
29 1D GS 61 3D = 93 5D ] 125 7D }
30 1E RS 62 3E > 94 5E ^ 126 7E ~
31 1F US 63 3F ? 95 5F _ 127 7F DEL
32 Encoding 128 characters
ASCII

Memory Memory
Letter
Address Content
str + 12  0x00 \0
str + 11  0x79 y
str + 10  0x6C l
char str[13] = “ARM Assembly”; str + 9  0x62 b
// The length has to be at least 13 str + 8  0x6D m
str + 7  0x65 e
// even though it has 12 letters.The str + 6  0x73 s
// NULL terminator should be included. str + 5  0x73 s
str + 4  0x41 A
str + 3  0x20 space
str + 2  0x4D M
str + 1  0x52 R
str  0x41 A

33
String Comparison
Strings are compared based on their ASCII values
 “j” < “jar” < “jargon” < “jargonize”
 “CAT” < “Cat” < “DOG” < “Dog” < “cat” < “dog”
 “12” < “123” < “2”< “AB” < “Ab” < “ab” < “abc”

34
Find out String Length
 Stings are terminated with a null character (NUL, ASCII value 0x00)

Pointer dereference operator * Array subscript operator [ ]


int strlen (char *pStr){ int strlen (char *pStr){
int i = 0; int i = 0;

// loop until pStr[i] is NULL // loop until *pStr is NULL


while( pStr[i] ) while( *pStr ) {
i++; i++;
pStr++;
return i; }
} return i;
}

35
Convert to Upper Case
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A

a b c d e f g h i j k l m n o p q r s t u v w x y z
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A

‘a’ – ‘A’ = 0x61 – 0x41 = 0x20 = 32

Pointer dereference operator * Array subscript operator [ ]


void toUpper(char *pStr){ void toUpper(char *pStr){
for(char *p = pStr; *p; ++p){ char c = pStr[0];
if(*p >= ’a’ && *p <= ’z’) for(int i = 0; c; i++, c = pStr[i];) {
*p -= ‘a’ – ‘A’; if(c >= ’a’ && c <= ’z’)
//or: *p -= 32; pStr[i] -= ‘a’ – ‘A’;
} // or: pStr[i] -= 32;
} }
}

36

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