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    Datasheet 74HCT14

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    Humberto Acosta
    MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS. The 74HCT logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

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    Datasheet 74HCT14

    Uploaded by

    Humberto Acosta
    89 views7 pages
    MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS. The 74HCT logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

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    MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS. The 74HCT logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    89 views7 pages

    Datasheet 74HCT14

    Uploaded by

    Humberto Acosta
    MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS. The 74HCT logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

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    Attribution Non-Commercial (BY-NC)
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    MM74HCT14 Hex Inverting Schmitt Trigger

    September 1983 Revised January 2005

    MM74HCT14 Hex Inverting Schmitt Trigger


    General Description
    The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. The 74HCT logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

    Features
    s Typical propagation delay: 13 ns s Wide power supply range: 26V s Low quiescent current: 10 A maximum s Low input current: 1 A maximum s Fanout of 10 LS-TTL loads s Typical hysteresis voltage: 0.9V at VCC = 4.5V s TTL, LS pin-out and input threshold compatible

    Ordering Codes:
    Order Number MM74HCT14M MM74HCT14MX_NL MM74HCT14SJ MM74HCT14MTC MM74HCT14N Package Number M14A M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

    Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Pb-Free package per JEDEC J-STD-020B.

    Connection Diagram
    Pin Assignments for DIP, SOIC, SOP and TSSOP

    Schematic Diagram

    Top View

    2005 Fairchild Semiconductor Corporation

    DS500059

    www.fairchildsemi.com

    MM74HCT14

    Absolute Maximum Ratings(Note 1)


    (Note 2) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Lead Temperature (TL) (Soldering 10 seconds) 260C

    Recommended Operating Conditions


    Min Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) 0 VCC V 2 Max 6 Units V

    0.5 to +7.0V 1.5 to VCC + 1.5V 0.5 to VCC + 0.5V 20 mA 25 mA 50 mA 65C to +150C

    40

    +85

    Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground.

    DC Electrical Characteristics (Note 3)


    Symbol VT+ Parameter Positive Going Threshold Voltage Maximum VT Negative Going Threshold Voltage Maximum VH Hysteresis Voltage Minimum Maximum V OH Minimum HIGH Level Output Voltage VIN = VIL |IOUT| = 20 A |IOUT| = 4.0 mA, VCC = 4.5V |IOUT| = 4.8 mA, VCC = 5.5V VOL Maximum LOW Level Voltage VIN = VIH |IOUT| = 20 A |IOUT| = 4.0 mA, VCC = 4.5V |IOUT| = 4.8 mA, VCC = 5.5V IIN ICC Maximum Input Current Maximum Quiescent Supply Current VIN = VCC or GND VIH or VIL VIN = VCC or GND IOUT = 0 A VIN=2.4V or 0.5V (Note 3) 5.5V 5.5V 0 0.2 0.2 0.1 0.26 0.26 0.1 1.0 2.4 0.1 0.33 0.33 1.0 10 2.4 V V V A A mA VCC 4.2 5.2 VCC 0.1 3.98 4.98 VCC 0.1 3.84 4.98 V V V Minimum Minimum Conditions VCC 4.5V 5.5V 4.5V 5.5V 4.5V 5.5V 4.5V 5.5V 4.5V 5.5V 4.5V 5.5V TA = 25C Typ 1.5 1.7 1.5 1.7 0.9 1.0 0.9 1.0 0.6 0.7 0.6 0.7 1.2 1.4 1.9 2.1 0.5 0.6 1.2 1.4 0.4 0.4 1.4 1.5 TA = 40 to 85C Guaranteed Limits 1.2 1.4 1.9 2.1 0.5 0.6 1.2 1.4 0.4 0.4 1.4 1.5 Units V V V V V V V V V V V V

    Note 3: For a power supply of 5V 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.

    www.fairchildsemi.com

    MM74HCT14

    AC Electrical Characteristics
    VCC = 5V, TA = 25C, CL = 15 pF, tr = tf = 6 ns Symbol tPHL, tPLH Parameter Maximum Propagation Delay Conditions Typ 10 Guaranteed Limit 18 Units ns

    AC Electrical Characteristics
    VCC= 5V 10%, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol tPHL, tPLH tTLH, tTHL CPD CIN Parameter Maximum Propagation Delay Maximum Output Rise and Fall Time Power Dissipation Capacitance (Note 4) Maximum Input Capacitance 5 10 10 pF
    Note 4: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f+ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f+ICC.

    Conditions

    TA = 25 Typ 20 9 15 25

    TA = 40 to 85C Guaranteed Limits 25 19

    Units ns ns pF

    (per gate)

    Typical Performance Characteristics


    Input Threshold, VT+, VT, vs Power Supply Voltage Propagation Delay vs Power Supply

    Typical Applications
    Low Power Oscillator

    Note: The equations assume t1+t2>>tpd0 +tpd1

    www.fairchildsemi.com

    MM74HCT14

    Physical Dimensions inches (millimeters) unless otherwise noted

    14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A

    www.fairchildsemi.com

    MM74HCT14

    Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

    Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D

    www.fairchildsemi.com

    MM74HCT14

    Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

    14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14

    www.fairchildsemi.com

    MM74HCT14 Hex Inverting Schmitt Trigger

    Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

    14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A

    Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

    www.fairchildsemi.com

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