Assembler Programming of Atmega328P
(Lecture-13)
R S Ananda Murthy
Associate Professor
Department of Electrical & Electronics Engineering,
Sri Jayachamarajendra College of Engineering,
Mysore 570 006
R S Ananda Murthy Assembler Programming of Atmega328P
Specific Learning Outcomes
After completing this lecture, the student should be able to –
Explain how signed numbers are represented in
Atmega328P.
Explain how S and V flags are affected when two signed
numbers are added.
Explain the difference between N and S flags.
Realize time delay by writing appropriate assembly
language code for Atmega328P.
Calculate time delay caused by a delay program written in
assembly language for Atmega328P.
Use subroutines in assembly language programming.
Apply look-up table technique in an assembly language
program for Atmega328P.
R S Ananda Murthy Assembler Programming of Atmega328P
Representation of Signed Numbers in Atmega328P
Number Positive Number 2’s Complement
(−5)10 (00000101)2 (11111011)2
(−34)16 (00110100)2 (11001100)2
(−128)10 (10000000)2 (10000000)2
MSB = 0 for a positive number and MSB = 1 for a negative
number. The remaining bits indicate the magnitude.
In Atmega328P negative numbers are represented as 2’s
complement of the positive number.
To obtain the 2’s complement representation of a negative
number first write the positive number, invert each bit
including the sign bit, and add 1 to it.
Notice that (−128)10 and (128)10 are represented by the
same bit pattern.
R S Ananda Murthy Assembler Programming of Atmega328P
Conditions for Setting or Clearing of V Flag
When two 8-bit signed numbers are added, if the
magnitude of actual result exceeds the capacity of the
register, then, V flag is set under either of the following two
conditions:
There is a carry from D6 to D7 but no carry out of D7
(C = 0).
There is a carry from D7 out (C = 1) but no carry from D6
to D7.
When two 8-bit signed numbers are added, the V flag is
cleared if carry out of D6 and carry out of D7 are of same
state.
R S Ananda Murthy Assembler Programming of Atmega328P
What is the Difference between N and S Flags?
N flag represents MSB of the result when two 8-bit
numbers are added.
When two signed numbers are added, if V = 1 indicating
an overflow then, the correct sign of the result is indicated
by the S flag and not by N flag.
When two signed numbers are added, if V = 0 indicating
no overflow then, the correct sign of the result is indicated
by both S flag and N flag.
R S Ananda Murthy Assembler Programming of Atmega328P
Examples of Signed Number Additions
Verify the status of V, N, and S flags after each of the following
operations:
1 (96)10 + (+70)10 . In this case V = 1, N = 1, S=0.
2 (−128)10 + (−2)10 . In this case V = 1, N = 0, S=1.
3 (−2)10 + (−7)10 . In this case V = 0, N = 1, S=1.
4 (7)10 + (18)10 . In this case V = 0, N = 0, S=0.
Note that overflow may occur only when two signed numbers of
the same sign are added.
R S Ananda Murthy Assembler Programming of Atmega328P
Methods of Realizing Time Delays
By software — contents of GPR is decremented to cause
time delay. The delay realized depends upon the initial
number stored in the GPR and the clock frequency of the
MCU.
Short time delay can by realized by using a delay loop.
Longer time delay can be realized by nesting delay loops.
By using timer — in this case, the timer register is loaded
with an initial number. This is counted down by applying a
clock signal to the timer to cause time delay. The time
delay depends upon the initial number and the frequency of
the clock signal. We will discuss timers in another lecture.
Note: Delay realized by using timers is generally more accurate
as compared to delay caused by software.
R S Ananda Murthy Assembler Programming of Atmega328P
Time Delay using a Single Delay Loop
Time delay caused by the code given above is
t = 2T + (NUM)T + (NUM − 1)T = 3T × NUM
The maximum delay we can get using this code is
tmax = 3T × 255
So, NUM to be loaded initially for a given delay is
t
NUM =
3T
So, NUM = 0xA6 to realize a delay of 500µs at default clock
frequency of 1 MHz.
R S Ananda Murthy Assembler Programming of Atmega328P
Realizing Longer Time Delay by Nesting Loops
The above given program causes a time delay of about
0.195075 ≈ 0.2 seconds when T = 1µs.
R S Ananda Murthy Assembler Programming of Atmega328P
Subroutine for About 1 Minute Delay
The above given subroutine gives approximately 1 minute
delay. Why is this approximate?
R S Ananda Murthy Assembler Programming of Atmega328P
Checking Longer Time Delay using Stop Watch
Atmega328P
PB6 PC0
LED
A push button is connected to PB6 pin and an LED to PC0
of Atmega328P. Write a program to switch ON the LED
one minute after the push button is pressed. When the
push button is not pressed, the LED should be OFF. Use
delay subroutine. Check the timing using a stop watch.
R S Ananda Murthy Assembler Programming of Atmega328P
Counting when Pushbutton is Pressed
Atmega328P Common Cathode Type
h
PD7 g
PD6
PD5 f
PD4 e
PB0 d
PD3
PD2 c
PD1 b
PD0 a
Display number of times key is pressed starting from 0.
After 9 the next pressing should reset the display to zero
and repeat.
At every key pressing count up till 9 and count down to 0
and repeat.
R S Ananda Murthy Assembler Programming of Atmega328P
License
This work is licensed under a
Creative Commons Attribution 4.0 International License.
R S Ananda Murthy Assembler Programming of Atmega328P
