Microprocessors and Microcontrollers

MICROELECTRONICS
 The science and technology of designing, fabrica�ng, and
u�lizing electronic devices and circuits on a microscopic scale.
 serves as the founda�on for both microprocessors and
microcontrollers.
• Microprocessor Unit
• Process
• Registers CPU Microprocessor
• Memory  Example analogy:
• Control Unit CPU = human brain
Body parts = external devices (mouse, keyboard, wifi,
• Other Parts of Microprocessor Bluetooth card, etc.)
• Architecture Each one of these components houses its own
• How Microprocessor works embedded system which contains
microprocessor.
• Microcontroller vs Microprocessor
• Power supply
Feature Microprocessor CPU
Integrated Circuits (IC) A single IC that contains all The electronic circuitry
 AKA Solid State Circuit, chip of the components of a that executes
 A circuit of transistor, resistors, and capacitors Defini�on CPU instruc�ons
 specific device designed to perform specific func�ons.
ALU, registers, control unit, ALU, registers, control
memory management unit, unit, and memory
Micro- Micro- Micro- and I/O interface management unit
Parts
Feature processor controller computer
Typically, much larger
Small Small
Size Varies than a microprocessor
Type CPU computer computer
Compo- CPU, memory, CPU, memory, Loca�on On a motherboard On a chip
nents CPU I/O ports I/O ports, OS To control the opera�ons
Applica- General- Embedded Personal or Purpose To execute instruc�ons of a computer
�ons purpose systems business

CLOCK
 clock of a digital system is a periodic signal.
 usually, a square wave to trigger memory latches
simultaneously throughout the system.
 Clock circuit controls the opera�on of the microprocessor.

Memory -> Registers

Difference between a Microprocessor and CPU

 CPU is essen�ally a microprocessor, but not all microprocessors
Processing Speed
are CPUs.
 AKA “Throughput”
 A CPU issues commands to microprocessors and in return the
 Number of instruc�ons executed per second.
microprocessors send data to the CPU or other component as
 expressed in MIPS (Millions of instruc�ons per second).
specified by the CPU.
 Most dependent on clock rate. A faster clock rate means that
you can process more instruc�ons in a given amount of �me
at the cost of increased power consump�on.
T State: One subdivision of an opera�on performed in one
clock Cycle.
 Microprocessors and Microcontrollers
.MICROPROCESSOR (𝝁𝝁𝝁𝝁 𝒐𝒐𝒐𝒐 𝑴𝑴𝑴𝑴𝑴𝑴). MACHINE CYCLE
 the �me required for comple�ng the opera�on of accessing
 A programmable IC, mul�purpose, clock-driven, register-
memory or I/0 devices.
based electronic device that process input data and translates
1. Opcode Fetch (Fetch, Decode, Execute)
it into a binary code, which device can understand and
2. Memory Read
provides output that can be used to control external devices.
3. Memory Write
 Heart of Computer System
4. I/O Read
5. I/O Write

The first machine cycle of any instruc�on is Opcode fetch which

consist of three steps:
1. Fetch
 instruc�ons are stored in the memory in a sequen�al
order. The microprocessor fetches those instruc�ons from
the memory.
2. Decode
 During this cycle the instruc�on inside the IR (Instruc�on
Register) gets decoded
3. Execute
 and executes those instruc�ons �ll STOP instruc�on is
reached.
 it sends the result in binary to the output port.

How does Microprocessor Works?

1. FETCH:
 The control unit fetches the next instruc�on from
memory, using the program counter (a special register) to
keep track of the current instruc�on's address.
Block Diagram of a Basic Microprocessor 2. DECODE:
 The control unit decodes the instruc�on, determining its
type (e.g., arithme�c, data transfer, logical) and the operands
(data) it needs.
3. Operand Fetch:
 If necessary, the control unit fetches any required operands
from memory or registers.
4. EXECUTE:
 The control unit sends signals to the ALU and registers to
execute the instruc�on.
5. STORE RESULT:
 If the instruc�on produces a result, the control unit stores it
in a register or memory.
6. NEXT INSTRUCTION:
 The control unit updates the program counter to point to the
next instruc�on, and the cycle repeats.

KEY POINTS:
• The Control Unit is like the conductor, orchestra�ng the
Fetch – Decode – Execute Cycle.
• The ALU is the workhorse, performing calcula�ons and logical
opera�ons.
• Registers provide quick access to frequently used data and
instruc�ons.
• This cycle repeats con�nuously, allowing the microprocessor to
execute programs and perform tasks.
 Microprocessors and Microcontrollers
BASIC MICROPROCESSOR SYSTEM I/O chip as well but again, this causes no problem because its
chip select line is keeping it switched off.
9. The number 25 is now safely stored in the RAM chip and will
remain there un�l it is over-writen with new informa�on, or
the power is switched off.

Instruc�on: Send the number 25H which is in the ROM and store it
in the RAM at address 2500H.

1. The microprocessor has to collect the instruc�on from an

address in ROM. It does this by pu�ng the address onto the
address bus.
2. The address is applied to the ROM and the RAM as well as the
address decoder. (This will not cause any problems because all
the chip selects will be switched off at the moment.) When the
logic gates within the address decoder responds to the input
from the address bus the result will be that the ROM is
switched on and the other two are kept off.
3. (Switching on the ROM will mean that it takes in the address
from the address bus.) Inside the ROM chip, the row and
column decoders ac�vate one of the memory loca�ons and the
binary number stored at that loca�on is placed on the data bus
by switching on the tri-state buffers. As soon as the informa�on
is read, the chip select will switch the ROM chip off.
4. The informa�on which is now on the data bus is read by the
microprocessor. It is an instruc�on which can be interpreted as
‘go to address F600H and read the number that is stored in that
address’.
5. In response to this instruc�on, the microprocessor puts the
address F600H onto the address bus.
6. The address decoder applies this number to its logic gates, and
this results in the chip select (CS) of the ROM chip being
switched on again. The ROM chip accepts the address F600H
into its row and column decoders and then puts the number
25H onto the data bus.
7. This number is stored temporarily in the microprocessor.
8. The microprocessor then puts the number 2500H onto the
address bus and the address decoder puts a signal on the chip
select of the RAM chip to switch it on. It then sends a logic 1 on
the read/write line. The RAM is switched on and it is told to
read the data on the data bus. The read/write line goes to the
 Microprocessors and Microcontrollers
CONTROL UNIT REGISTERS
 controls the flow of data and instruc�ons within the computer.  Small, high-speed storage units within the microprocessor,
 It informs the ALU, memory/registers and I/O devices how to holding data, instruc�ons, and addresses that the CPU is
respond to the command that have been sent to the processor. currently processing.
 Fetch, Decode Execute  Vola�le memory (memory is cleared when power is off)
 is like the conductor, orchestra�ng the  located inside the CPU/MPU.
Fetch – Decode – Execute Cycle.  Connec�ons of FLIP – FLOPS
FLIP – FLOPS
 also called a Bistable Mul�vibrator
Arithme�c Logic Unit (ALU)  A circuit that has two stable states that can remain in
 It performs arithme�cal and logical opera�ons on the data either state indefinitely.
received from the memory or an input device.  An external trigger can change the output.
 can be used to store state informa�on.

FLAGS
 single-bit indicators that may be set or cleared to show the Types of register:
results of logical or arithme�c opera�on. • MDR (Memory Data Registers)
• MAR (Memory Address Registers)
• MBR (Memory Buffer Registers)
• CIR (Current Instruc�on Registers)
• AC (Accumulator)
• PC (Program Counter)

Accumulator (Ac)
 Where intermediate arithme�c and logic results are stored.

Program Counter
 Contains the address of the next instruc�on to be executed.

Register Array
 consists of registers iden�fied by leters like B, C, D, E, H, L and
accumulator.

Difference between Register and Memory

Feature Registers Memory

Loca�on Inside CPU Outside CPU

Speed Fast Slow

Capacity Small Large

Store data and Store data and instruc�ons
instruc�ons that are that are not currently being
Purpose being used by CPU used by CPU
 Microprocessors and Microcontrollers
.MEMORY. Random Access Memory (RAM)
 a storage unit that is a larger but slower compared to Register.  short-term data storage
 located outside the CPU/MPU.  is a read/write memory where the data can be read from or
 It is used to store data and instruc�ons that are not currently writen into any of the memory loca�ons regardless of the
being used by the CPU/MPU. order in which they are arranged, hence the name random.
 holds data and instruc�ons that are entered through the input  used to store data, program instruc�ons and the results of any
unit before they are processed. intermediate calcula�ons during the execu�on of a program.
 saves the data for the later use.  has three basic building blocks, an array of memory cells
arranged in rows and columns with each memory cell capable
of storing either a '0' or ‘1', an address decoder and a
𝑀𝑀 = 2𝑛𝑛
read/write control logic.
𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶 = 𝑀𝑀𝑀𝑀 = (2𝑛𝑛 )𝐷𝐷

𝑀𝑀 = # 𝑜𝑜𝑜𝑜 𝑚𝑚𝑚𝑚𝑚𝑚𝑚𝑚𝑚𝑚𝑚𝑚 𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐 (𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜)

𝑛𝑛 = # 𝑜𝑜𝑜𝑜 𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎𝑎 𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 (𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖)
𝐷𝐷 = # 𝑑𝑑𝑑𝑑𝑑𝑑𝑑𝑑 𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙

1. Primary Storage
 It stores and provides the data very fast.
 temporary in nature.
 To store the data permanently, the data has to be
transferred to the secondary memory.
2. Secondary Storage
 slower and cheaper than the primary memory.
 Hard Disk, SSD, flash drive, CD etc.
 The program that you run on the computer is first
transferred to the primary memory before it is actually
run. Whenever the results are saved, again they get
stored in the secondary memory.
Sta�c RAM (SRAM)
 Holds values as long as power is on.
 Access �me is very fast.
 basic element of SRAM is a latch memory cell.
 Row Decoders only.

Vola�le
 Data erase when power is off.

Non-Vola�le
 Data stored are accessible even a�er power is off.
 Microprocessors and Microcontrollers
Dynamic RAM (DRAM)
 comprises a Capacitor and a MOSFET.
 Since it uses capacitors, it stores informa�on as long as Parameters Cache Memory Register
power is applied, and the memory is refreshed periodically. Defini�on Cache is the fastest The registers are
 holds a value of '1' when the capacitor is charged and '0' when and smallest fast storage
it is discharged. component of elements present in
memory in a a very small
 major applica�on of RAM is its use in CACHE memories.
computer system. amount in the
 Row and Column Address
computer
processor.
Data Stored The recently used The data that the
info/data of a computer’s CPU is
computer gets currently
stored in the cache. processing gets
stored in the
registers.
Used by CPU The CPU u�lizes a The CPU u�lizes
cache for detec�ng registers for
the data that was processing all the
stored previously. data and info that
is new.
Loca�on We can locate the The registers form
cache of a system a part of a
on its motherboard computer device’s
or inside the CPU. CPU.
Data Processing It stores data in a It stores data in an
processed form. unprocessed form.
CPU Memory The CPU of a When opera�ng on
Access Speed system can access registers, a CPU can
the cache memory operate on its
much faster than contents at a rate
that of the register of mul�ple
memory. opera�ons in a
single clock cycle.
Examples Database Query The loop is an
Cache, Dynamic example of the
Page Cache, etc., registers.
are a few examples
Cache Memory of Cache memory.
 high-speed memory that comparable with that of the CPU.
 located between the main memory and the CPU.
 communicates directly with the CPU at high-speed. Stack Memory
 stores the most recently used instruc�ons or data.  area of memory for keeping temporary data.
 CPU uses cache memory to store instruc�ons that are  data is added or removed in a "Last-In-First-Out" (LIFO)
repeatedly required to run programs, improving overall system manner.
speed.  logical construct or memory management technique
 When the processor needs data, it. checks in the high-speed implemented on top of physical hardware memory, typically
cache to see if the data are there. If they are there, called a ' the main memory (RAM).
cache hit', then CPU accesses the data from the cache. If they  used by the CALL instruc�on to keep the return address for
are not there, called a 'cache miss', then the CPU retrieves procedures.
them from the rela�vely slower main memory.
 Microprocessors and Microcontrollers
Read Only Memory (ROM) .BUSES.
 used for permanent or semi-permanent storage of data.  “Transmission line”, bus = line: address bus = address line
 stores cri�cal programs such as the program that boots the  Is a signal lines that enable the flow of electrical impulses (data)
computer (firmware). between components inside a computer or between
 Non-vola�le, data retained even a�er the power is turned off. computers.

Mask Programmed ROMs

 is programmed at the manufacturer's site according to the
specifica�ons of the customer.
 basic storage element is an NPN bipolar transistor, connected in
common-collector configura�on, or a MOSFET in common drain
configura�on.
 rarely used in new products.

Programmable ROM (PROM)

 one-�me programmable ROMs
 programming is done by the customer,
using PROM programmer.

Erasable PROM (EPROM)

 can be erased and reprogrammed as many �mes as desired.
 Once programmed, it. is non-vola�le.
 programming pulse (in the range 5 - 10 V)

Data Bus
 two-way transmission line (CPU   memory, I/O)
Electrically Erasable PROM (EEPROM)  connects all the internal computer components to the CPU and
main memory.
Ultraviolet-Erasable PROM (UVEPROM)  transfers data bits from processor to memory and from
memory to I/O.
Flash Memory
 high-density non-vola�le read/write memory.
 combines the low cost and high-density features of an UV
Address Bus
EPROM and the in-circuit electrical erasability feature of  one-way transmission line (CPU  memory, etc.)
EEPROM without compromising the high-speed access of both.  transfer address bits to the memory.
 Structurally, the memory cell of a flash memory is like that of  In memory or RAM, every memory loca�on has some address.
an EPROM. The processor assigns addresses to the memory and these
addresses are transferred through the address bus.

Addressing Capability = memory loca�ons

To sum up, while PROMs are least complex and low cost, they
cannot be erased and reprogrammed. UVEPROMs are a litle more 𝑀𝑀 = 2𝑛𝑛 ; n = Address line
complex and costly, but then they can be erased and reprogrammed
by being taken out of the circuit Flash memories are in-circuit Control Bus
electrically erasable either sector wise or in bulk mode. The most
 two-way transmission line (Control Unit   memory, I/O)
complex and most expensive are the EEPROMs, but then they offer
byte-by-byte electrical erasability in circuit.
 connec�ons such as: chip select and read/write pins.
 Microprocessors and Microcontrollers
.PERIPHERAL. .COMPUTER ARCHITECTURE.
 device used to put informa�on into or get informa�on out of  fundamental working principle of the internal logical structure
the computer. of a computer system.
 end-to-end structure of a computer system that determines
how its components interact with each other in helping to
execute the machine’s purpose (i.e., processing data)
 set of rules and methods that describe the func�onality,
management and implementa�on of computers.

Input-Output Interface Purpose of computer architecture

 used to synchronize the opera�ng speed of CPU with respect to  Everything a system performs (collect, transmit, and interpret
input-output devices. numbers.)
 it selects the input-output device which is appropriate for the
interpreta�on. Mul�faceted func�ons
 Converts serial-parallel or Digital-Analog signals.  computer architecture includes both so�ware and hardware.

Computer Architecture begins with the bootup process.

Once the firmware is loaded, it can ini�alize the rest of the
Input-Output Ports computer architecture and ensure that it works seamlessly.
1. Port-mapped I/O
 I/O devices are mapped into a separate address space.
 Use special class of CPU instruc�ons to access I/O. BOOTING UP
 programs are executed by the processor whenever the
computer is switched on.
2. Memory-mapped I/O  These programs configure the computer’s proper func�oning
 Same address bus to address memory and I/O devices. and ini�alize the different hardware sub-components to a
 Access to the I/O devices using regular instruc�ons. known state.
 This so�ware is known as firmware since it is persistently
PIA – Programmable Interface Adapter preserved in the computer’s memory.
VIA – Versa�le Interface Adapter The firmware is embedded in the hardware and may not be
PIO – Programmable Input/Output changed.

PPI – Programmable Peripheral Interface FIRMWARE

 provides instruc�ons on how the device is supposed to
operate.
 responsible for controlling the basic func�ons of the computer,
such as the boot process and the management of hardware
devices.

Opera�ng System (OS)

 governs the computer’s func�onality just above firmware.
 manages the computer's resources, such as memory, storage
space, external devices etc.

Feature Firmware Opera�ng System

Loca�on Embedded in hardware Stored on disk

Controls basic hardware Provides interface between
func�ons. user and hardware.
provides the basic provides a pla�orm for
founda�on for the running so�ware
Purpose computer system. applica�ons.

Language Low-level High-level

Examples BIOS, UEFI Windows, macOS, Linux

Stored in ROM DISK, copy on RAM

Modifi-
ca�on NO YES
 Microprocessors and Microcontrollers
Components of Computer Architecture Instruc�on Set Architecture (ISA)
 is a bridge between the so�ware and hardware of a computer.
 translates high-level language into binary language.

Reduced instruc�on set compu�ng (RISC)

 execute only one simple instruc�ons per clock cycle.
 Simple types of addressing modes.
 designed to reduce the execu�on �me.
 Fixed length instruc�on for pipelining.

Complex instruc�on set compu�ng (CISC)

 complex instruc�ons and takes mul�ple cycles.
 designed to decrease the memory cost.
 Variable instruc�on size for pipelining.
1. Input unit and associated peripherals
2. Output unit and associated peripherals
3. Storage unit/memory
 Primary (ROM, RAM, etc.)
 Secondary (HDD, SSD, etc.)
4. Central processing unit (CPU)
 Register, ALU, Control Unit
5. Bootloader
 Part of the firmware
 specific program that is responsible for loading the
Opera�ng System into memory when a computer is turned
on.
6. Opera�ng system (OS)
7. Buses RISC CISC
8. Interrupts uses small instruc�on set of offers hundreds of instruc�ons
 AKA “traps” or “excep�ons” fixed length. of different sizes (variable)
 They serve as a signal for the opera�ng system or a system simple instruc�ons are has a set of special purpose
service to carry out a certain func�on or respond to an executed in one clock cycle. circuits which help execute the
error condi�on. instruc�ons at a high speed.
 simple to design. complex to design.
They are inexpensive. rela�vely expensive.
Examples: SPARC, POWER PC. Examples: Intel architecture,
TYPES OF COMPUTER ARCHITECTURE AMD.
less number of instruc�ons. more number of instruc�ons.
fixed-length encodings for variable-length encodings of
instruc�ons. instruc�ons.
Simple addressing formats are instruc�ons interact with
supported. memory using complex
addressing modes.
It doesn't support arrays. large number of instruc�ons. It
supports arrays.
It doesn't use condi�on codes. Condi�on codes are used.
Registers are used for The stack is used for procedure
procedure arguments and arguments and return
return addresses. addresses.
 Microprocessors and Microcontrollers
Microarchitecture MOST RELEVANT COMPUTER ARCHITECTURES:
 internal design of a CPU 1. Von Neumann architecture
 logical arrangement of the processor’s electrical components  AKA “Princeton architecture”
 details of how the CPU is implemented, such as the number of  called control flow computers because instruc�ons are
registers, the size of the cache, and the design of the executed sequen�ally as controlled by a program counter.
instruc�on pipeline.  consisted of a CPU, memory, and I/O devices.
 single, shared memory for programs and data,
Client-server architecture  single bus for memory access, an arithme�c unit, and a
program control unit.
 is a compu�ng model in which the client requests a service
 The program is stored in the memory.
from the server, which then fulfills that request. This model is
CPU fetches an instruc�on from the memory at a �me and
o�en used to distribute workload and resources across mul�ple
executes it.
computers.

Single Instruc�on, Mul�ple Data (SIMD)

architecture
 can process mul�ple data points simultaneously.
 Supercomputers
 all processors receive an iden�cal command from the control
unit yet operate on dis�nct data packets.

2. Harvard architecture
Mul�core architecture  has two separate memory spaces dedicated to data and
 has mul�ple processing cores on a single chip. program/instruc�on code,
1. Symmetric mul�processing (SMP)  two address buses,
 all cores share the same memory and I/O resources. two data buses for accessing two memory spaces.
 This can improve performance for applica�ons that can  offers fetching and execu�ons in parallel.
use all of the cores simultaneously.
2. Heterogeneous mul�processing (HMP)
 cores may have different capabili�es.
 This can improve performance for applica�ons that can
use the specific capabili�es of each core.

Von
Feature Neumann Harvard RISC CISC
Instruc�on Large and Small and Small and Large and
set complex simple simple complex
Instruc�on Complex Simple and Simple and Complex
decoding and slow fast fast and slow
Good for Good for
general- Good for Good for high-
Perfor- purpose scien�fic embedded performance
mance compu�ng compu�ng systems compu�ng
Power
consum-
p�on High Low Low High

Cost Low High Low High

Flexibility High Low High Low

Reliability High High High High

 Microprocessors and Microcontrollers

Feature
Von Neumann
architecture Harvard architecture
.MICROCONTROLLER.
 Single IC that is typically used for specific applica�on and
Single memory space designed to implement certain tasks.
for instruc�ons and Separate memory spaces  incorporates all the features that are found in a microprocessor
Memory data for instruc�ons and data + built in ROM, RAM, parallel/serial I/O, counters, and a clock
circuit.
Can be slower for  Heart of the Embedded system
applica�ons that Can be faster for
require a lot of memory applica�ons that require a
Performance accesses lot of memory accesses

2 clock cycle/
Execu�on instruc�on 1 clock cycle/instruc�on

Complexity Less complex More complex

Cost Less expensive More expensive

Flexibility More flexible Less flexible Microprocessor

Reliability More reliable Less reliable

Applica�on Personal Computer Microcontroller, DSP

Microcontroller

Feature Microprocessor Microcontroller

General-purpose
Purpose compu�ng Embedded control
ALU, general-purpose
register, stack pointer. circuitry of
program counter, clock microprocessor + built-
�ming and interrupt in ROM, RAM, I/O,
Components circuit. �mers and counters
Instruc�ons/
Calcula�on Complex Simple

Clock Speed More (above 1 GHz) Less (20-120MHz)

Cost More Less

Power More Less

Clock speed
Typical Computers, laptops, Cars, appliances,
applica�ons smartphones, tablets industrial equipment
 Microprocessors and Microcontrollers
.COMPUTER LANGUAGES. .TRANSLATORS.
shared w/ Computer Programming

High-level languages
 In this language, program (source code/program) is writen in
English-like words syntax and these programs are executed on a
microprocessor using a translator named as compiler or an
interpreter.

Assembly language
 uses mnemonics (shorthand for machine instruc�ons) to make
the code easier to read and write.
 The 8085 microprocessor has 246 such bit paterns, amoun�ng
to 74 different instruc�ons for performing various opera�ons.
These 74 different instruc�ons are called its instruc�on set.

Machine language Compiler

 lowest level of programming language.  is a program that converts the instruc�on of a high-level
 direct representa�on of the instruc�ons that the computer's language into machine language as a whole.
hardware can understand.  Source code/program (high level language)  compiler 
 executed directly by a computer's central processing unit (CPU). object program (machine language)
 paterns of bits, with different paterns corresponding to  checks each statement in the source program and generates
different commands to the machine. machine instruc�ons.
 Every CPU or a microprocessor bas its own machine code, or  also checks syntax errors in the program.
instruc�on set.  A source program containing an error cannot be compiled into
an object program.

Hardware
 Binary codes to pulses. Interpreter
 is a program that converts one statement of a program at a
�me.

Machine Assembly High-level

Feature Language Language Language
Assembler
 is a program that takes basic computer instruc�ons and
Level of converts them into a patern of bits that the computer's
abstrac�on Lowest Lower Highest processor can use to perform its basic opera�ons.
Ease of use Most difficult More difficult Easiest  takes each program statement in the source program and
generates a corresponding bitstream or patern (a series of 0's
Speed Fastest Slower Slowest and 1's of a given length).

Portability Least portable More portable Most portable

Least Most
Feature Compiler Interpreter Assembler
Expressiveness expressive More expressive expressive
High level High level Assembly
Python, Java,
Translates language language language
Examples Binary code Mnemonics C++
Translates all at
once Yes No Yes
Stores machine
code Yes No No
Executes machine
code No Yes Yes

Speed Slow Fast Fastest

Portability High Low Low

Expressiveness Low High High

Python, Ruby,
Examples C, C++, Java PHP Assembly
 Microprocessors and Microcontrollers
.CLASSIFICATION OF COMPUTERS. 8 Mechanical Calculators before modern computers
were invented.
Mainframe Computer 1. Abacus (ca. 2700 BC)
 largest and most powerful computers 2. Pascal’s Calculator (1652)
 implemented using two or more CPU.
3. Stepped Reckoner (1694) - Leibniz
 fastest and the most powerful mainframe computers are called
supercomputers. 4. Arithmometer (1820)
 complex scien�fic calcula�ons, large data processing, military 5. Comptometer (1887) – first push buton
defense control and computer graphics displays for fic�on 6. Comptograph (1889)
movies. 7. The Difference Engine (1822) - Charles Babbage
8. Analy�cal Engine (1834) - Charles Babbage
Minicomputer 9. The Millionaire (1893)
 work directly with the smaller data words and have smaller
memory.
 have mul�ple processors. Intel 4004 Microprocessor
 mul�user systems.  World’s first microprocessor
 scien�fic, research, data processing applica�ons, etc.  4-bit microprocessor
 4096 memory loca�ons = 2^12 (12 address line)
Microcomputers
 Contains: Microprocessor (CPU), ROMA, RAM, I/O ports
 Low-cost small digital computers. Things to Remember!
 Portable computers, personal computers (PCs), computers for  8 bits = 1 byte
dedicated applica�ons such as industrial control, 4 bits = 1 nibble = ½ byte
instrumenta�on, appliances control, etc. 16 bits = 1 word = 2 bytes
kilobyte (Kb) = 210 bytes (1024 bytes)
Megabyte (Mb) = 220 bytes (1,048,576 bytes).
MB = MegaByte (1MB = 8Mb)
.GENERATION OF COMPUTERS.  Gray code is also known as reflected code.
VcTIMA  Vc = Vacuum tube  Mul�plexing means transmi�ng large number of informa�on
units over a smaller number of channels or lines.
T = Transistor
 demul�plexer is a circuit that receives informa�on on a single
I = IC line and transmits that informa�on on a one of 2n possible
M = Microprocessor output lines.
A = AI  counter is a frequency divider circuit that is driven by a clock
signal and can be used to count the number of clock cycles.
 Shi� register can be used as ring counter.
 Twisted ring counter is also called Johnson's ring counter.
Genera�on Time-Period Hardware  The basic logic gates are AND, OR, NAND, NOR, XOR,
INV/NOT, and BUF.
 The half adder (2 bits).
First
1940s – 1950s Vacuum Tube Based  Full adder (3 bits) MSF is called "carry-bit."
Genera�on
 subtrac�on opera�on and logic manipula�ons use
complements.
Second
1950s – 1960s Transistor Based
Genera�on

Third
1960s – 1970s Integrated Circuit Based
Genera�on

Fourth
1970s – Present Microprocessor Based
Genera�on

Ar�ficial Intelligence
Fi�h
Present – Future Based, Quantum
Genera�on
compu�ng