Vlsi Test Structures For Process Characterization
Vlsi Test Structures For Process Characterization
Vlsi Test Structures For Process Characterization
Outline
Introduction
4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures 5/25/2013 2
Introduction
Microelectronic test structures are typically included in
Integrated Circuit (IC) designs to enable measurements of process or device parameters for characterization or process control.
The major use of test structures is to extract device and
process parameters at the end of the production line in order to verify that the process has been successful .
that they take up valuable space on a wafer which could be occupied by product.
Test patterns can be introduced into a process either as
individual structures placed in the scribe channels between the product die or as dropinswhich are complete test structure chips.
Drop in test chips will replace one or more of the product
die on the wafer and their use must be traded off against the loss of product.
5/25/2013
equipment through metal pads (typically 80-120um square) which can be contacted either with manual probe needles moved by micromanipulators or through the use of a probe card. A2xNprobe card can be used to probe any device on the chip. While the use of the 2 x N type structure is very good from the point of view of flexibility it does suffer from increased testing times due to the extra prober movement required within the chip.
5/25/2013
Reliability Evaluations
Defect Monitoring Transistor Parameter Extraction and
5/25/2013
Outline
Introduction Sheet Resistance Measurement Four-Probe Resistivity Measurements with the Model
4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures
5/25/2013
Resistivity
Resistivity is probably the most basic parameter for a
conductor or semiconductor material and it is denoted by the symbol with units of . A bar of conducting material with uniform resistivity is shown in the fig below and the resistance between the electrodes is given by
5/25/2013
Derivation
The expression for the Electric Field is
fig a, is then
For the configuration in Fig b the voltage is the voltage at probe 2 is And at probe3 it is
5/25/2013
10
5/25/2013
11
5/25/2013
12
5/25/2013
13
5/25/2013
measure resistivity is the four-point probe(FPP) method where four point contacts are made to the surface of the material being measured.
Typical values for the tip spacing range from 0.5 to 1.5mm.
14 5/25/2013
semi-infinite (i.e. the thickness, width and length of the sample are each much greater than the tap spacing) then the resistivity can be calculated using
measure samples which are not semi-infinite and in that case a correction factor F is added to the equation to correct for the sample geometry .
15
5/25/2013
Sheet Resistance
When the thickness t of the conducting material is much
less than the tap spacing. In this case, the equation for resistivity can be reduced to
aluminium or a diffused or implanted conducting layer at the surface Because of the difficulty in measuring the thickness of such a conducting layer they are often characterized by their sheet resistance which is expressed in units of ohms per square. probe 16 The sheet resistance is calculated from four-point 5/25/2013
resistance of a thin film, given that the sample is too small for the FPP technique, is to use a van der Pauw type test structure.
towards point contacts and the sample material be homogeneous in thickness and resistivity .
17
5/25/2013
18
5/25/2013
contacts are equally spaced around the boundary then R(AB,CD)=R(BC,DA) and the formula reduces to
with a four-point probe technique and can of course be changed to an expression for sheet resistance by dividing both sides by t.
19
5/25/2013
20
5/25/2013
measurements is that the contacts are non-ideal and have a finite size. Van der Pauw found that the effect can be reduced by using a clover leaf shaped sample as shown
21
5/25/2013
developed for the measurement of the resistivity of large discrete samples of semiconductor materials.
The next development in this field was the evolution of
structures which could be made using standard micro fabrication techniques, and on the same scale as microelectronic devices in order to measure the sheet resistance of thin films or diffused layers.
The Greek cross sheet resistor is a special case of the
structure would only need one resistance measurement in practice four measurements are required:
two at the zero-degreemeasurement position and two at the ninety-degree orientation.
23
5/25/2013
and
24
5/25/2013
Where r is given by
25
Equipotential contours in a Greek cross structure. The contour spacing is 50mV , running from 1V at terminal A to 0V at terminal B.
26
5/25/2013
Equipotential contours in a box cross structure. The contour spacing is 50mV ,running from 1V at terminal A to 0V at terminal B
27
5/25/2013
cross are widely used in the characterization of thin film sheet resistances.
28
5/25/2013
Performing van der Pauw Sheet Resistance Measurements Using the Keithley S530 Parametric Tester
29
5/25/2013
Outline
Introduction
30
Model 4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures
5/25/2013
31
5/25/2013
The two outer probes are used for sourcing current and the two inner probes are used for measuring the resulting voltage drop across the surface of the sample. The volume resistivity is calculated as follows: = volume resistivity (W-cm) V = the measured voltage (volts) I = the source current (amperes) t = the sample thickness (cm) k* = a correction factor based on the ratio of the probe to wafer diameter and on the ratio of wafer thickness to 5/25/2013 32
Using the Model 4200-SCS to Make Four Point Collinear Probe Measurements
The Model 4200-SCS can make four-point collinear
probe measurements using either three or four SMUs (source- measure units).
When using three SMUs, all three SMUs are set to
Current Bias (voltmeter unit). However, one SMU will source current and the other two will be used to measure the voltage difference between the two inner probes.
33
5/25/2013
34
5/25/2013
35
5/25/2013
Outline
Introduction
36
4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures
5/25/2013
small samples because geometric spacing of the contacts is unimportant. Effects due to a samples size, which is the approximate probe spacing, are irrelevant.
Using this method, the resistivity can be derived from
a total of eight measurements that are made around the periphery of the sample.
37
5/25/2013
38
5/25/2013
Where
A and B are volume resistivities in ohm-cm. ts is the sample thickness in cm. V1-V8 represents the voltage measured by the voltmeter. I is the current through samples in ampers fA and fB are the geometrical factors based on sample symmetry
39 5/25/2013
QB as shown in the following equations (fA= fB= 1 for perfect symmetr y). QAand QB are calculated using the measured voltages as follows:
41
5/25/2013
42
5/25/2013
Outline
Introduction
43
4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures
5/25/2013
semiconductor material characterization because from the Hall voltage, the conductivity type, carrier density, and mobility can be derived. With a positive magnetic field, B, apply a current between terminals 1 and 3, and measure the voltage drop (V24+) between terminals 2 and 4. Reverse the current and measure the voltage drop (V42+). Next, apply current between terminals 2 and 4, and measure the voltage drop (V13+) between terminals 1 and 3. Reverse the current and measure the voltage (V31+) again.
44 5/25/2013
procedure again, measuring the four voltages: (V24 ), ( V42), ( V13), and (V31). From the eight Hall voltage measurements, the average Hall coefficient can be calculated as follows:
45
5/25/2013
46
5/25/2013
conductivity type.
The rectification method is used on high resistivity
carrier based on the polarity of a rectified AC signal at the point of contact with the semiconductor material.
When the four-point collinear probe comes in contact with the wafer, a
metal semiconductor diode is created at the interface between each probe and the wafer. An AC current is sourced between the first two probes and a DC voltmeter is used to sense the polarity of the voltage between probes 2 and 3. The metal-semiconductor Schottky diode at probe 2 will be either forward- or reversed biased, depending on the polarity of the current, as well as the conductivity type. As a result, the voltmeter will read a positive voltage for p-type material and a negative voltage for n-type material.
48
5/25/2013
developed between probes 2 and 3 becomes too small and the rectification mode no longer works well. For this case, the thermoelectric voltage method determines the conductivity type by the polarity of the thermoelectric (or Seebeck) voltage that is generated by a temperature gradient on the material.
49
5/25/2013
2 and causes joule heating of the semiconductor. The Seebeck voltage is generated between probes 3 and 4 by the diffusion of thermally generated carriers from the hot region of the material to the cold region. This diffusion creates a non-equilibrium carrier concentration in the cold region, which generates an electric field, opposing further diffusion. This diffusion of carriers from the hot probe (probe 3) to the cold probe (probe 4) continues until the generated electric field is sufficient to overcome the tendency of the carriers to diffuse. For example, in p-type material, the thermally generated holes diffuse to the cold probe, building up a positive space charge, which prevents further diffusion. As a result, the cold probe (4) is more positive than the hot 5/25/2013 50 probe. Thus, for p-type material the voltmeter will read a
determined by wafer flat location, thermal emf, rectification, optically, and Hall effect
51
5/25/2013
Outline
Introduction Sheet Resistance Measurement Four-Probe Resistivity Measurements with the Model
52
4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures
5/25/2013
semiconductor wafers is the coil method, which measures small impedance changes of an inductive coil placed in close proximity to a sample Although the conductance of the sample affects the magnitude of induced eddy currents and thus the effective impedance of the coil, to determine the conductivity of the sample, the thickness of the sample has to be measured by another technique
53
5/25/2013
was used in order to ensure the transmitted millimeter wave attenuated rapidly inside the wafer, so that the reflection from the bottom surface of the wafer can be neglected. The millimeter wave response signal is not affected by the thickness of the wafer
54
5/25/2013
55
the interaction of the millimeter wave with the semiconductor wafer. When a millimeter wave signal irradiates a semiconductor wafer, reflections occur at both the top and bottom surfaces of the wafer due to the discontinuity of medium. The millimeter wave signal reflected from the wafer will be the sum of the two components reflected from the top and bottom surfaces. Since the reflected component from the bottom surface varies with the thickness of the wafer, generally this thickness will affect the measurement results. However, since the attenuation of the millimeter wave increases rapidly inside the wafer with increasing operating frequency, the reflected component from the bottom surface can be decreased to a negligible value by using a high operating 5/25/2013 frequency.
Working
A network analyzer was used to generate a millimeter
wave signal fed to a focusing sensor and to measure both the amplitude and phase of the reflection coefficient.
A millimeter wave of 110 GHz was used.
surface was calculated to be four orders of magnitude smaller than that from the top surface of the wafer for a silicon wafer having a thickness of 500 mm and conductivity of 200 S/m.
A computer was used to control the stage and to
56 5/25/2013 recode the data measured by the network analyzer.
Where and Here wafer intrinsic impedance of the semiconductor of free space For nonmagnetic materials, considering and using the above equations, the reflection coefficient can finally be written as
57 5/25/2013
Outline
Introduction
58
4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures
5/25/2013
NMOS W/L=4/16
59 5/25/2013
60
5/25/2013
uniformity of the semiconductor doping process, interface quality, quality of etching. Examples: Cross-bridge sheet resistor Contact resistors for metal-to-silicon or metal-to polysilicon contact resistance measurement. MOS Capacitors for oxide thickness, interface state measurements, flat band voltage, dopant density measurement Diodes for leakage current measurement.
61 5/25/2013
62
5/25/2013
features that form the layout rules. Examples are: Cross-bridge sheet resistor for line width measurements. Alignment resistor or a comb resistor to evaluate feature to feature spacing.
63
5/25/2013
As, we increase the contact size , yield increases. Each Sub array is tested for 5/25/2013 open circuit fault condition.
64
65
semiconductor material system. Knowledge of faults is necessary for logic design, logic simulation and test vector generation. Test structure arrays are constructed out of series, parallel, or addressable arrays of elements. Examples: Serpentine resistor for metal step coverage Comb resistor for quality of etching process. MOS capacitor for oxide integrity(pinhole) 5/25/2013 measurements
oxide steps. In order to identify unintended failures(probe pad, failure of the photomasking process) , addressable MOSFET array was developed to pinpoint the location of physical failure.
66
5/25/2013
that characterize ac, dc and transient process. Examples: Inverters for measuring the threshold , gain and noise immunity Ring Oscillators for measuring the frequency and stage delay
67
5/25/2013
68
5/25/2013
Outline
Introduction
69
4200-SCS Van der Pauw Resistivity Measurement Method Hall Effect Measurement Contactless measurement of electrical conductivity of semiconductor wafers using the reflection of millimeter waves Types of Test Structures Process Test Structures
5/25/2013
Extract very specific electrical information about the process. Identify process problems. Improve process. Sheet resistance Contact Chain Contact Resistance Continuity and Isolation
70 5/25/2013
Sheet Resistance
4-Point Probe Structure
Force a current and measure the resulting voltage. 4-point probe vs. van der Pauw Compare measured results with simulated and hand-
calculated values.
71 5/25/2013
Contact Chain
Test contact integrity.
72
and resistance (I-V sweep). Not a good structure to measure contact resistance
5/25/2013
One contact on source and drain (no Kelvin) One contact on source and two contacts on drain
(Kelvin-Drain) Two contacts on source and one on drain(KelvinSource) And two contacts on source and drain (Full Kelvin)
73
5/25/2013
Contact Resistance
Measure resistance across contact interface Ohmic
or Schottky behavior?
voltage above and below. Examine dependences on material and contact size.
74 5/25/2013
and short circuits. Common sources of failure: incomplete etch stringers overetch material failure (breakage) over aggressive topography
75
5/25/2013
76
5/25/2013