Micro Programming
Micro Programming
Micro Programming
Computer Organization
and Architecture
Chapter 15
Micro-programmed Control
Micro-programmed Control
Use sequences of instructions (see earlier
notes) to control complex operations
Called micro-programming or firmware
Implementation (1)
All the control unit does is generate a set of
control signals
Each control signal is on or of
Represent each control signal by a bit
Have a control word for each micro-operation
Have a sequence of control words for each
machine code instruction
Add an address to specify the next microinstruction, depending on conditions
Implementation (2)
Todays large microprocessor
Many instructions and associated register-level
hardware
Many control points to be manipulated
Micro-instruction Types
Each micro-instruction specifies single (or
few) micro-operations to be performed
(vertical micro-programming)
Vertical Micro-programming
Width is narrow
n control signals encoded into log2 n bits
Limited ability to express parallelism
Considerable encoding of control
information requires external memory
word decoder to identify the exact control
line being manipulated
Micro-instruction Address
Function Codes
Jump
Condition
Horizontal Micro-programming
Wide memory word
High degree of parallel operations possible
Little encoding of control information
System Bus
Control Signals
Micro-instruction Address
Jump Condition
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Compromise
Divide control signals into disjoint groups
Implement each group as separate field in
memory word
Supports reasonable levels of parallelism
without too much complexity
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Control Memory
.
Jump to Indirect or Execute
.
Jump to Execute
.
Jump to Fetch
Jump to Op code routine
.
Jump to Fetch or Interrupt
.
Jump to Fetch or Interrupt
Control Unit
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Slower
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Tasks Done By
Microprogrammed Control Unit
Microinstruction sequencing
Microinstruction execution
Must consider both together
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Design Considerations
Size of microinstructions
Address generation time
Determined by instruction register
Once per cycle, after instruction is fetched
Branches
Both conditional and unconditional
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Sequencing Techniques
Based on current microinstruction,
condition flags, contents of IR, control
memory address must be generated
Based on format of address information
Two address fields
Single address field
Variable format
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Address Generation
Explicit
Implicit
Two-field
Unconditional Branch
Conditional branch
control
Mapping
Addition
Residual
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Execution
The cycle is the basic event
Each cycle is made up of two events
Fetch
Determined by generation of microinstruction
address
Execute
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Execute
Efect is to generate control signals
Some control points internal to processor
Rest go to external control bus or other
interface
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Required Reading
Stallings chapter 15
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