8251 - Usart

8251 -USART
Serial I/O - Programmable Communication Interface

Data Communications
• Data communications refers to the ability of one computer to
exchange data with another computer or a peripheral
• Physically, the data comm. path may be a short, 5 to 10 feet ribbon
cable connecting a microcomputer and parallel printer; or it might
be a high speed telecommunications port connecting two
computers thousands of miles apart.
• Standard data communication interfaces and standards are needed
• 8251 USART (Universal Synchronous/Asynchronous
Receiver/Transmitter) is the key component for converting parallel
data to serial form and vice versa
• Two types of serial data communications are widely used
– Asynchronous communications
– Synchronous communications
Asynchronous Communications
• Eliminates the need for a clock signal between
two microprocessor based systems
Transmit data
Receive data
System 1 System 2
Signal common
Asynchronous Communications
• Data to be transmitted is sent out one
character at a time and the receiver end of the
communication line synchronization is
performed by examining synchronization bits
that are included at the beginning and at the
end of each character
Synchronous Communications
Transmit data
Receive data
System 1 System 2
clk
Signal common
USART
• It is possible to use either of the two methods.
• There are special IC chips for serial data
communication
• UART: universal asynchronous receiver transmitter
• USART: universal Synchronous/Asynchronous
Receiver/Transmitter
• INTEL has USART 8251
• Mode of Data Transmission
– simplex
– half duplex
– full duplex
Modes of Data Transfer
8251 USART
# Sections of 8251
 Data Bus buffer
 Read/Write Control Logic
 Modem Control
 Transmitter
 Receiver
1. Data Bus Buffer

 D0-D7 : 8-bit data bus used to read or write status,
command word or data from or to the 8251
2. Read/Write Control logic
• Includes a control logic, six input signals &

three buffer registers: Data register, control
register & status register.
• Control logic : Interfaces the chip with MPU,

determines the functions of the chip
according to the control word in the control
register & monitors the data flow.
Input signals
 CS – Chip Select : When signal goes low, the 8251A is selected
by the MPU for communication.
 C/D – Control/Data : When signal is high, the control or status
register is addressed; when it is low, data buffer is addressed.
(Control register & status register are differentiated by WR and
RD signals)
 WR : When signal is low, the MPU either writes in the control
register or sends output to the data buffer.
 RD : When signal goes low, the MPU either reads a status from
the status register or accepts data from data buffer.
 RESET : A high on this signal reset 8251 & forces it into the idle
mode.
 CLK : Clock input, usually connected to the system clock for
communication with the microprocessor.
Control Register
 16-bit register for a control word consist of two

independent bytes namely mode word &
command word.
 Mode word : Specifies the general characteristics
of operation such as baud, parity, number of bits
etc.
 Command word : Enables the data transmission
and reception.
 Register can be accessed as an output port when
the Control/Data pin is high.
Status register
• Checks the ready status of the peripheral.
• Status word in the status register provides the
information concerning register status and
transmission errors.
Data register
 Used as an input and output port when the C/D is low
CS C/D WR RD Operation
0 0 1 0 MPU reads data from data buffer
0 0 0 1 MPU writes data from data buffer
0 1 0 1 MPU writes a word to control register
0 1 1 0 MPU reads a word from status register
1 × × × Chip is not selected for any operation
3. Modem Control
 DSR - Data Set Ready : Checks if the Data Set is
ready when communicating with a modem.
 DTR - Data Terminal Ready : Indicates that the
device is ready to accept data when the 8251 is
communicating with a modem.
 CTS - Clear to Send : If its low, the 8251A is enabled
to transmit the serial data provided the enable bit
in the command byte is set to ‘1’.
 RTS - Request to Send Data : Low signal indicates
the modem that the receiver is ready to receive a
data byte from the modem.
4. Transmitter section
 Accepts parallel data from MPU & converts them
into serial data.
 Has two registers:
 Buffer register : To hold eight bits
 Output register : To convert eight bits into a stream of
serial bits.
Output Register
Transmitter Buffer
Transmit control
 The MPU writes a byte in the buffer register.
 Whenever the output register is empty; the contents of
buffer register are transferred to output register.
 Transmitter section consists of three output & one
input signals
 TxD - Transmitted Data Output : Output signal to transmit
the data to peripherals
 TxC - Transmitter Clock Input : Input signal, controls the rate
of transmission.
 TxRDY - Transmitter Ready : Output signal, indicates the
buffer register is empty and the USART is ready to accept
the next data byte.
 TxE - Transmitter Empty : Output signal to indicate the
output register is empty and the USART is ready to accept
the next data byte.
5. Receiver Section
 Accepts serial data on the RxD pin and

converts them to parallel data.
 Has two registers :
 Receiver input register
 Buffer register
Input Register
RxD
Receive Buffer
RxRDY
Receive control
RxC
 When RxD goes low, the control logic assumes it is
a start bit, waits for half bit time, and samples the
line again. If the line is still low, the input register
accepts the following data, and loads it into buffer
register at the rate determined by the receiver
clock.
 RxRDY - Receiver Ready Output: Output signal,
goes high when the USART has a character in the
buffer register & is ready to transfer it to the MPU.
 RxD - Receive Data Input : Bits are received serially
on this line & converted into a parallel byte in the
receiver input register.
 RxC - Receiver Clock Input : Clock signal that
controls the rate at which bits are received by the
USART.
Control Register
• Mode Instruction control word
• Command Instruction control word
Format of the control register
Format of the status register
Operating modes
• Asynchronous mode
– Mode Instruction control word
– Asynchronous mode (transmission)
– Asynchronous mode (receive)
• Synchronous mode
– synchronous mode (transmission)
– synchronous mode (receive)

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8251 -USART

Serial I/O - Programmable Communication Interface

1. Data Bus Buffer

• Includes a control logic, six input signals &

• Control logic : Interfaces the chip with MPU,

 16-bit register for a control word consist of two

 Accepts serial data on the RxD pin and

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