Assembly Language Programming

Assembly Language
Programming
Instruction
set
5
Instruction Set of 8085
 An instruction is a binary pattern designed inside

a microprocessor to perform a specific function.
 The entire group of instructions that a
microprocessor supports is called Instruction Set.
 8085 has 246 instructions.
 Each instruction is represented by an 8-bit binary
value.
 These 8-bits of binary value is called Op-Code or
Instruction Byte.
6
Classification of Instruction
Set
 Data Transfer Instruction
 Arithmetic Instructions
 Logical Instructions
 Branching Instructions
 Control Instructions
7
1.Data Transfer Instructions
 These instructions move data

between registers, or between
memory and registers.
 These instructions copy data from
source to destination(without
changing the original data ).
8
2.Arithmetic
Instructions
 These instructions perform the
operations like:
 Addition
 Subtract
 Increment
 Decrement
9
3.Logical Instructions
 These instructions perform logical operations on

data stored in registers, memory and status flags.
 The logical operations are:

◦ AND
◦ OR
◦ XOR
◦ Rotate
◦ Compare
◦ Complement
10
4.Branching Instructions
 The branch group instructions allows the

microprocessor to change the sequence of
program either conditionally or under
certain test conditions. The group includes,
 (1) Jump instructions,
 (2) Call and Return instructions,
 (3) Restart instructions,
11
5. Control Instructions
 The control instructions control the operation

of microprocessor.
12
Writing a Assembly Language Program
• Steps to write a program

– Analyze the problem
– Develop program Logic
– Write an Algorithm
– Make a Flowchart
– Write program Instructions using Assembly
language of 8085
Program 8085 in Assembly language to add two 8-bit
numbers and store 8-bit result in register C.
1. Analyze the problem

– Addition of two 8-bit numbers to be done
2. Program Logic
– Add two numbers
– Store result in register C
Translation to 8085
3. Algorithm operations
1. Get two numbers • Load 1st no. in register D
• Load 2nd no. in register E
2. Add them • Copy register D to A
• Add register E to A
3. Store result • Copy A to register C
4. Stop • Stop processing

4. Make a Flowchart
Start
• Load 1st no. in register D
Load Registers D, E • Load 2nd no. in register E
Copy D to A • Copy register D to A

• Add register E to A
Add A and E
Copy A to C • Copy A to register C
• Stop processing
Stop
5. Assembly Language Program
1. Get two numbers
a) Load 1st no. in register D MVI D, 2H
b) Load 2nd no. in register E MVI E, 3H
2. Add them
a) Copy register D to A MOV A, D
b) Add register E to A ADD E
3. Store result
a) Copy A to register C MOV C, A
4. Stop
a) Stop processing HLT
MANUAL ASSEMBLING
18
1.Data Transfer Instructions
 These instructions move data between

registers, or between memory and registers.
 These instructions copy data from source to

destination(without changing the original
data ).
MOV-Copy from source to destination
Opcode Operand
Rd, Rs
MOV M, Rs
Rd, M
 This instruction copies the contents of the source
register into the destination register. (contents of the
source register are not altered)
 If one of the operands is a memory location, its location

is specified by the contents of the HL registers.
 Example: MOV B, C or MOV B, M

BEFORE EXECUTION AFTER EXECUTION
A 20 B MOV B,A A 20 B 20
A F A F
B 30 C B 30 C
MOV M,B
D E D E
H 20 L 50 H 20 L 50 30
A F A F
B C B C 40
MOV C,M
D E D E
H 20 L 50 40 H 20 L 50 40
MVI-Move immediate 8-bit
Opcode Operand
Rd, Data
MVI M, Data
 The 8-bit data is stored in the destination register or

memory.
 If the operand is a memory location, its location is

specified by the contents of the H-L registers.
 Example: MVI B, 60H or MVI M, 40H

A F A F
B C MVI B,60H B 60 C
D E D E
H L H L
204FH 204F
HL=2050 HL=2050 40
MVI M,40H
2051H 2051H
LDA-Load accumulator
Opcode Operand
LDA 16-bit address
 The contents of a memory location, specified by a 16-

bit address in the operand, are copied to the
accumulator.
 The contents of the source are not altered.
 Example: LDA 2000H

A A 30
LDA
2000H 30 2000H 30
2000H
LDAX-Load accumulator indirect
Opcode Operand
LDAX B/D Register Pair
 The contents of the designated register pair point to a memory

location.
 This instruction copies the contents of that memory location into

the accumulator.
 The contents of either the register pair or the memory location are
not altered.
 Example: LDAX D
A F A 80 F
B C B C 80
2030H 80 2030H
LDAX D
D 20 E 30 D 20 E 30
LXI-Load register pair immediate
Opcode Operand
LXI Reg. pair, 16-bit data
 This instruction loads 16-bit data in the register

pair.
 Example: LXI H, 2030 H
LHLD-Load H and L registers direct
Opcode Operand
LHLD 16-bit address
 This instruction copies the contents of memory

location pointed out by 16-bit address into register L.
 It copies the contents of next memory location into

register H.
 Example: LHLD 2030 H

A F A 80 F
B C B C
2030H 00 8500H 60
LHLD
H L 2030 H 85 L 00
85
M=6
0
STA-Store accumulator direct
Opcode Operand
STA 16-bit address
 The contents of accumulator are copied into the

memory location specified by the operand.
 Example: STA 2000 H

A 50 A
50
STA 50
2000H 2000H
2000H
STAX-Store accumulator indirect
Opcode Operand
STAX Reg. pair
 The contents of accumulator are copied into the

memory location specified by the contents of the
register pair.
 Example: STAX B
collected by C.Gokul AP/EEE , Velalar college of Engineering and Technology, Erode

B 85 C 00
8500H 1A
A=1AH STAX B
SHLD-Store H and L registers direct
Opcode Operand
SHLD 16-bit address
 The contents of register L are stored into memory

location specified by the 16-bit address.
 The contents of register H are stored into the next

memory location.
 Example: SHLD 2550H

D E
8500H 80
H 70 L 80 SHLD
8501H 70
8500
XCHG-Exchange H and L with D and E
Opcode Operand
XCHG None
 The contents of register H are exchanged with the

contents of register D.
 The contents of register L are exchanged with the

contents of register E.
 Example: XCHG
D 20 E 40 D 70 E 80
XCHG
H 70 L 80 H 20 L 40
SPHL-Copy H and L registers to the
stack pointer
Opcode Operand
SPHL None
 This instruction loads the contents of H-L pair into

SP.
 Example: SPHL
BEFORE EXECUTION
SP
H 25 L 00
SPHL
AFTER EXECUTION
SP 2500
H 25 L 00
XTHL-Exchange H and L with top of
stack
Opcode Operand
XTHL None
 The contents of L register are exchanged with the

location pointed out by the contents of the SP.
 The contents of H register are exchanged with the

next location (SP + 1).
 Example: XTHL
L=SP
H=(SP+1)
SP 2700
2700H 50 SP 2700
40
2700H
H 30 L 40 H L
2701H 60 60 50
30
2701H
XTHL
2702H 2702H
PUSH-Push register pair onto stack
Opcode Operand
PUSH Reg. pair
 The contents of register pair are copied onto stack.
 SP is decremented and the contents of high-order registers

(B, D, H, A) are copied into stack.
 SP is again decremented and the contents of low-order

registers (C, E, L, Flags) are copied into stack.
 Example: PUSH H
Opcode Operand Description
PCHL None Load program counter with H-L
contents
 The contents of registers H and L are copied into the

program counter (PC).
 The contents of H are placed as the high-order byte

and the contents of L as the low-order byte.
 Example: PCHL
PUSH H
POP- Pop stack to register pair
Opcode Operand
POP Reg. pair
 The contents of top of stack are copied into register pair.
 The contents of location pointed out by SP are copied to the

low-order register (C, E, L, Flags).
 SP is incremented and the contents of location are copied to

the high-order register (B, D, H, A).
 Example: POP H
POP H
IN- Copy data to accumulator from a
port with 8-bit address
Opcode Operand
IN 8-bit port address
 The contents of I/O port are copied into
accumulator.
 Example: IN 8C H
BEFORE EXECUTION
PORT 10 A
80H
IN 80H
AFTER EXECUTION
PORT 10 A
80H
10
OUT- Copy data from accumulator to a
port with 8-bit address
Opcode Operand
OUT 8-bit port address
 The contents of accumulator are copied into the I/O
port.
 Example: OUT 78H

BEFORE EXECUTION
PORT 10 A 40
50H
OUT 50H
AFTER EXECUTION
PORT 40 A 40
50H
2.Arithmetic Instructions
• These instructions perform the operations
like:
– Addition
– Subtract
– Increment
– Decrement
53
54
Addition
 Any 8-bit number, or the contents of register,
or the contents of memory location can be
added to the contents of Accumulator.
 The result (sum) is stored in the
Accumulator.
 NB: No two other 8-bit registers can be added
directly.
 Example: The contents of register B cannot
be added directly to the contents of register C.
ADD
ADD R Add register or memory to
M accumulator
 The contents of register or memory are added to the contents

of accumulator.
 The result is stored in accumulator.
 If the operand is memory location, its address is specified by

H-L pair.
 Example: ADD B or ADD M

A 09
A
0
B C 05
B
4 C
0 ADD C D E
5 A=A+C H L
D E
04+05=09
H L
BEFORE EXECUTION
AFTER EXECUTION
A0 ADD M A1
B
D
4 C
E
A=A+M B
D 4
C
E
H 20 L 50 10
10 H 20 L 50
2050 04+10=14 2050

ADC
ADC R Add register or memory to
M accumulator with carry
 The contents of register or memory and Carry Flag (CY) are added to the
contents of accumulator.
 If the operand is memory location, its address is specified by H-L pair.
 All flags are modified to reflect the result of the addition.
 Example: ADC B or ADC M

C
050
Y
A
A5
B 1 C
0 ADC C
B C 20
5
A=A+C+CY
D
H6 E
L
D E 50+05+01=56
H L
CY 1
2050H 30 ADC M 2050H 30
A 06 A 37
H 20 L 50
A=A+M+CY
H 20 L 50
06+1+30=37
ADI

ADI 8-bit data Add immediate to accumulator
 The 8-bit data is added to the contents of

accumulator.
 All flags are modified to reflect the result of the

addition.
 Example: ADI 45 H
A 0 ADI 05H A 0
A=A+DATA(8)
3 8
03+05=08

ACI

ACI 8-bit data Add immediate to
accumulator with carry
 The 8-bit data and the Carry Flag (CY) are added to
the contents of accumulator.
 All flags are modified to reflect the result of the

addition.
 Example: ACI 45 H
CY 1 ACI 20H
A=A+DATA
A0 A 26
(8)+CY
5 05+20+1=26
DAD
DAD Reg. pair Add register pair to H-L pair
 The 16-bit contents of the register pair are added to

the contents of H-L pair.
 The result is stored in H-L pair.
 If the result is larger than 16 bits, then CY is set.
 No other flags are changed.
 Example: DAD B or DAD D

D 12 E 34 D 12 E 34
DAD H 35 L 79
H 23 L 45
D
1234
2345 +
------- DAD D HL=HL+DE
3579 DAD B HL=HL+BC
Subtraction
 Any 8-bit number, or the contents of register, or the
contents of memory location can be subtracted
from the contents of accumulator.
 The result is stored in the accumulator.
 Subtraction is performed in 2’s complement form.
 If the result is negative, it is stored in 2’s complement

form.
 No two other 8-bit registers can be subtracted directly.
collected by C.Gokul AP/EEE,VCET

SUB
SUB R Subtract register or memory
M from accumulator
 The contents of the register or memory location are
subtracted from the contents of the accumulator.
 If the operand is memory location, its address is specified by

H-L pair.
 All flags are modified to reflect the result of subtraction.
 Example: SUB B or SUB M

A 05
A
0
B C 04
B
9 C
0 SUB C D E
4 A=A-C H L
D E
09-04=05
H L
BEFORE EXECUTION
AFTER EXECUTION
A1 SUB M A0
B
D
4 C
E
A=A-M B
D 4
C
E
H 20 L 50 10
10 H 20 L 50
2050 14-10=04 2050

SBB
SBB R Subtract register or memory from
M accumulator with borrow
 The contents of the register or memory location and

Borrow Flag (i.e. CY) are subtracted from the contents of
the accumulator.
 The result is stored in accumulator.If the operand is

memory location, its address is specified by H-L pair.
 Example: SBB B or SBB M

C
008
Y
A
A0
B 1 C
0 SBB C
B C 05
5 A=A-C-CY
D
H2 E
L
D E 08-05-01=02
H L
CY 1
A 06
2050H 02 SBB M A 03 2050H 02
H 20 L 50 A=A-M-CY H 20 L 50
06-02-1=03
SUI
SUI 8-bit data Subtract immediate from

accumulator
 The 8-bit data is subtracted from the contents of the

accumulator.
 Example: SUI 05H

A 0 SUI 05H A 0
A=A-DATA(8)
8 3
08-05=03
SBI
SBI 8-bit data Subtract immediate from
accumulator with borrow
 The 8-bit data and the Borrow Flag (i.e. CY) is subtracted
from the contents of the accumulator.
 Example: SBI 45 H
CY 1 SBI 20H
A 25 A=A-DATA A 04
(8)-CY
25-20-01=04
Increment / Decrement
• The 8-bit contents of a register or a memory
location can be incremented or decremented
by 1.
• The 16-bit contents of a register pair can be
incremented or decremented by 1.
• Increment or decrement can be performed on
any register or a memory location.
INR
INR R Increment register or
M memory by 1
 The contents of register or memory location are incremented

by 1.
 The result is stored in the same place.
 If the operand is a memory location, its address is specified by

 Example: INR B or INR M

A A
B 10 C INR B B 11 C
D
H
E
L
R=R+1 D
H
E
L
10+1=11
H
20
L
50 2050H 10
INR M
H
20
L
50 1 2050H
M=M+1 1
10+1=11
INX

INX R Increment register pair by 1
 The contents of register pair are incremented by 1.
 Example: INX H or INX B or INX D

SP SP
B C B C
D E
INX H D E
H 10 L 20 RP=RP+1 H 10 L 21
1020+1=1021
DCR

DCR R Decrement register or memory
M by 1
 The contents of register or memory location are decremented

by 1.
 If the operand is a memory location, its address is specified by

 Example: DCR B or DCR M

A A
B C B C
D E 20
DCR E D E 19
H L R=R-1 H L
20-1=19
H L
H
20
L
50
2050H
21 DCR M
20 50 2050H 20
M=M-1 21-1=20
DCX
DCX R Decrement register pair by 1
 The contents of register pair are decremented by 1.
 Example: DCX H or DCX B or DCX D

83
84
SP SP
B C B C
D E
DCX H D E
H 10 L 21 RP=RP-1 H 10 L 20
3.Logical Instructions
 These instructions perform logical operations on data
stored in registers, memory and status flags.
 The logical operations are:

◦ AND
◦ OR
◦ XOR
◦ Rotate
◦ Compare
◦ Complement
AND, OR, XOR
 Any 8-bit data, or the contents of register, or
memory location can logically have
◦ AND operation
◦ OR operation
◦ XOR operation
with the contents of accumulator.

ANA R Logical AND register or memory

M with accumulator
 The contents of the accumulator are logically ANDed with the contents of
register or memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is specified by the contents
of H-L pair.
 S, Z, P are modified to reflect the result of the operation.
 CY is reset and AC is set.
 Example: ANA B or ANA M.

BEFORE EXECUTION 1010 1010=AAH AFTER EXECUTION
0000 1111=0FH
CY AC CY 0 AC 1
0000 1010=0AH
A AA A 0A
B 10
0F C ANA B B 0F C
D E A=A and R D E
H L H L
0101 0101=55H
CY AC 1011 0011=B3H CY 0 AC 1
B3 0001 0001=11H B3
A 55 2050H A 11 2050H
H 20 L 50 ANA M H 20 L 50
A=A and M
ANI 8-bit data Logical AND immediate with
accumulator
 The contents of the accumulator are logically ANDed with the

8-bit data.
 S, Z, P are modified to reflect the result.
 CY is reset, AC is set.
 Example: ANI 86H.
1011 0011=B3H
0011 1111=3FH
0011 0011=33H
CY AC CY 0 AC 1
ANI 3FH
A B3 A=A and DATA(8) A 33
ORA R Logical OR register or memory with
M accumulator
 The contents of the accumulator are logically ORed

with the contents of the register or memory.
 If the operand is a memory location, its address is

specified by the contents of H-L pair.
 CY and AC are reset.
 Example: ORA B or ORA M.

1010 1010=AAH
0001 0010=12H
1011 1010=BAH
CY AC CY 0 AC 0
ORA B
A=A or R
A AA A BA
B 12 C B 12 C
D E D E
H L H L
0101 0101=55H
1011 0011=B3H
1111 0111=F7H
CY AC CY 0 AC 0
ORA M
A=A or M
B3 B3
A 55 2050H A F7 2050H
H 20 L 50 H 20 L 50
ORI 8-bit data Logical OR immediate with

accumulator
 The contents of the accumulator are logically ORed with the 8-

bit data.
 Example: ORI 86H.
1011 0011=B3H
0000 1000=08H
BEFORE EXECUTION 1011 1011=BBH AFTER EXECUTION
CY AC CY 0 AC 0
ORI 08H
A B3 A=A or DATA(8) A BB
XRA R Logical XOR register or memory

M with accumulator
 The contents of the accumulator are XORed with the contents of the
register or memory.
 If the operand is a memory location, its address is specified by the
contents of H-L pair.
 S, Z, P are modified to reflect the result of the operation.
 Example: XRA B or XRA M.
1010 1010=AAH
BEFORE EXECUTION 0010 1101=2DH AFTER EXECUTION
1000 0111=87H
CY AC CY 0 AC 0
A AA A 87
B 10 C 2D B C 2D
D E
XRA C D E
H L A=A xor R H L
0101 0101=55H
BEFORE EXECUTION 1011 0011=B3H AFTER EXECUTION
1110 0110=E6H
CY AC CY 0 AC 0
B3 XRA M B3
2050H A E6 2050H
A 55
A=A xor M
H 20 L 50 H 20 L 50
XRI 8-bit data XOR immediate with

accumulator
 The contents of the accumulator are XORed with the

8-bit data.
 Example: XRI 86H.
1011 0011=B3H
0011 1001=39H
BEFORE EXECUTION 1000 1010=8AH AFTER EXECUTION
CY AC CY 0 AC 0
XRI 39H
A B3 A=A xor DATA(8) A 8A
Compare
 Any 8-bit data, or the contents of register, or
memory location can be compares for:
◦ Equality
◦ Greater Than
◦ Less Than
with the contents of accumulator.

 The result is reflected in status flags.
CMP R Compare register or memory
M with accumulator
 The contents of the operand (register or memory) are

compared with the contents of the accumulator.
 Both contents are preserved .

A>R: CY=0
CY Z A=R: ZF=1
A<R: CY=1 C Z 0
A 10
Y
A 01
10
B 10 C B C
D 20 E CMP D D 20 E
H L
A-R H L
10<20:CY=01
A>M: CY=0
A=M: ZF=1
A<M: CY=1
CY Z CY 0
ZF 1
A B8 2050H
B8 A B8 2050H
B8
CMP M
H 20 L 50 H 20 L 50
A-M
B8=B8 :ZF=01
CPI 8-bit data Compare immediate with

accumulator
 The 8-bit data is compared with the contents of

accumulator.
 The values being compared remain unchanged.

A>DATA: CY=0
A=DATA: ZF=1
A<DATA: CY=1
CY Z CY 0 AC 0
CPI 30H
A BA
A-DATA A BA
BA>30 : CY=00
Rotate
• Each bit in the accumulator can be shifted
either left or right to the next position.
RLC None Rotate accumulator left
 Each binary bit of the accumulator is rotated left by one

position.
 Bit D7 is placed in the position of D0 as well as in the Carry
flag.
 CY is modified according to bit D7.
 S, Z, P, AC are not affected.
 Example: RLC.
BEFORE EXECUTION
CY B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
B7 B6 B5 B4 B3 B2 B1 B0 B7
RRC None Rotate accumulator right
 Each binary bit of the accumulator is rotated right by one

position.
 Bit D0 is placed in the position of D7 as well as in the Carry
flag.
 Example: RRC.
BEFORE EXECUTION
B7 B6 B5 B4 B3 B2 B1 B0 CY
AFTER EXECUTION
B0 B7 B6 B5 B4 B3 B2 B1 B0

RAL None Rotate accumulator left through
carry
 Each binary bit of the accumulator is rotated left by one

position through the Carry flag.
 Bit D7 is placed in the Carry flag, and the Carry flag is placed in
the least significant position D0.
 Example: RAL.
BEFORE EXECUTION
CY B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
B7 B6 B5 B4 B3 B2 B1 B0 CY
RAR None Rotate accumulator right
through carry
 Each binary bit of the accumulator is rotated right by one

position through the Carry flag.
 Bit D0 is placed in the Carry flag, and the Carry flag is placed in
the most significant position D7.
 Example: RAR.
BEFORE EXECUTION
B7 B6 B5 B4 B3 B2 B1 B0 CY
AFTER EXECUTION
CY B7 B6 B5 B4 B3 B2 B1 B0
Complement
• The contents of accumulator can be
complemented.
• Each 0 is replaced by 1 and each 1 is replaced
by 0.
CMA None Complement accumulator
 The contents of the accumulator are complemented.

 No flags are affected.
 Example: CMA. A=A’
A 00 A FF
CMC None Complement carry
 The Carry flag is complemented.

 No other flags are affected.
 Example: CMC => c=c’
AFTER EXECUTION
BEFORE EXECUTION
C 00 C FF
STC None Set carry
 The Carry flag is set to 1.

 No other flags are affected.
 Example: STC CF=1
S-set (1) C-clear (0)

4.Branching Instructions
• The branch group instructions allows the

microprocessor to change the sequence of
program either conditionally or under certain
test conditions. The group includes,
• (1) Jump instructions,
• (2) Call and Return instructions,
• (3) Restart instructions,
JMP 16-bit Jump unconditionally
address
 The program sequence is transferred to the memory

location specified by the 16-bit address given in the
operand.
 Example: JMP 2034 H.
Jx 16-bit Jump conditionally

address

operand based on the specified flag of the PSW.
 Example: JZ 2034 H.
Jump Conditionally
Opcode Description Status Flags
JC Jump if Carry CY = 1
JNC Jump if No Carry CY = 0
JZ Jump if Zero Z=1
JNZ Jump if No Zero Z=0
JPE Jump if Parity Even P=1
JPO Jump if Parity Odd P=0
A-Above , B-Below , C-Carry , Z-Zero , P-Parity

CALL 16-bit Call unconditionally

address

operand.
 Before the transfer, the address of the next instruction after
CALL (the contents of the program counter) is pushed onto
the stack.
 Example: CALL 2034 . H
Call Conditionally
CC Call if Carry CY = 1
CNC Call if No Carry CY = 0
CP Call if Positive S=0
CM Call if Minus S=1
CZ Call if Zero Z=1
CNZ Call if No Zero Z=0
CPE Call if Parity Even P=1
CPO Call if Parity Odd P=0

RET None Return unconditionally
 The program sequence is transferred from the

subroutine to the calling program.
 The two bytes from the top of the stack are copied
into the program counter, and program execution
begins at the new address.
 Example: RET.
Return Conditionally
RC Return if Carry CY = 1
RNC Return if No Carry CY = 0
RP Return if Positive S=0
RM Return if Minus S=1
RZ Return if Zero Z=1
RNZ Return if No Zero Z=0
RPE Return if Parity Even P=1
RPO Return if Parity Odd P=0

RST 0–7 Restart (Software Interrupts)
 The RST instruction jumps the control to one of eight

memory locations depending upon the number.
 These are used as software instructions in a program
to transfer program execution to one of the eight
locations.
 Example: RST 1 or RST 2 ….
Instruction Code Vector Address
RST 0 0*8=0000H
RST 1 1*8=0008H
RST 2 2*8=0010H
RST 3 3*8=0018H
RST 4 4*8=0020H
RST 5 5*8=0028H
RST 6 6*8=0030H
RST 7 7*8=0038H
5. Control Instructions
• The control instructions control the operation
of microprocessor.
NOP None No operation
 No operation is performed.
 The instruction is fetched and decoded but no
operation is executed.
 Example: NOP
HLT None Halt
 The CPU finishes executing the current instruction

and halts any further execution.
 An interrupt or reset is necessary to exit from the
halt state.
 Example: HLT
DI None Disable interrupt
 The interrupt enable flip-flop is reset and all the

interrupts except the TRAP are disabled.
 Example: DI
EI None Enable interrupt
 The interrupt enable flip-flop is set and all interrupts

are enabled.
 This instruction is necessary to re-enable the
interrupts (except TRAP).
 Example: EI
RIM None Read Interrupt Mask
 This is a multipurpose instruction used to read the

status of interrupts 7.5, 6.5, 5.5 and read serial data
input bit.
 The instruction loads eight bits in the accumulator
with the following interpretations.
 Example: RIM
RIM Instruction
SIM None Set Interrupt Mask
 This is a multipurpose instruction and used to

implement the 8085 interrupts 7.5, 6.5, 5.5, and serial
data output.
 The instruction interprets the accumulator contents
as follows.
 Example: SIM
SIM Instruction

Assembly Language Programming

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Assembly Language

 An instruction is a binary pattern designed inside

 Data Transfer Instruction

 These instructions move data

 These instructions perform logical operations on

 The logical operations are:

 The branch group instructions allows the

 The control instructions control the operation

• Steps to write a program

1. Analyze the problem

4. Stop • Stop processing

Copy D to A • Copy register D to A

Copy A to C • Copy A to register C

 These instructions move data between

 These instructions copy data from source to

 If one of the operands is a memory location, its location

 Example: MOV B, C or MOV B, M

 The 8-bit data is stored in the destination register or

 If the operand is a memory location, its location is

 Example: MVI B, 60H or MVI M, 40H

BEFORE EXECUTION AFTER EXECUTION

LDA 16-bit address

 The contents of a memory location, specified by a 16-

 The contents of the source are not altered.

 Example: LDA 2000H

 The contents of the designated register pair point to a memory

 This instruction copies the contents of that memory location into

 This instruction loads 16-bit data in the register

 This instruction copies the contents of memory

 It copies the contents of next memory location into

 Example: LHLD 2030 H

 The contents of accumulator are copied into the

 Example: STA 2000 H

STAX Reg. pair

 The contents of accumulator are copied into the

collected by C.Gokul AP/EEE , Velalar college of Engineering and Technology, Erode

 The contents of register L are stored into memory

 The contents of register H are stored into the next

 Example: SHLD 2550H

 The contents of register H are exchanged with the

 The contents of register L are exchanged with the

 This instruction loads the contents of H-L pair into

 The contents of L register are exchanged with the

 The contents of H register are exchanged with the

BEFORE EXECUTION AFTER EXECUTION

 The contents of register pair are copied onto stack.

 SP is decremented and the contents of high-order registers

 SP is again decremented and the contents of low-order

 The contents of registers H and L are copied into the

 The contents of H are placed as the high-order byte

 The contents of top of stack are copied into register pair.

 The contents of location pointed out by SP are copied to the

 SP is incremented and the contents of location are copied to

 Example: OUT 78H

 The contents of register or memory are added to the contents

 The result is stored in accumulator.

 If the operand is memory location, its address is specified by

 Example: ADD B or ADD M