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IN OUT Fixed Address Variable Address

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Basic I/O Interface

I/O Instructions: Instructions that transfer data b/w an I/O device(s) and the µP’s accumulator
(AL or AX) are called IN and OUT.

Fixed Address Variable Address


Stored with instruction in ROM Stores in DX register
(immediate address) (indirect address)
8-bit address (p8) 16-bit address (p16)
A15-A8 (00000000) 2 A7-A0 (address) A15-A0 (DX contains the address)
00H-FFH (0-255) 0000H-FFFFH (0-66535)
Opcode Destination, Source Opcode Destination, Source
IN AL, p8 IN AL, DX
IN AX, p8 IN AX, DX
OUT p8, AL OUT DX, AL
OUT p8, AX OUT DX, AX
 I/O address is often called port number or port.
Memory-Mapped I/O

Isolated-Mapped I/O
Separation of Control Signals I/O Map of a Personal Computer
Basic Input and Output Interface:
 Basic input device is a set of three-state buffers
 Basic output device is a set of data latches

Data Bus

After OUT instruction execution,


Data presents only for 1.0 µs.
Without Latch, viewer can never
Decoding See the LED illumination
Decoding
Circuitry Circuitry
Handshaking:

 I/O devices accept or release information at much slower rate then µP


 Handshaking method, synchronizes the I/O(s) with µP. Ex: Parallel Printers

Notes About Interfacing Circuitry:

Input TTL Logic 0 = 0.0v-0.8v


Input TTL Logic 1 = 2.0v-5.0v
Output TTL Logic 0 = 0.0v-0.4v
Output TTL Logic 1 = 2.4v-5.0v

Logic 0 = 0.0-2.0mA
Logic 1 = 0.0-400µA
Input Address Decoding:
Design for “ IN AL, 9FH” Design for “ IN AL, 5FH”
Output Address Decoding:

Design for “ OUT 99H, AL” Design for “ OUT 31FH,AL”


PROGRAMMABLE PERIPHERAL INTERFACE (82C55):

 40-pin DIP chip


 Separately accessible ports A, B and C
 Each PORT can be programmed as INPUT or OUTPUT

Basic Pin Description of 82C55:

PORTA (PA0-PA7):
8-bit port A programmed all as input or all as output
PORTB (PB0-PB7):
8-bit port B programmed all as input or all as output
PORTC (PC0-PC7):
• 8-bit port C programmed all as input or all as output
• It can also be split into two parts CU (Upper Bits PC4-PC7) and
CL (Lower Bits PC0-PC3). Each can be used for INPUT or OUTPUT
• Any of PC0 to PC7 can be programmed individually
RD and RW:
Two active low input signals to 82C55
• Isolated-Mapped I/O: 1- IORC and 2- IOWC
• Memory-Mapped I/O: 1- MEMR and 2- MEMW

RESET:
Active high input signal clear the command (control) register

A0, A1and CS:


CS (Chip Select) selects the entire chip.
Pins A0 and A1 are used to access ports A, B, C and command register
Command Word Format (I/O MODE):

Before using PORTs, command register must be programmed.


Command register can be programmed in two ways,
each called
 Command Byte A (when register’s MSB Bit-7 = 1)
 Command Byte B (when register’s MSB Bit-7 = 0)

MODE 0: Used for basic I/O operation


MODE 1: Used as PORTX and handshaking signals PCX-PCX
MODE 2: Used for bi-directional operation of PORTA
The 8255 is shown in figure below: port A as input, B as output and all bits
of port C as output.
A) Find the port addresses assigned to A, B, C, and the control register
B) Find the control byte for this configuration
C)Program the ports to input data from port A and send it to port B and C.

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