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Computer Organization and Assembly Language: Lecture 11 & 12 x86 Memory Organisation Memory Segmentation

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54 views17 pages

Computer Organization and Assembly Language: Lecture 11 & 12 x86 Memory Organisation Memory Segmentation

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darwinvargas2011
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© © All Rights Reserved
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Computer Organization

and ASSEMBLY LANGUAGE

Lecture 11 & 12
x86 Memory Organisation
Memory Segmentation
Course Instructor: Engr. Aisha Danish
The 8086 has a 20-bit Address Bus

With 20 bits, 1,048,576 different


combinations are available. Each
memory location is assigned a different
combination. Each memory location is
1-byte wide. Therefore, the memory
space of the 8086 consists of 1,048,576
bytes or 524,288 16-bit words.

2 JNM 1/2002
Problem
The 8086 has a 20-bit address bus. Therefore, it can
access 1,048,576 bytes of memory. How many bits and
how many HEX digits are required to access 1M
memory?
2N = 1M (where N is in bits)
N = 20 bits = 20/4 = 5 HEX digits

3 JNM 1/2002
Positional Notation (Hex Digits)

4 JNM 1/2002
Problem Continued
But each register is only 16 bits (4 HEX digits) wide.
How are all of the locations accessed?
Segmented Memory – all of memory is divided into
64-kByte segments. (4 HEX digits (16 bits) can access
64k different locations)
216  64k

5 JNM 1/2002
Segmented Memory
Within the 1 MB of memory, the
8086 defines 4 64KB memory
blocks.

DS: E000 CS: B300


SS: 7000 ES: 5D27
7FFFF

The segment registers point to location


0 of each segment. (The base address)

6 JNM 1/2002
Segmentation
Segments are variable-sized areas of memory used
by a program containing either code or data.
Segmentation provides a way to isolate memory
segments from each other. This permits multiple
programs to run simultaneously without interfering
with each other.
A segment selector is a 16-bit value stored in a
segment register.
A logical address is a combination of a segment
selector and an offset(16-bit for 8086).

7 JNM 1/2002
Think of segments as windows that can be
moved over any area of memory to access
data or code
A program can have more than four or six
segments,
 but only access four or six segments at a time
Segmented Memory
Memory Organization: Linear vs. Segmented
Linear Addressing: (MC68K, i8085)
 The entire memory is regarded as a whole
 Specify absolute addresses in instructions
 The entire memory space is available all the time
Segmented Addressing: (ix86)
 Memory is divided into segments
 Specify an address as offset relative to segment base address
 Programs use offsets as logical address, independent of where segments are
located

9
Figure 2–3  The 8086 (or real mode) memory-addressing scheme, using a segment address
plus an offset.

– this shows a memory


segment beginning at
10000H, ending at
location 1FFFFH
• 64K bytes in length

– also shows how an


offset address, called a
displacement, of
F000H selects location
1F000H in the memory

10
8086 Programming Model:
Segment Registers

Segment Group: divide memory into


CS: Code Segment [64KB for each segment]
DS: Data Segment
ES: Extra Segment [DS:0] = byte 0
SS: Stack Segment (the 1-st byte)
in Data Segment
Segment Registers: CS, DS, ES, SS 0 = offset to begin-of-DS
Save Base addresses to particular segments
SEG(16-bit):OFFSET(16-bit) is used by BIU to calculate
(20-bit) physical memory address

11
Memory Banks

Even though the 8086 has a 16-bit data bus, it is byte


addressable.
Memory is divided into two 8-bit banks

Even Addresses Odd Addresses

BE0 BE1

12 JNM 1/2002
8086 Memory Organization
Features of 8086 Memory Organization
Memory Banks (x2):
 for concurrently accessing two bytes
Segmented Memory Address Space
 for flexible memory management
 compatible with 8085 memory management (16-bit addresses)

13
FIGURE 3-6 The memory space of the 8086 consists of 1,048,576 bytes or 524,288 16-bit words.

Mis-aligned words Aligned words


(started at odd-byte address) (started at even-byte address)

John Uffenbeck
The 80x86 Family: Design, Programming, and Copyright ©2002 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
Interfacing, 3e
14 All rights reserved.
8086 Memory Organization: Memory Banks
2^20 addresses can be arranged as:
 8-bit bytes in continuous locations, or
16-bit words (in parallel banks)
Not a single way, but …
Memory organization & interfacing should reflect the
access behavior of the processor in the most natural way.
Two types of operations:
Byte: I/O, character data (e.g., ASCII)
Words: large 16-bit integers arithmetic operations

15
8086 Memory Organization: Memory Banks
Even and Odd Memory Banks
16-bit data bus two-byte / two one-byte access
Allows processor to work on bytes or on (16-bit)
words
IO operations are normally conducted in bytes
Arithmetic operations may use large 16-bit
words
Can handle odd-length instructions
Single byte instructions
Multiple byte (and very long) instructions

16
FIGURE (a) By reading from an even-addressed bank and an odd-addressed bank
the 8086 can read two bytes from memory simultaneously. (b) If the 16-bit word
begins at an odd address, the 8086 will require two memory read or write cycles.

word 4

word 0

John Uffenbeck
The 80x86 Family: Design, Programming, and Copyright ©2002 by Pearson Education, Inc.
17
Interfacing, 3e Upper Saddle River, New Jersey 07458
All rights reserved.

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