Hardware

4.1 CPU Architecture

The Von Neumann Architecture
 The Von Neumann Architecture
• The central concept in computer organization that outlines a system where data and
instructions are stored in a single read-write memory.
 The Von Neumann Architecture
• The central concept in computer organization that outlines a system where data and
instructions are stored in a single read-write memory.
• The architecture facilitates a sequential execution of instructions, with one operation
being processed at a time..
 The Von Neumann Architecture
• It allows for the stored-program concept, where instructions are stored in memory
alongside data, making it possible to modify the program by writing new instructions into
memory.
 The Von Neumann Architecture
• It allows for the stored-program concept, where instructions are stored in memory
alongside data, making it possible to modify the program by writing new instructions into
memory.
• This design simplifies the computer architecture by using a single set of address/data
buses between the CPU and memory, making the transfer of data and instructions more
efficient.
Control Unit
Control Unit
• Directs and coordinates other parts of the computer system.
Control Unit
• Directs and coordinates other parts of the computer system.
• Manages operations and synchronizes the execution of instructions.
Control Unit
• Directs and coordinates other parts of the computer system.
• Manages operations and synchronizes the execution of instructions.
• Fetches and decodes instructions from memory, then executes them.
Control Unit
• Directs and coordinates other parts of the computer system.
• Manages operations and synchronizes the execution of instructions.
• Fetches and decodes instructions from memory, then executes them.
• Regulates the input/output flow of data, ensuring accurate processing.

Key Terms
Control Unit
• Directs and coordinates other parts of the computer system.
• Manages operations and synchronizes the execution of instructions.
• Fetches and decodes instructions from memory, then executes them.
• Regulates the input/output flow of data, ensuring accurate processing.

Key Terms
• Operand: A component of a computer instruction that specifies the data to be operated on or
manipulated (variable for eg).
Control Unit
• Directs and coordinates other parts of the computer system.
• Manages operations and synchronizes the execution of instructions.
• Fetches and decodes instructions from memory, then executes them.
• Regulates the input/output flow of data, ensuring accurate processing.

Key Terms
• Operand: A component of a computer instruction that specifies the data to be operated on or
manipulated (variable for eg).
• Opcode: The part of a machine language instruction that specifies the operation to be
performed and is executed by the CPU (the operation).
Arithmetic Logic Unit
Arithmetic Logic Unit
• Executes all arithmetic operations like addition, subtraction, etc.
Arithmetic Logic Unit
• Executes all arithmetic operations like addition, subtraction, etc.
• Performs logic operations such as AND, OR, XOR, and comparisons.
Arithmetic Logic Unit
• Executes all arithmetic operations like addition, subtraction, etc.
• Performs logic operations such as AND, OR, XOR, and comparisons.
• Handles bit-shifting operations, essential for various computational tasks.
Arithmetic Logic Unit
• Executes all arithmetic operations like addition, subtraction, etc.
• Performs logic operations such as AND, OR, XOR, and comparisons.
• Handles bit-shifting operations, essential for various computational tasks.
• Integral to performing integer calculations and manipulating data at the bit level.
 Registers

General Purpose
 Registers
General Purpose
• General-purpose registers store temporary data for multiple operations within the CPU.
 Registers
General Purpose
• General-purpose registers store temporary data for multiple operations within the CPU.

Special Purpose
 Registers
General Purpose
• General-purpose registers store temporary data for multiple operations within the CPU.

• Special-purpose
Special Purpose registers maintain the status of a specific program or operation, often involved
in the control and sequencing of operations.
 Registers
General Purpose
• General-purpose registers store temporary data for multiple operations within the CPU.

• Special-purpose
Special Purpose registers maintain the status of a specific program or operation, often involved
in the control and sequencing of operations.
⚬Special purpose registers play crucial roles in the operation and management of a computer
system beyond temporary data storage.
 Registers
General Purpose
• General-purpose registers store temporary data for multiple operations within the CPU.

• Special-purpose
Special Purpose registers maintain the status of a specific program or operation, often involved
in the control and sequencing of operations.
⚬Special purpose registers play crucial roles in the operation and management of a computer
system beyond temporary data storage.
⚬These registers ensure the correct retrieval and execution of instructions, keeping the CPU's
processes orderly and efficient.
Special Purpose Registers
 Special Purpose Registers

• Program Counter (PC): Tracks the memory address of the next instruction to
execute.
 Special Purpose Registers

• Program Counter (PC): Tracks the memory address of the next instruction to
execute.
• Memory Address Register (MAR): Holds the address of the current instruction or
the memory cell to be used.
 Special Purpose Registers

• Program Counter (PC): Tracks the memory address of the next instruction to
execute.
• Memory Address Register (MAR): Holds the address of the current instruction or
the memory cell to be used.
• Memory Data Register (MDR): Temporarily stores the data fetched from or to be
written to memory.
 Special Purpose Registers

• Program Counter (PC): Tracks the memory address of the next instruction to
execute.
• Memory Address Register (MAR): Holds the address of the current instruction or
the memory cell to be used.
• Memory Data Register (MDR): Temporarily stores the data fetched from or to be
written to memory.
• Current Instruction Register (CIR): Contains the instruction being decoded and
executed by the CPU, like ADD, MOV etc
 Special Purpose Registers

• Index Register (IX): Facilitates indirect addressing by holding offsets for

calculating addresses during program execution.
 Special Purpose Registers

• Index Register (IX): Facilitates indirect addressing by holding offsets for

calculating addresses during program execution.
• Accumulator (ACC): A general-purpose register used for arithmetic and logic
operations within the ALU.
 Special Purpose Registers

• Index Register (IX): Facilitates indirect addressing by holding offsets for

calculating addresses during program execution.
• Accumulator (ACC): A general-purpose register used for arithmetic and logic
operations within the ALU.
• Status Register: Comprises individual flags set or cleared by the ALU based on
operation results to guide the CPU's subsequent actions.
 Example

• Program Counter (PC): Contains 0x01, the address of the next instruction to execute,
which is "ADD".
• Memory Address Register (MAR): Loaded with 0x01 (the address) from PC to fetch
the instruction.
• Memory Data Register (MDR): Receives the "ADD" instruction from memory.
• Current Instruction Register (CIR): Holds the "ADD 100, 200, 300" instruction
decoded from MDR.
• Index Register (IX): Not used in this direct addressing example.
 Example

• Accumulator (ACC): Fetches value from address 100 into ACC, adds it to value from
address 200.
• Status Register: Updated based on the result of the addition; for example, the Zero
flag is set if the result is zero.
• MAR is then loaded with 0x03, the address where the result will be stored.
• MDR now holds the result of the addition.
• The result is written from MDR to memory address 300.
The Clock
 The Clock

• Controls the timing of all computer operations.

 The Clock

• Controls the timing of all computer operations.

• Sends out pulses at a rate determined by the clock speed.
 The Clock

• Controls the timing of all computer operations.

• Sends out pulses at a rate determined by the clock speed.
• The CPU requires a certain number of clock cycles to execute each instruction.
 The Clock

• Controls the timing of all computer operations.

• Sends out pulses at a rate determined by the clock speed.
• The CPU requires a certain number of clock cycles to execute each instruction.
• Processor instructions vary in the number of clock cycles needed for execution.
 The Clock

• The higher the clock frequency, the shorter the time needed to execute an instruction.
 The Clock

• The higher the clock frequency, the shorter the time needed to execute an instruction.
• Increasing the clock frequency can lead to improved overall performance.
 The Clock

• The higher the clock frequency, the shorter the time needed to execute an instruction.
• Increasing the clock frequency can lead to improved overall performance.
⚬We need to optimise heat generation, power draw and ensure stability of the CPU
while increasing clock speed
Busses and Performance
 Busses and Performance
• Data Bus:
 Busses and Performance
• Data Bus:
⚬Enables bi-directional transfer of data between the CPU, memory, and peripherals.
 Busses and Performance
• Data Bus:
⚬Enables bi-directional transfer of data between the CPU, memory, and peripherals.
⚬Bus width is critical, with wider buses allowing more data to be transferred
simultaneously, enhancing processing speed.
 Busses and Performance
• Data Bus:
⚬Enables bi-directional transfer of data between the CPU, memory, and peripherals.
⚬Bus width is critical, with wider buses allowing more data to be transferred
simultaneously, enhancing processing speed.
• Address Bus:
 Busses and Performance
• Data Bus:
⚬Enables bi-directional transfer of data between the CPU, memory, and peripherals.
⚬Bus width is critical, with wider buses allowing more data to be transferred
simultaneously, enhancing processing speed.
• Address Bus:
⚬A uni-directional pathway that carries memory addresses from the CPU to the
memory, specifying where data needs to be accessed.
 Busses and Performance
• Data Bus:
⚬Enables bi-directional transfer of data between the CPU, memory, and peripherals.
⚬Bus width is critical, with wider buses allowing more data to be transferred
simultaneously, enhancing processing speed.
• Address Bus:
⚬A uni-directional pathway that carries memory addresses from the CPU to the
memory, specifying where data needs to be accessed.
• Tells memory what to send into the Data Bus
 Busses and Performance
• Control Bus:
 Busses and Performance
• Control Bus:
⚬Bi-directional bus that transmits control signals(including those for read/write
operations and fetching data.) between the CPU's control unit and other hardware
components to coordinate operations.
 Busses and Performance
• Control Bus:
⚬Bi-directional bus that transmits control signals(including those for read/write
operations and fetching data.) between the CPU's control unit and other hardware
components to coordinate operations.
• Cache Memory:
 Busses and Performance
• Control Bus:
⚬Bi-directional bus that transmits control signals(including those for read/write
operations and fetching data.) between the CPU's control unit and other hardware
components to coordinate operations.
• Cache Memory:
⚬Utilizes SRAM for quick data access, storing frequently used data to speed up
processing by reducing access times.
 Busses and Performance
• CPU Cores:
⚬Multiple cores enable parallel processing, with each core capable of executing
instructions independently, reducing the time to complete tasks.
Ports
 Ports

• Serve as an interface for connecting computers to peripheral devices.

 Ports

• Serve as an interface for connecting computers to peripheral devices.

• Typically feature a female connector design.
 Ports

• Serve as an interface for connecting computers to peripheral devices.

• Typically feature a female connector design.
• Benefits of Using USB Ports
 Ports

• Serve as an interface for connecting computers to peripheral devices.

• Typically feature a female connector design.
• Benefits of Using USB Ports
⚬Enable fast data transfer, which is particularly beneficial for large files, such as
video files.
 Ports

• Serve as an interface for connecting computers to peripheral devices.

• Typically feature a female connector design.
• Benefits of Using USB Ports
⚬Enable fast data transfer, which is particularly beneficial for large files, such as
video files.
⚬Support automatic connection with a 'Plug and Play' feature, often eliminating the
need for installing separate drivers.
 Ports

⚬USB has become an industrial standard, with most new computers equipped with
USB ports.
 Ports

⚬USB has become an industrial standard, with most new computers equipped with
USB ports.
⚬Allow for devices to be powered or charged through the port, enabling external
devices to charge while being used with the computer.
 Ports

⚬USB has become an industrial standard, with most new computers equipped with
USB ports.
⚬Allow for devices to be powered or charged through the port, enabling external
devices to charge while being used with the computer.
⚬Backwards compatible
 Video Graphics Array
Advantages Disadvantages
• Simple technology for video transmission. • Does not support audio transmission, only video.
• Uniform standard, with no variations to • Becoming obsolete as modern laptops and computers
complicate connectivity. often do not include a VGA port.
• Signals can be easily split to connect multiple • VGA connectors have pins that can be easily bent
devices from a single source. during connection, leading to potential damage.
• Connections using VGA are typically very
secure.
• Supports a high refresh rate for better display
performance.
 HDMI
Advantages Disadvantages
• Enables connection of multiple monitors. • Connections may not be robust, with a risk of breaking
• Outputs both audio and visual signals through HDMI when moving devices.
ports. • Cable length is limited, which can restrict setup and
• Offers faster data transfer rates. device placement.
• Increases bandwidth to supply the necessary data for • More expensive
high-quality sound and visual effects.
• Represents the current standard for modern televisions
and monitors.
• Provides very fast data transfer rates, enhancing viewing
experiences.
• Improves content security with HDCP (High-bandwidth
Digital Content Protection) to prevent piracy.
• Compatible with modern digital systems.
 Fetch - Execute Cycle

• The Program Counter (PC) initially contains the address of the next instruction to be executed.
• This address is then transferred from the PC to the Memory Address Register (MAR).
• After the transfer, the PC is incremented by one to prepare for the next instruction fetch.
• The MAR uses the address it received to fetch the corresponding instruction from memory into the Memory Data Register
(MDR).
• Finally, the instruction held in the MDR is moved to the Current Instruction Register (CIR) for decoding and execution.
• Example:
⚬ MAR ← [PC]: The Memory Address Register is loaded with the address found in the Program Counter.
⚬ PC ← [PC] + 1: The Program Counter is incremented, preparing it to fetch the next instruction.
⚬ MDR ← [[MAR]]: The Memory Data Register is loaded with the instruction found at the memory address pointed to
by the MAR.
⚬ CIR ← [MDR]: The Current Instruction Register is loaded with the instruction from the MDR.
⚬ The double brackets around MAR indicate indirect addressing, meaning the address to fetch from is not direct but is
instead at the address pointed to by the value in MAR.
￭ MAR stores an address, we fetch data from that address
 Interrupts

• Interrupts are signals to the processor indicating immediate attention is needed from a source or device.
• Hardware interrupts can be triggered by events like "Printer out of paper" or "No CD in drive."
• Software interrupts involve scenarios like runtime errors or a running program requiring input.
• CPU Response to Interrupts:
⚬ During each fetch-execute cycle, the CPU checks for interrupts.
⚬ If an interrupt flag is set, the CPU identifies and checks the priority of the interrupt.
⚬ High-priority interrupts are addressed immediately, temporarily disabling lower-priority ones.
⚬ The CPU saves the current state of registers on the stack and calls the interrupt handler or Interrupt Service Routine
(ISR).
⚬ After servicing, the CPU restores the state from the stack and re-enables lower-priority interrupts, continuing with the
next cycle.