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KAGA-KOKOKAGA-KOKO
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Merge tag 'irqchip-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip updates for 5.1 from Marc Zyngier: - irqsteer error handling fix - GICv3 range coalescing fix - stm32 coprocessor coexistence fixes - mbigen MSI teardown fix - non-DT secondary GIC infrastructure removed - various cleanups (brcmstb-l2, mmp) - new DT bindings (r8a774c0)
2 parents 551417a + fca269f commit 3ce8461

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10 files changed

+32
-48
lines changed

10 files changed

+32
-48
lines changed

‎Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ Required properties:
1616
- "renesas,irqc-r8a7793" (R-Car M2-N)
1717
- "renesas,irqc-r8a7794" (R-Car E2)
1818
- "renesas,intc-ex-r8a774a1" (RZ/G2M)
19+
- "renesas,intc-ex-r8a774c0" (RZ/G2E)
1920
- "renesas,intc-ex-r8a7795" (R-Car H3)
2021
- "renesas,intc-ex-r8a7796" (R-Car M3-W)
2122
- "renesas,intc-ex-r8a77965" (R-Car M3-N)

‎arch/arm/mach-cns3xxx/core.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ void __init cns3xxx_map_io(void)
9090
/* used by entry-macro.S */
9191
void __init cns3xxx_init_irq(void)
9292
{
93-
gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
93+
gic_init(IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
9494
IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
9595
}
9696

‎drivers/irqchip/irq-brcmstb-l2.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -275,14 +275,14 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
275275
return ret;
276276
}
277277

278-
int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
278+
static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
279279
struct device_node *parent)
280280
{
281281
return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init);
282282
}
283283
IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init);
284284

285-
int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
285+
static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
286286
struct device_node *parent)
287287
{
288288
return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init);

‎drivers/irqchip/irq-gic-v3-its.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1482,7 +1482,7 @@ static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b)
14821482
ra = container_of(a, struct lpi_range, entry);
14831483
rb = container_of(b, struct lpi_range, entry);
14841484

1485-
return rb->base_id - ra->base_id;
1485+
return ra->base_id - rb->base_id;
14861486
}
14871487

14881488
static void merge_lpi_ranges(void)

‎drivers/irqchip/irq-gic.c

Lines changed: 16 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1089,11 +1089,10 @@ static void gic_init_chip(struct gic_chip_data *gic, struct device *dev,
10891089
#endif
10901090
}
10911091

1092-
static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
1092+
static int gic_init_bases(struct gic_chip_data *gic,
10931093
struct fwnode_handle *handle)
10941094
{
1095-
irq_hw_number_t hwirq_base;
1096-
int gic_irqs, irq_base, ret;
1095+
int gic_irqs, ret;
10971096

10981097
if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && gic->percpu_offset) {
10991098
/* Frankein-GIC without banked registers... */
@@ -1145,28 +1144,21 @@ static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
11451144
} else { /* Legacy support */
11461145
/*
11471146
* For primary GICs, skip over SGIs.
1148-
* For secondary GICs, skip over PPIs, too.
1147+
* No secondary GIC support whatsoever.
11491148
*/
1150-
if (gic == &gic_data[0] && (irq_start & 31) > 0) {
1151-
hwirq_base = 16;
1152-
if (irq_start != -1)
1153-
irq_start = (irq_start & ~31) + 16;
1154-
} else {
1155-
hwirq_base = 32;
1156-
}
1149+
int irq_base;
11571150

1158-
gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
1151+
gic_irqs -= 16; /* calculate # of irqs to allocate */
11591152

1160-
irq_base = irq_alloc_descs(irq_start, 16, gic_irqs,
1153+
irq_base = irq_alloc_descs(16, 16, gic_irqs,
11611154
numa_node_id());
11621155
if (irq_base < 0) {
1163-
WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
1164-
irq_start);
1165-
irq_base = irq_start;
1156+
WARN(1, "Cannot allocate irq_descs @ IRQ16, assuming pre-allocated\n");
1157+
irq_base = 16;
11661158
}
11671159

11681160
gic->domain = irq_domain_add_legacy(NULL, gic_irqs, irq_base,
1169-
hwirq_base, &gic_irq_domain_ops, gic);
1161+
16, &gic_irq_domain_ops, gic);
11701162
}
11711163

11721164
if (WARN_ON(!gic->domain)) {
@@ -1195,7 +1187,6 @@ static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
11951187
}
11961188

11971189
static int __init __gic_init_bases(struct gic_chip_data *gic,
1198-
int irq_start,
11991190
struct fwnode_handle *handle)
12001191
{
12011192
char *name;
@@ -1231,32 +1222,28 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
12311222
gic_init_chip(gic, NULL, name, false);
12321223
}
12331224

1234-
ret = gic_init_bases(gic, irq_start, handle);
1225+
ret = gic_init_bases(gic, handle);
12351226
if (ret)
12361227
kfree(name);
12371228

12381229
return ret;
12391230
}
12401231

1241-
void __init gic_init(unsigned int gic_nr, int irq_start,
1242-
void __iomem *dist_base, void __iomem *cpu_base)
1232+
void __init gic_init(void __iomem *dist_base, void __iomem *cpu_base)
12431233
{
12441234
struct gic_chip_data *gic;
12451235

1246-
if (WARN_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR))
1247-
return;
1248-
12491236
/*
12501237
* Non-DT/ACPI systems won't run a hypervisor, so let's not
12511238
* bother with these...
12521239
*/
12531240
static_branch_disable(&supports_deactivate_key);
12541241

1255-
gic = &gic_data[gic_nr];
1242+
gic = &gic_data[0];
12561243
gic->raw_dist_base = dist_base;
12571244
gic->raw_cpu_base = cpu_base;
12581245

1259-
__gic_init_bases(gic, irq_start, NULL);
1246+
__gic_init_bases(gic, NULL);
12601247
}
12611248

12621249
static void gic_teardown(struct gic_chip_data *gic)
@@ -1399,7 +1386,7 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq)
13991386
if (ret)
14001387
return ret;
14011388

1402-
ret = gic_init_bases(*gic, -1, &dev->of_node->fwnode);
1389+
ret = gic_init_bases(*gic, &dev->of_node->fwnode);
14031390
if (ret) {
14041391
gic_teardown(*gic);
14051392
return ret;
@@ -1459,7 +1446,7 @@ gic_of_init(struct device_node *node, struct device_node *parent)
14591446
if (gic_cnt == 0 && !gic_check_eoimode(node, &gic->raw_cpu_base))
14601447
static_branch_disable(&supports_deactivate_key);
14611448

1462-
ret = __gic_init_bases(gic, -1, &node->fwnode);
1449+
ret = __gic_init_bases(gic, &node->fwnode);
14631450
if (ret) {
14641451
gic_teardown(gic);
14651452
return ret;
@@ -1650,7 +1637,7 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
16501637
return -ENOMEM;
16511638
}
16521639

1653-
ret = __gic_init_bases(gic, -1, domain_handle);
1640+
ret = __gic_init_bases(gic, domain_handle);
16541641
if (ret) {
16551642
pr_err("Failed to initialise GIC\n");
16561643
irq_domain_free_fwnode(domain_handle);

‎drivers/irqchip/irq-imx-irqsteer.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -169,8 +169,12 @@ static int imx_irqsteer_probe(struct platform_device *pdev)
169169

170170
raw_spin_lock_init(&data->lock);
171171

172-
of_property_read_u32(np, "fsl,num-irqs", &irqs_num);
173-
of_property_read_u32(np, "fsl,channel", &data->channel);
172+
ret = of_property_read_u32(np, "fsl,num-irqs", &irqs_num);
173+
if (ret)
174+
return ret;
175+
ret = of_property_read_u32(np, "fsl,channel", &data->channel);
176+
if (ret)
177+
return ret;
174178

175179
/*
176180
* There is one output irq for each group of 64 inputs.

‎drivers/irqchip/irq-mbigen.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -161,6 +161,9 @@ static void mbigen_write_msg(struct msi_desc *desc, struct msi_msg *msg)
161161
void __iomem *base = d->chip_data;
162162
u32 val;
163163

164+
if (!msg->address_lo && !msg->address_hi)
165+
return;
166+
164167
base += get_mbigen_vec_reg(d->hwirq);
165168
val = readl_relaxed(base);
166169

‎drivers/irqchip/irq-mmp.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,7 @@ static int mmp_irq_domain_xlate(struct irq_domain *d, struct device_node *node,
179179
return 0;
180180
}
181181

182-
const struct irq_domain_ops mmp_irq_domain_ops = {
182+
static const struct irq_domain_ops mmp_irq_domain_ops = {
183183
.map = mmp_irq_domain_map,
184184
.xlate = mmp_irq_domain_xlate,
185185
};

‎drivers/irqchip/irq-stm32-exti.c

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
716716
const struct stm32_exti_bank *stm32_bank;
717717
struct stm32_exti_chip_data *chip_data;
718718
void __iomem *base = h_data->base;
719-
u32 irqs_mask;
720719

721720
stm32_bank = h_data->drv_data->exti_banks[bank_idx];
722721
chip_data = &h_data->chips_data[bank_idx];
@@ -725,21 +724,12 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
725724

726725
raw_spin_lock_init(&chip_data->rlock);
727726

728-
/* Determine number of irqs supported */
729-
writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
730-
irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
731-
732727
/*
733728
* This IP has no reset, so after hot reboot we should
734729
* clear registers to avoid residue
735730
*/
736731
writel_relaxed(0, base + stm32_bank->imr_ofst);
737732
writel_relaxed(0, base + stm32_bank->emr_ofst);
738-
writel_relaxed(0, base + stm32_bank->rtsr_ofst);
739-
writel_relaxed(0, base + stm32_bank->ftsr_ofst);
740-
writel_relaxed(~0UL, base + stm32_bank->rpr_ofst);
741-
if (stm32_bank->fpr_ofst != UNDEF_REG)
742-
writel_relaxed(~0UL, base + stm32_bank->fpr_ofst);
743733

744734
pr_info("%pOF: bank%d\n", h_data->node, bank_idx);
745735

‎include/linux/irqchip/arm-gic.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -158,8 +158,7 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq);
158158
* Legacy platforms not converted to DT yet must use this to init
159159
* their GIC
160160
*/
161-
void gic_init(unsigned int nr, int start,
162-
void __iomem *dist , void __iomem *cpu);
161+
void gic_init(void __iomem *dist , void __iomem *cpu);
163162

164163
int gicv2m_init(struct fwnode_handle *parent_handle,
165164
struct irq_domain *parent);

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