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Enable ctlz is fast on ARM and AArch64 (NFC) #155283

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Enable ctlz is fast on ARM and AArch64 (NFC) #155283

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2 changes: 2 additions & 0 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.h
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Original file line number Diff line number Diff line change
Expand Up @@ -383,6 +383,8 @@ class AArch64TargetLowering : public TargetLowering {
return true;
}

bool isCtlzFast() const override { return true; }

bool isMaskAndCmp0FoldingBeneficial(const Instruction &AndI) const override;

bool hasAndNotCompare(SDValue V) const override {
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4 changes: 4 additions & 0 deletions llvm/lib/Target/ARM/ARMISelLowering.cpp
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Expand Up @@ -21387,6 +21387,10 @@ bool ARMTargetLowering::isCheapToSpeculateCtlz(Type *Ty) const {
return Subtarget->hasV6T2Ops();
}

bool ARMTargetLowering::isCtlzFast() const {
return Subtarget->hasV5TOps() && !Subtarget->isThumb1Only();
}

bool ARMTargetLowering::isMaskAndCmp0FoldingBeneficial(
const Instruction &AndI) const {
if (!Subtarget->hasV7Ops())
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2 changes: 2 additions & 0 deletions llvm/lib/Target/ARM/ARMISelLowering.h
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Expand Up @@ -651,6 +651,8 @@ class VectorType;
return Opc != ISD::VECREDUCE_ADD;
}

bool isCtlzFast() const override;

/// Returns true if an argument of type Ty needs to be passed in a
/// contiguous block of registers in calling convention CallConv.
bool functionArgumentNeedsConsecutiveRegisters(
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