Skip to content

[GlobalISel] Add multi-way splitting support for wide scalar shifts. #155353

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: main
Choose a base branch
from
+13,567 −4,697
Open

[GlobalISel] Add multi-way splitting support for wide scalar shifts. #155353

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
37 changes: 37 additions & 0 deletions llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -364,6 +364,43 @@ class LegalizerHelper {
LLT HalfTy,
LLT ShiftAmtTy);

/// Multi-way shift legalization: directly split wide shifts into target-sized
/// parts in a single step, avoiding recursive binary splitting.
LLVM_ABI LegalizeResult narrowScalarShiftMultiway(MachineInstr &MI,
LLT TargetTy);

/// Optimized path for constant shift amounts using static indexing.
/// Directly calculates which source parts contribute to each output part
/// without generating runtime select chains.
LLVM_ABI LegalizeResult narrowScalarShiftByConstantMultiway(MachineInstr &MI,
const APInt &Amt,
LLT TargetTy,
LLT ShiftAmtTy);

struct ShiftParams {
Register WordShift; // Number of complete words to shift
Register BitShift; // Number of bits to shift within words
Register InvBitShift; // Complement bit shift (TargetBits - BitShift)
Register Zero; // Zero constant for SHL/LSHR fill
Register SignBit; // Sign extension value for ASHR fill
};

/// Generates a single output part for constant shifts using direct indexing.
/// Calculates which source parts contribute and how they're combined.
LLVM_ABI Register buildConstantShiftPart(unsigned Opcode, unsigned PartIdx,
unsigned NumParts,
ArrayRef<Register> SrcParts,
const ShiftParams &Params,
LLT TargetTy, LLT ShiftAmtTy);

/// Generates a shift part with carry for variable shifts.
/// Combines main operand shifted by BitShift with carry bits from adjacent
/// operand.
LLVM_ABI Register buildVariableShiftPart(unsigned Opcode,
Register MainOperand,
Register ShiftAmt, LLT TargetTy,
Register CarryOperand = Register());

LLVM_ABI LegalizeResult fewerElementsVectorReductions(MachineInstr &MI,
unsigned TypeIdx,
LLT NarrowTy);
Expand Down
Loading