Skip to content

[X86] canCreateUndefOrPoisonForTargetNode - add GF2P8AFFINEINVQB / GF2P8AFFINEQB / GF2P8MULB handling #155409

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Aug 26, 2025
Merged

[X86] canCreateUndefOrPoisonForTargetNode - add GF2P8AFFINEINVQB / GF2P8AFFINEQB / GF2P8MULB handling #155409

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 5 additions & 0 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -45167,6 +45167,11 @@ bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode(
// SSE signbit extraction.
case X86ISD::MOVMSK:
return false;
// GFNI instructions.
case X86ISD::GF2P8AFFINEINVQB:
case X86ISD::GF2P8AFFINEQB:
case X86ISD::GF2P8MULB:
return false;
case ISD::INTRINSIC_WO_CHAIN:
switch (Op->getConstantOperandVal(0)) {
case Intrinsic::x86_sse2_pmadd_wd:
Expand Down
9 changes: 3 additions & 6 deletions llvm/test/CodeGen/X86/combine-gfni.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,7 @@ define <16 x i8> @gf2p8affineqb_freeze(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %
; AVX512-LABEL: gf2p8affineqb_freeze:
; AVX512: # %bb.0:
; AVX512-NEXT: vpmovb2m %xmm2, %k1
; AVX512-NEXT: vgf2p8affineqb $11, %xmm1, %xmm1, %xmm1
; AVX512-NEXT: vmovdqu8 %xmm1, %xmm0 {%k1}
; AVX512-NEXT: vgf2p8affineqb $11, %xmm1, %xmm1, %xmm0 {%k1}
; AVX512-NEXT: retq
%i = icmp slt <16 x i8> %a2, zeroinitializer
%g = call <16 x i8> @llvm.x86.vgf2p8affineqb.128(<16 x i8> %a1, <16 x i8> %a1, i8 11)
Expand Down Expand Up @@ -55,8 +54,7 @@ define <16 x i8> @gf2p8affineinvqb_freeze(<16 x i8> %a0, <16 x i8> %a1, <16 x i8
; AVX512-LABEL: gf2p8affineinvqb_freeze:
; AVX512: # %bb.0:
; AVX512-NEXT: vpmovb2m %xmm2, %k1
; AVX512-NEXT: vgf2p8affineinvqb $11, %xmm1, %xmm1, %xmm1
; AVX512-NEXT: vmovdqu8 %xmm1, %xmm0 {%k1}
; AVX512-NEXT: vgf2p8affineinvqb $11, %xmm1, %xmm1, %xmm0 {%k1}
; AVX512-NEXT: retq
%i = icmp slt <16 x i8> %a2, zeroinitializer
%g = call <16 x i8> @llvm.x86.vgf2p8affineinvqb.128(<16 x i8> %a1, <16 x i8> %a1, i8 11)
Expand Down Expand Up @@ -86,8 +84,7 @@ define <16 x i8> @gf2p8mulb_freeze(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2)
; AVX512-LABEL: gf2p8mulb_freeze:
; AVX512: # %bb.0:
; AVX512-NEXT: vpmovb2m %xmm2, %k1
; AVX512-NEXT: vgf2p8mulb %xmm1, %xmm1, %xmm1
; AVX512-NEXT: vmovdqu8 %xmm1, %xmm0 {%k1}
; AVX512-NEXT: vgf2p8mulb %xmm1, %xmm1, %xmm0 {%k1}
; AVX512-NEXT: retq
%i = icmp slt <16 x i8> %a2, zeroinitializer
%g = call <16 x i8> @llvm.x86.vgf2p8mulb.128(<16 x i8> %a1, <16 x i8> %a1)
Expand Down