[AMDGPU] Determine MCFixupKind in a more general way. NFCI. #155864
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@llvm/pr-subscribers-backend-amdgpu Author: Jay Foad (jayfoad) ChangesFull diff: https://github.com/llvm/llvm-project/pull/155864.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
index 61f673221739a..71a1c2dcb2768 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
@@ -695,11 +695,8 @@ void AMDGPUMCCodeEmitter::getMachineOpValueCommon(
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
uint32_t Offset = Desc.getSize();
assert(Offset == 4 || Offset == 8);
- auto OpType = Desc.operands()[OpNo].OperandType;
- MCFixupKind Kind = (STI.hasFeature(AMDGPU::Feature64BitLiterals) &&
- OpType == AMDGPU::OPERAND_REG_IMM_INT64)
- ? FK_Data_8
- : FK_Data_4;
+ unsigned Size = AMDGPU::getOperandSize(Desc, OpNo);
+ MCFixupKind Kind = MCFixup::getDataKindForSize(Size);
addFixup(Fixups, Offset, MO.getExpr(), Kind, PCRel);
}
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jayfoad
commented
Aug 28, 2025
| @@ -695,11 +695,8 @@ void AMDGPUMCCodeEmitter::getMachineOpValueCommon( | |||
| const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); | |||
| uint32_t Offset = Desc.getSize(); | |||
| assert(Offset == 4 || Offset == 8); | |||
| auto OpType = Desc.operands()[OpNo].OperandType; | |||
| MCFixupKind Kind = (STI.hasFeature(AMDGPU::Feature64BitLiterals) && | |||
There was a problem hiding this comment.
I don't think the test for Feature64BitLiterals was really needed here. If we don't have the feature then we should not have reached here with a 64-bit operand type.
rampitec
approved these changes
Aug 28, 2025
Try to make the logic for encoding the literal better match the logic for choosing the fixup kind.
rampitec
approved these changes
Aug 28, 2025
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