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4 changes: 2 additions & 2 deletions ports/esp8266/boards/esp8266_2MiB_ROMFS.ld
Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,8 @@ MEMORY
}

/* define ROMFS extents */
_micropy_hw_romfs_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_size = LENGTH(FLASH_ROMFS);
_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);

/* define common sections and symbols */
INCLUDE boards/esp8266_common.ld
4 changes: 2 additions & 2 deletions ports/esp8266/modesp.c
Original file line number Diff line number Diff line change
Expand Up @@ -165,13 +165,13 @@ static MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_size_obj, esp_flash_size);

extern byte _firmware_size[];
#if MICROPY_VFS_ROM_IOCTL
extern uint8_t _micropy_hw_romfs_size;
extern uint8_t _micropy_hw_romfs_part0_size;
#endif

static mp_obj_t esp_flash_user_start(void) {
uint32_t flash_user_start = (uint32_t)_firmware_size;
#if MICROPY_VFS_ROM_IOCTL
flash_user_start += (uint32_t)&_micropy_hw_romfs_size;
flash_user_start += (uint32_t)&_micropy_hw_romfs_part0_size;
#endif
return MP_OBJ_NEW_SMALL_INT(flash_user_start);
}
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8 changes: 4 additions & 4 deletions ports/esp8266/vfs_rom_ioctl.c
Original file line number Diff line number Diff line change
Expand Up @@ -35,13 +35,13 @@
#define FLASH_MEM_BASE (0x40200000)
#define FLASH_PAGE_SIZE (4096)

#define MICROPY_HW_ROMFS_BASE (uintptr_t)(&_micropy_hw_romfs_start)
#define MICROPY_HW_ROMFS_BYTES (uintptr_t)(&_micropy_hw_romfs_size)
#define MICROPY_HW_ROMFS_BASE (uintptr_t)(&_micropy_hw_romfs_part0_start)
#define MICROPY_HW_ROMFS_BYTES (uintptr_t)(&_micropy_hw_romfs_part0_size)

#define ROMFS_SPI_FLASH_OFFSET (MICROPY_HW_ROMFS_BASE - FLASH_MEM_BASE)

extern uint8_t _micropy_hw_romfs_start;
extern uint8_t _micropy_hw_romfs_size;
extern uint8_t _micropy_hw_romfs_part0_start;
extern uint8_t _micropy_hw_romfs_part0_size;

static const MP_DEFINE_MEMORYVIEW_OBJ(romfs_obj, 'B', 0, MICROPY_HW_ROMFS_BYTES, (void *)MICROPY_HW_ROMFS_BASE);

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4 changes: 2 additions & 2 deletions ports/stm32/boards/PYBD_SF2/f722_qspi.ld
Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,8 @@ _heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = _sstack;

/* ROMFS location */
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);

/* Define output sections */
SECTIONS
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2 changes: 1 addition & 1 deletion ports/stm32/boards/PYBD_SF2/mpconfigboard.h
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ void board_sleep(int value);
// ROMFS config
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)

// SPI flash #1, for R/W storage
#define MICROPY_HW_SOFTQSPI_SCK_LOW(self) (GPIOE->BSRR = (0x10000 << 11))
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4 changes: 2 additions & 2 deletions ports/stm32/boards/PYBD_SF6/f767.ld
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ _heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = _sstack;

/* ROMFS location */
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);

INCLUDE common_bl.ld
2 changes: 1 addition & 1 deletion ports/stm32/boards/PYBD_SF6/mpconfigboard.h
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@
// ROMFS config
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)

// Extra UART config
#define MICROPY_HW_UART7_TX (pyb_pin_W16)
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10 changes: 5 additions & 5 deletions ports/stm32/mpconfigboard_common.h
Original file line number Diff line number Diff line change
Expand Up @@ -77,16 +77,16 @@
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (0)
#endif

// Whether to enable ROMFS partition 0.
#ifndef MICROPY_HW_ROMFS_ENABLE_PART0
#define MICROPY_HW_ROMFS_ENABLE_PART0 (0)
#endif

// Whether to enable ROMFS partition 1.
#ifndef MICROPY_HW_ROMFS_ENABLE_PART1
#define MICROPY_HW_ROMFS_ENABLE_PART1 (0)
#endif

// Whether to enable ROMFS partition 2.
#ifndef MICROPY_HW_ROMFS_ENABLE_PART2
#define MICROPY_HW_ROMFS_ENABLE_PART2 (0)
#endif

// Whether to enable storage on the internal flash of the MCU
#ifndef MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)
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20 changes: 10 additions & 10 deletions ports/stm32/vfs_rom_ioctl.c
Original file line number Diff line number Diff line change
Expand Up @@ -36,29 +36,29 @@

#if MICROPY_VFS_ROM_IOCTL

#if MICROPY_HW_ROMFS_ENABLE_PART0 && !defined(MICROPY_HW_ROMFS_PART0_START)
#define MICROPY_HW_ROMFS_PART0_START (uintptr_t)(&_micropy_hw_romfs_part0_start)
#define MICROPY_HW_ROMFS_PART0_SIZE (uintptr_t)(&_micropy_hw_romfs_part0_size)
extern uint8_t _micropy_hw_romfs_part0_start;
extern uint8_t _micropy_hw_romfs_part0_size;
#endif

#if MICROPY_HW_ROMFS_ENABLE_PART1 && !defined(MICROPY_HW_ROMFS_PART1_START)
#define MICROPY_HW_ROMFS_PART1_START (uintptr_t)(&_micropy_hw_romfs_part1_start)
#define MICROPY_HW_ROMFS_PART1_SIZE (uintptr_t)(&_micropy_hw_romfs_part1_size)
extern uint8_t _micropy_hw_romfs_part1_start;
extern uint8_t _micropy_hw_romfs_part1_size;
#endif

#if MICROPY_HW_ROMFS_ENABLE_PART2 && !defined(MICROPY_HW_ROMFS_PART2_START)
#define MICROPY_HW_ROMFS_PART2_START (uintptr_t)(&_micropy_hw_romfs_part2_start)
#define MICROPY_HW_ROMFS_PART2_SIZE (uintptr_t)(&_micropy_hw_romfs_part2_size)
extern uint8_t _micropy_hw_romfs_part2_start;
extern uint8_t _micropy_hw_romfs_part2_size;
#endif

#define ROMFS_MEMORYVIEW(base, size) {{&mp_type_memoryview}, 'B', 0, (size), (void *)(base)}

static const mp_obj_array_t romfs_obj_table[] = {
#if MICROPY_HW_ROMFS_ENABLE_PART0
ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART0_START, MICROPY_HW_ROMFS_PART0_SIZE),
#endif
#if MICROPY_HW_ROMFS_ENABLE_PART1
ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART1_START, MICROPY_HW_ROMFS_PART1_SIZE),
#endif
#if MICROPY_HW_ROMFS_ENABLE_PART2
ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART2_START, MICROPY_HW_ROMFS_PART2_SIZE),
#endif
};

mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
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