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stm32: Fix DAC issue for MCUs those have D-Cache. #17770

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Merged
merged 1 commit into from
Aug 18, 2025
Merged

stm32: Fix DAC issue for MCUs those have D-Cache. #17770

merged 1 commit into from
Aug 18, 2025

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yn386
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@yn386 yn386 commented Jul 27, 2025

Summary

The following code does not work with NUCLEO-F767ZI.
Incorrect wave may be output on PA4. STM32H7 has same issue.

import math
from pyb import DAC

# create a buffer containing a sine-wave
buf = bytearray(100)
for i in range(len(buf)):
    buf[i] = 128 + int(127 * math.sin(2 * math.pi * i / len(buf)))

# output the sine-wave at 600Hz
dac = DAC(1, bits=8)
dac.write_timed(buf, 600 * len(buf), mode=DAC.CIRCULAR)

For MCUs which has D-Cache (such as STM32F7, STM32H7), clean D-cache before starting DMA.
For more details, please refer follwing document:
https://www.st.com/resource/en/application_note/DM00272913.pdf

This PR cleans D-cache before starting DMA.

Testing

Tested code above with:

-> Both boards output wave as expected.

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Code size report:

   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:    +0 +0.000% PYBV10
     mimxrt:    +0 +0.000% TEENSY40
        rp2:    +0 +0.000% RPI_PICO_W
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

@dpgeorge dpgeorge added the board-definition New or updated board definition files. Combine with a port- label. label Aug 1, 2025
dpgeorge
dpgeorge reviewed Aug 1, 2025
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ports/stm32/dac.c Outdated
@@ -485,6 +485,11 @@ mp_obj_t pyb_dac_write_timed(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
#endif
}

#if defined(STM32F7) || defined(STM32H7)
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You should be able to remove this if conditional. The MP_HAL_CLEAN_DCACHE macro is defined to nothing on MCUs that don't have a D-cache.

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Thank you for your comment.
Indeed, MP_HAL_CLEAN_DCACHE can use without condition with STM32F7/H7.

micropython/ports/stm32/mpconfigboard_common.h

Lines 705 to 716 in c9b52b2

// D-cache clean/invalidate helpers
#if __DCACHE_PRESENT == 1
// Note: The SCB_Clean<...> functions automatically align their arguments to cover full cache lines.
// CLEANINVALIDATE will write back (flush) any dirty lines in this region to RAM, then
// invalidate (evict) the whole region from the cache.
#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) SCB_CleanInvalidateDCache_by_Addr((volatile void *)(addr), (size))
// CLEAN will write back (flush) any dirty lines in this region to RAM.
#define MP_HAL_CLEAN_DCACHE(addr, size) SCB_CleanDCache_by_Addr((volatile void *)(addr), (size))
#else
#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size)
#define MP_HAL_CLEAN_DCACHE(addr, size)
#endif

I removed condition for STM32F7/H7.

@yn386 yn386 force-pushed the fix-write-timed-issue-on-f7-h7 branch from d0ff58f to d929c70 Compare August 1, 2025 11:14
@yn386 yn386 changed the title stm32: Fix DAC issue on STM32F7/H7. stm32: Fix DAC issue for MCUs those have D-Cache. Aug 1, 2025
@dpgeorge dpgeorge added port-stm32 and removed board-definition New or updated board definition files. Combine with a port- label. labels Aug 1, 2025
dpgeorge
dpgeorge approved these changes Aug 18, 2025
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Thanks for updating, looks good now.

@yn386 @dpgeorge
stm32/dac: Fix DAC write for MCUs that have D-Cache.
365329c 
To prevent wrong DAC output, clean D-cache before starting DMA.

For more details, please refer to the following document:
https://www.st.com/resource/en/application_note/DM00272913.pdf

Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
@dpgeorge dpgeorge force-pushed the fix-write-timed-issue-on-f7-h7 branch from d929c70 to 365329c Compare August 18, 2025 03:22
@dpgeorge dpgeorge merged commit 365329c into micropython:master Aug 18, 2025
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