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ORCIDJagadish Dasarahalli Narasimaiah
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2020 – today
- 2024
[j6]Surender Singh Samant, Vijay Singh, Arun Chauhan, Jagadish Dasarahalli Narasimaiah:
An Optimized Crossover Framework for Social Media Sentiment Analysis. Cybern. Syst. 55(8): 2140-2168 (2024)- 2023
- [j5]Surender Singh Samant
, Arun Chauhan, Jagadish D. N., Vijay Singh:
Glomerulus Detection Using Segmentation Neural Networks. J. Digit. Imaging 36(4): 1633-1642 (2023) - 2022
- [j4]D. N. Jagadish, Arun Chauhan, Lakshman Mahto:
Conditional Variational Autoencoder Networks for Autonomous Vehicle Path Prediction. Neural Process. Lett. 54(5): 3965-3978 (2022) - 2021
- [c7]Arun Chauhan, Jagadish D. N., Lakshman Mahto:
Multimodality Data Fusion for COVID-19 Diagnosis. IEEE BigData 2021: 4659-4666 - [c6]Jagadish D. N., Arun Chauhan, Lakshman Mahto:
Autonomous Vehicle Path Prediction Using Conditional Variational Autoencoder Networks. PAKDD (1) 2021: 129-139 - 2020
- [c5]D. N. Jagadish, Lakshman Mahto, Arun Chauhan:
Deep Learning and Density Based Clustering Methods for Road Traffic Prediction. CVIP (3) 2020: 344-355 - [c4]Arun Chauhan, Shobhan Kumar, Lakshman Mahto, Jagadish D. N.:
Detection of Reckless Driving using Deep Learning. ICMLA 2020: 853-858 - [c3]Jagadish D. N., Lakshman Mahto, Arun Chauhan:
Density Based Clustering Methods for Road Traffic Estimation. TENCON 2020: 885-890
2010 – 2019
- 2018
- [j3]Jagadish Dasarahalli Narasimaiah, Laxminidhi Tonse, Mujoor Sankaranarayana Bhat:
11.39 fJ/conversion-step 780 kS/s 8 bit switched capacitor-based area and energy-efficient successive approximation register ADC in 90 nm complementary metal-oxide-semiconductor. IET Circuits Devices Syst. 12(3): 249-255 (2018) - [j2]Jagadish Dasarahalli Narasimaiah, Mujoor Shankaranarayana Bhat:
14.5 fJ/conversion-step 9-bit 100-kS/s non-binary weighted dual capacitor array based area and energy efficient SAR ADC in 90 nm CMOS. IET Circuits Devices Syst. 12(6): 671-680 (2018) - 2015
- [j1]D. N. Jagadish, M. S. Bhat:
Low Energy and Area Efficient Nonbinary Capacitor Array Based Successive Approximation Register Analog-to-Digital Converter. J. Low Power Electron. 11(3): 436-443 (2015) - 2014
- [c2]D. N. Jagadish, M. S. Bhat:
Low Energy and Area Efficient Nonbinary Capacitor Array Based SAR ADC. ISED 2014: 54-57 - [c1]D. N. Jagadish, M. S. Bhat:
A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications. ISED 2014: 58-62
Coauthor Index
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