"A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain ..."

Ki Chul Chun et al. (2012)

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DOI: 10.1109/JSSC.2011.2168729

access: closed

type: Journal Article

metadata version: 2020-08-30

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Ki Chul Chun, Pulkit Jain, Tae-Ho Kim, Chris H. Kim:
A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches. IEEE J. Solid State Circuits 47(2): 547-559 (2012)

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