feat: add SYCL Backend Support for Intel GPUs (leejet#330)

* update ggml and add SYCL CMake option

Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

* hacky CMakeLists.txt for updating ggml in cpu backend

Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

* rebase and clean code

Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

* add sycl in README

Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

* rebase ggml commit

Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

* refine README

Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

* update ggml for supporting sycl tsembd op

Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

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Signed-off-by: zhentaoyu <zhentao.yu@intel.com>

sync: update ggml submodule url

feat: add sd3 support (leejet#298)

sync: update ggml

chore: fix cuda CI (leejet#286)

perf: make crc32 100x faster on x86-64 (leejet#278)

This change makes checkpoints load significantly faster by optimizing
pkzip's cyclic redundancy check. This code was developed by Intel and
Google and Mozilla. See Chromium's zlib codebase for further details.

chore: update artifact actions (leejet#267)

fix: set n_dims of tensor storage to 1 when it's 0

feat: add AYS(Align Your Steps) scheduler (leejet#241)

Added NVIDEA's new "Align Your Steps" style scheduler in accordance with their
quick start guide. Currently has handling for SD1.5, SDXL, and SVD, using the
noise levels from their paper to generate the sigma values. Can be selected
using the --schedule ays command line switch. Updates the main.cpp help
message and README to reflect this option, also they now inform the user
of the --color switch as well.

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Co-authored-by: leejet <leejet714@gmail.com>

fix: ignore tensors with the particular dim while loading (leejet#233)