Skip to content

OUT pin and SIDE_SET pin clash #55

Closed
@backgroundprocessing

Description

@backgroundprocessing

The UART_TX program, and my similar program, fail.

Single OUT pin and single SIDE pin mapped to same GPIO.
GPIO does not change with out pins, 1 but stays at the last SIDE setting.

In the UART program, the stop and start bits are output, but no data.
Setting the SIDE pin to a different GPIO sees the data on the OUT GPIO and the stop/start bits on the SIDE GPIO.

.program uart_tx
.side_set 1 opt

; An 8n1 UART transmit program.
; OUT pin 0 and side-set pin 0 are both mapped to UART TX pin.

    pull       side 1 [7]  ; Assert stop bit, or stall with line in idle state
    set x, 7   side 0 [7]  ; Preload bit counter, assert start bit for 8 clocks
bitloop:                   ; This loop will run 8 times (8n1 UART)
    out pins, 1            ; Shift 1 bit from OSR to the first OUT pin
    jmp x-- bitloop   [6]  ; Each loop iteration is 8 cycles.

Metadata

Metadata

Assignees

No one assigned

    Labels

    No labels
    No labels

    Type

    No type

    Projects

    No projects

    Milestone

    No milestone

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions