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stm32: Implement sdioio, enable for feather stm32f405 express #3191
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Looks like a good start! Found some debugging stuff that looks left behind, and I had some comments about the peripheral declaration - I don't think that having everything be an array is essential to the periph/ API when they're all just single index like that.
Beyond that, I'd like to understand better how the user actually declares SDIO in python, do you have an example sketch I can toy around with? I'm imagining it might be more practical to have everything constructed like board.I2C and board.SPI are, but maybe I'm off base with that.
Example usage:
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Thanks for the fixes. I've tested this on my Feather F405 and it's working great. I'm still a little iffy on the tuple in boards/pins.c just because it isn't a technique shared by other ports. @dhalbert or @tannewt, maybe you could give us a second opinion? If they have no objections then this looks good to me.
The data pins tuple is used in two places in atmel-samd: https://github.com/adafruit/circuitpython/blob/main/ports/atmel-samd/boards/same54_xplained/pins.c#L4 |
Tested on my feather_stm32f405_express -- works!! |
rad! thanks for testing :) |
Now why didn't that come up when I grepped for it? In that case I've got no issues. |
Currently, only the bus specs of the stm32f405xx have been coded. Other stm-family chips need (at a minimum) the specs added in their periph.[ch] files.
.. this probably came from the examples that I studied at the beginning of implementation. The card detection feature is unused. As a "detect pin" is not sent from the shared-bindings, there is no way to get the correct pin anyway. Instead, if code needs to detect the insertion state it can directly use the pin as GPIO in Python code.
Can we get this merged quick while it isn't stuck on CI failures or translation conflicts? |
Looks good to me, I don't see anything that should hold it up. |
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