Fix G4 SPI clock being double what it should be #14207
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Do you want to test this code? You can flash it directly from Betaflight Configurator:
WARNING: It may be unstable. Use only for testing! |
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I can confirm that my prototype FC now has expected SCK frequency: |
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@ledvinap @blckmn @nerdCopter we still have the git submodule present. https://superuser.com/questions/1301581/get-git-commit-a-to-ignore-submodules |
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I noticed src/config was being included which seems like a bad thing, so I've removed it here, but I'll obviously align to the consensus on what should be happening. |
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Not sure what's going on with src/config, but this PR now only includes the desired delta from master. |
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On a related topic, as a check, I've confirmed the I2C clock speed to be correct. It's configured to be 800kHz, as per , thus:
And an access to the baro shows this to be so.
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| uint32_t spiClk = SystemCoreClock / 2; | ||
| #elif defined(STM32H7) | ||
| uint32_t spiClk = 100000000; | ||
| #elif defined(STM32G4) | ||
| uint32_t spiClk = SystemCoreClock; |
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Technically, this should be HAL_RCC_GetPCLK1Freq or similar driver function. It will probably work for other processors too (checked F7), but it may be slightly complicated by SPI using both APB1 and APB2 (and thus PCLK1 / PCLK2), but that can be resolved using peripheral address. This is already implemented for timer clocks.
This special-casing will work, but it is mixing a lot of assumptions. But the simplicity may be worth it.
It is possible this is based on a master that does not include the dirty check on submodules. |
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@SteveCEvans you could try: |
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@SteveCEvans this needs a back port ? |
Yes, will do. Spent the evening making cables to debug GPS issues. |
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Using breadboard as bridge with dupont on both sides :)
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BF standard JST-SH GPS connector to logic analyser plug with a six way DuPont connector to JST-SH that can be easily reconfigured to suit alternate flight controllers.
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G4 SPI clock was observed to be double what it should be.
Using a check for a number of frequencies using this temporary patch to the BMI270 driver:
We get the following expected frequencies, but we actually see double that.
As can be seen below:
After this fix, we see the following:
Previously the divisor values were half of what they should be, and the frequency was consequently double.
For FC's using the BMI270 gyro the consequence had been that the gyro was being clocked at 10.5MHz (one 8th of 84MHz), only just above its max permissible value of 10MHz. A consequence of this PR is that the frequency is now correctly set below 10MHz, to 5.25MHz, thus, but it's still plenty fast enough: