clocksource: Timer-sun5i: Switch to sched_clock_register()

bebarino · Ingo Molnar · commit 00e2bcd6d35f · 2014-01-19T13:23:23.000+01:00
The 32-bit sched_clock() interface supports 64 bits since 3.13-rc1. Upgrade to the 64-bit function to allow us to remove the 32-bit registration interface. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1389922686-6249-1-git-send-email-sboyd@codeaurora.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
@@ -136,7 +136,7 @@ static struct irqaction sun5i_timer_irq = {
 	.dev_id = &sun5i_clockevent,
 };
 
-static u32 sun5i_timer_sched_read(void)
+static u64 sun5i_timer_sched_read(void)
 {
 	return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1));
 }
@@ -166,7 +166,7 @@ static void __init sun5i_timer_init(struct device_node *node)
 	writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
 	       timer_base + TIMER_CTL_REG(1));
 
-	setup_sched_clock(sun5i_timer_sched_read, 32, rate);
+	sched_clock_register(sun5i_timer_sched_read, 32, rate);
 	clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name,
 			      rate, 340, 32, clocksource_mmio_readl_down);
 

Original file line number	Diff line number	Diff line change
`@@ -136,7 +136,7 @@ static struct irqaction sun5i_timer_irq = {`
`136`	`136`	`.dev_id = &sun5i_clockevent,`
`137`	`137`	`};`
`138`	`138`
`139`		`-static u32 sun5i_timer_sched_read(void)`
	`139`	`+static u64 sun5i_timer_sched_read(void)`
`140`	`140`	`{`
`141`	`141`	`return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1));`
`142`	`142`	`}`
`@@ -166,7 +166,7 @@ static void __init sun5i_timer_init(struct device_node *node)`
`166`	`166`	`writel(TIMER_CTL_ENABLE \| TIMER_CTL_RELOAD,`
`167`	`167`	`timer_base + TIMER_CTL_REG(1));`
`168`	`168`
`169`		`- setup_sched_clock(sun5i_timer_sched_read, 32, rate);`
	`169`	`+ sched_clock_register(sun5i_timer_sched_read, 32, rate);`
`170`	`170`	`clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name,`
`171`	`171`	`rate, 340, 32, clocksource_mmio_readl_down);`
`172`	`172`