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lynxeye-devMarc Zyngier
lynxeye-dev
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Marc Zyngier
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irqchip: Add driver for imx-irqsteer controller
The irqsteer block is a interrupt multiplexer/remapper found on the i.MX8 line of SoCs. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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‎drivers/irqchip/Kconfig

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@@ -398,6 +398,14 @@ config CSKY_APB_INTC
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by C-SKY single core SOC system. It use mmio map apb-bus to visit
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the controller's register.
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config IMX_IRQSTEER
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bool "i.MX IRQSTEER support"
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depends on ARCH_MXC || COMPILE_TEST
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default ARCH_MXC
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select IRQ_DOMAIN
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help
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Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
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endmenu
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config SIFIVE_PLIC

‎drivers/irqchip/Makefile

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@@ -92,4 +92,5 @@ obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o
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obj-$(CONFIG_CSKY_MPINTC) += irq-csky-mpintc.o
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obj-$(CONFIG_CSKY_APB_INTC) += irq-csky-apb-intc.o
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obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
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obj-$(CONFIG_IMX_IRQSTEER) += irq-imx-irqsteer.o
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obj-$(CONFIG_MADERA_IRQ) += irq-madera.o

‎drivers/irqchip/irq-imx-irqsteer.c

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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2017 NXP
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* Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <linux/spinlock.h>
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#define CTRL_STRIDE_OFF(_t, _r) (_t * 8 * _r)
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#define CHANCTRL 0x0
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#define CHANMASK(n, t) (CTRL_STRIDE_OFF(t, 0) + 0x4 * (n) + 0x4)
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#define CHANSET(n, t) (CTRL_STRIDE_OFF(t, 1) + 0x4 * (n) + 0x4)
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#define CHANSTATUS(n, t) (CTRL_STRIDE_OFF(t, 2) + 0x4 * (n) + 0x4)
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#define CHAN_MINTDIS(t) (CTRL_STRIDE_OFF(t, 3) + 0x4)
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#define CHAN_MASTRSTAT(t) (CTRL_STRIDE_OFF(t, 3) + 0x8)
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struct irqsteer_data {
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void __iomem *regs;
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struct clk *ipg_clk;
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int irq;
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raw_spinlock_t lock;
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int irq_groups;
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int channel;
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struct irq_domain *domain;
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u32 *saved_reg;
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};
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static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
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unsigned long irqnum)
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{
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return (data->irq_groups * 2 - irqnum / 32 - 1);
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}
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static void imx_irqsteer_irq_unmask(struct irq_data *d)
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{
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struct irqsteer_data *data = d->chip_data;
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int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&data->lock, flags);
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val = readl_relaxed(data->regs + CHANMASK(idx, data->irq_groups));
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val |= BIT(d->hwirq % 32);
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writel_relaxed(val, data->regs + CHANMASK(idx, data->irq_groups));
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raw_spin_unlock_irqrestore(&data->lock, flags);
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}
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static void imx_irqsteer_irq_mask(struct irq_data *d)
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{
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struct irqsteer_data *data = d->chip_data;
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int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&data->lock, flags);
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val = readl_relaxed(data->regs + CHANMASK(idx, data->irq_groups));
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val &= ~BIT(d->hwirq % 32);
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writel_relaxed(val, data->regs + CHANMASK(idx, data->irq_groups));
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raw_spin_unlock_irqrestore(&data->lock, flags);
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}
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static struct irq_chip imx_irqsteer_irq_chip = {
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.name = "irqsteer",
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.irq_mask = imx_irqsteer_irq_mask,
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.irq_unmask = imx_irqsteer_irq_unmask,
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};
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static int imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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irq_set_status_flags(irq, IRQ_LEVEL);
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irq_set_chip_data(irq, h->host_data);
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irq_set_chip_and_handler(irq, &imx_irqsteer_irq_chip, handle_level_irq);
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return 0;
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}
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static const struct irq_domain_ops imx_irqsteer_domain_ops = {
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.map = imx_irqsteer_irq_map,
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.xlate = irq_domain_xlate_onecell,
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};
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static void imx_irqsteer_irq_handler(struct irq_desc *desc)
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{
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struct irqsteer_data *data = irq_desc_get_handler_data(desc);
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int i;
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chained_irq_enter(irq_desc_get_chip(desc), desc);
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for (i = 0; i < data->irq_groups * 64; i += 32) {
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int idx = imx_irqsteer_get_reg_index(data, i);
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unsigned long irqmap;
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int pos, virq;
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irqmap = readl_relaxed(data->regs +
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CHANSTATUS(idx, data->irq_groups));
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for_each_set_bit(pos, &irqmap, 32) {
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virq = irq_find_mapping(data->domain, pos + i);
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if (virq)
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generic_handle_irq(virq);
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}
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}
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chained_irq_exit(irq_desc_get_chip(desc), desc);
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}
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static int imx_irqsteer_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct irqsteer_data *data;
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struct resource *res;
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int ret;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(data->regs)) {
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dev_err(&pdev->dev, "failed to initialize reg\n");
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return PTR_ERR(data->regs);
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}
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data->irq = platform_get_irq(pdev, 0);
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if (data->irq <= 0) {
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dev_err(&pdev->dev, "failed to get irq\n");
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return -ENODEV;
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}
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data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
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if (IS_ERR(data->ipg_clk)) {
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ret = PTR_ERR(data->ipg_clk);
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if (ret != -EPROBE_DEFER)
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dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
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return ret;
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}
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raw_spin_lock_init(&data->lock);
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of_property_read_u32(np, "fsl,irq-groups", &data->irq_groups);
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of_property_read_u32(np, "fsl,channel", &data->channel);
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if (IS_ENABLED(CONFIG_PM_SLEEP)) {
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data->saved_reg = devm_kzalloc(&pdev->dev,
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sizeof(u32) * data->irq_groups * 2,
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GFP_KERNEL);
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if (!data->saved_reg)
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return -ENOMEM;
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}
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ret = clk_prepare_enable(data->ipg_clk);
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if (ret) {
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dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret);
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return ret;
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}
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/* steer all IRQs into configured channel */
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writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
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data->domain = irq_domain_add_linear(np, data->irq_groups * 64,
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&imx_irqsteer_domain_ops, data);
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if (!data->domain) {
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dev_err(&pdev->dev, "failed to create IRQ domain\n");
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clk_disable_unprepare(data->ipg_clk);
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return -ENOMEM;
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}
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irq_set_chained_handler_and_data(data->irq, imx_irqsteer_irq_handler,
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data);
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platform_set_drvdata(pdev, data);
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return 0;
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}
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static int imx_irqsteer_remove(struct platform_device *pdev)
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{
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struct irqsteer_data *irqsteer_data = platform_get_drvdata(pdev);
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irq_set_chained_handler_and_data(irqsteer_data->irq, NULL, NULL);
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irq_domain_remove(irqsteer_data->domain);
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clk_disable_unprepare(irqsteer_data->ipg_clk);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static void imx_irqsteer_save_regs(struct irqsteer_data *data)
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{
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int i;
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for (i = 0; i < data->irq_groups * 2; i++)
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data->saved_reg[i] = readl_relaxed(data->regs +
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CHANMASK(i, data->irq_groups));
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}
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static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
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{
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int i;
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writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
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for (i = 0; i < data->irq_groups * 2; i++)
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writel_relaxed(data->saved_reg[i],
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data->regs + CHANMASK(i, data->irq_groups));
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}
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static int imx_irqsteer_suspend(struct device *dev)
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{
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struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
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imx_irqsteer_save_regs(irqsteer_data);
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clk_disable_unprepare(irqsteer_data->ipg_clk);
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return 0;
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}
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static int imx_irqsteer_resume(struct device *dev)
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{
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struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(irqsteer_data->ipg_clk);
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if (ret) {
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dev_err(dev, "failed to enable ipg clk: %d\n", ret);
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return ret;
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}
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imx_irqsteer_restore_regs(irqsteer_data);
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return 0;
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}
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#endif
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static const struct dev_pm_ops imx_irqsteer_pm_ops = {
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SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx_irqsteer_suspend, imx_irqsteer_resume)
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};
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static const struct of_device_id imx_irqsteer_dt_ids[] = {
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{ .compatible = "fsl,imx-irqsteer", },
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{},
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};
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static struct platform_driver imx_irqsteer_driver = {
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.driver = {
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.name = "imx-irqsteer",
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.of_match_table = imx_irqsteer_dt_ids,
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.pm = &imx_irqsteer_pm_ops,
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},
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.probe = imx_irqsteer_probe,
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.remove = imx_irqsteer_remove,
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};
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builtin_platform_driver(imx_irqsteer_driver);

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