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davem330davem330
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Merge branch 'amd-xgbe-next'
Tom Lendacky says: ==================== amd-xgbe: AMD XGBE driver updates 2017-08-17 The following updates are included in this driver update series: - Set the MDIO mode to clause 45 for the 10GBase-T configuration - Set the MII control width to 8-bits for speeds less than 1Gbps - Fix an issue to related to module removal when the devices are up - Fix ethtool statistics related to packet counting of TSO packets - Add support for device renaming - Add additional dynamic debug output for the PCS window calculation - Optimize reading of DMA channel interrupt enablement register - Add additional dynamic debug output about the hardware features - Add per queue Tx and Rx ethtool statistics - Add a macro to clear ethtool_link_ksettings modes - Convert the driver to use the ethtool_link_ksettings - Add support for VXLAN offload capabilities - Add additional ethtool statistics related to VXLAN This patch series is based on net-next. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents 1547f53 + 3010608 commit 01d300c

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-353
lines changed

12 files changed

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lines changed

‎drivers/net/ethernet/amd/xgbe/xgbe-common.h

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -298,6 +298,7 @@
298298
#define MAC_RWKPFR 0x00c4
299299
#define MAC_LPICSR 0x00d0
300300
#define MAC_LPITCR 0x00d4
301+
#define MAC_TIR 0x00e0
301302
#define MAC_VR 0x0110
302303
#define MAC_DR 0x0114
303304
#define MAC_HWF0R 0x011c
@@ -364,6 +365,8 @@
364365
#define MAC_HWF0R_TXCOESEL_WIDTH 1
365366
#define MAC_HWF0R_VLHASH_INDEX 4
366367
#define MAC_HWF0R_VLHASH_WIDTH 1
368+
#define MAC_HWF0R_VXN_INDEX 29
369+
#define MAC_HWF0R_VXN_WIDTH 1
367370
#define MAC_HWF1R_ADDR64_INDEX 14
368371
#define MAC_HWF1R_ADDR64_WIDTH 2
369372
#define MAC_HWF1R_ADVTHWORD_INDEX 13
@@ -448,6 +451,8 @@
448451
#define MAC_PFR_PR_WIDTH 1
449452
#define MAC_PFR_VTFE_INDEX 16
450453
#define MAC_PFR_VTFE_WIDTH 1
454+
#define MAC_PFR_VUCC_INDEX 22
455+
#define MAC_PFR_VUCC_WIDTH 1
451456
#define MAC_PMTCSR_MGKPKTEN_INDEX 1
452457
#define MAC_PMTCSR_MGKPKTEN_WIDTH 1
453458
#define MAC_PMTCSR_PWRDWN_INDEX 0
@@ -510,6 +515,12 @@
510515
#define MAC_TCR_SS_WIDTH 2
511516
#define MAC_TCR_TE_INDEX 0
512517
#define MAC_TCR_TE_WIDTH 1
518+
#define MAC_TCR_VNE_INDEX 24
519+
#define MAC_TCR_VNE_WIDTH 1
520+
#define MAC_TCR_VNM_INDEX 25
521+
#define MAC_TCR_VNM_WIDTH 1
522+
#define MAC_TIR_TNID_INDEX 0
523+
#define MAC_TIR_TNID_WIDTH 16
513524
#define MAC_TSCR_AV8021ASMEN_INDEX 28
514525
#define MAC_TSCR_AV8021ASMEN_WIDTH 1
515526
#define MAC_TSCR_SNAPTYPSEL_INDEX 16
@@ -1153,11 +1164,17 @@
11531164
#define RX_PACKET_ATTRIBUTES_RSS_HASH_WIDTH 1
11541165
#define RX_PACKET_ATTRIBUTES_FIRST_INDEX 7
11551166
#define RX_PACKET_ATTRIBUTES_FIRST_WIDTH 1
1167+
#define RX_PACKET_ATTRIBUTES_TNP_INDEX 8
1168+
#define RX_PACKET_ATTRIBUTES_TNP_WIDTH 1
1169+
#define RX_PACKET_ATTRIBUTES_TNPCSUM_DONE_INDEX 9
1170+
#define RX_PACKET_ATTRIBUTES_TNPCSUM_DONE_WIDTH 1
11561171

11571172
#define RX_NORMAL_DESC0_OVT_INDEX 0
11581173
#define RX_NORMAL_DESC0_OVT_WIDTH 16
11591174
#define RX_NORMAL_DESC2_HL_INDEX 0
11601175
#define RX_NORMAL_DESC2_HL_WIDTH 10
1176+
#define RX_NORMAL_DESC2_TNP_INDEX 11
1177+
#define RX_NORMAL_DESC2_TNP_WIDTH 1
11611178
#define RX_NORMAL_DESC3_CDA_INDEX 27
11621179
#define RX_NORMAL_DESC3_CDA_WIDTH 1
11631180
#define RX_NORMAL_DESC3_CTXT_INDEX 30
@@ -1184,9 +1201,11 @@
11841201
#define RX_DESC3_L34T_IPV4_TCP 1
11851202
#define RX_DESC3_L34T_IPV4_UDP 2
11861203
#define RX_DESC3_L34T_IPV4_ICMP 3
1204+
#define RX_DESC3_L34T_IPV4_UNKNOWN 7
11871205
#define RX_DESC3_L34T_IPV6_TCP 9
11881206
#define RX_DESC3_L34T_IPV6_UDP 10
11891207
#define RX_DESC3_L34T_IPV6_ICMP 11
1208+
#define RX_DESC3_L34T_IPV6_UNKNOWN 15
11901209

11911210
#define RX_CONTEXT_DESC3_TSA_INDEX 4
11921211
#define RX_CONTEXT_DESC3_TSA_WIDTH 1
@@ -1201,6 +1220,8 @@
12011220
#define TX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH 1
12021221
#define TX_PACKET_ATTRIBUTES_PTP_INDEX 3
12031222
#define TX_PACKET_ATTRIBUTES_PTP_WIDTH 1
1223+
#define TX_PACKET_ATTRIBUTES_VXLAN_INDEX 4
1224+
#define TX_PACKET_ATTRIBUTES_VXLAN_WIDTH 1
12041225

12051226
#define TX_CONTEXT_DESC2_MSS_INDEX 0
12061227
#define TX_CONTEXT_DESC2_MSS_WIDTH 15
@@ -1241,8 +1262,11 @@
12411262
#define TX_NORMAL_DESC3_TCPPL_WIDTH 18
12421263
#define TX_NORMAL_DESC3_TSE_INDEX 18
12431264
#define TX_NORMAL_DESC3_TSE_WIDTH 1
1265+
#define TX_NORMAL_DESC3_VNP_INDEX 23
1266+
#define TX_NORMAL_DESC3_VNP_WIDTH 3
12441267

12451268
#define TX_NORMAL_DESC2_VLAN_INSERT 0x2
1269+
#define TX_NORMAL_DESC3_VXLAN_PACKET 0x3
12461270

12471271
/* MDIO undefined or vendor specific registers */
12481272
#ifndef MDIO_PMA_10GBR_PMD_CTRL
@@ -1339,6 +1363,7 @@
13391363
#define XGBE_AN_CL37_PCS_MODE_BASEX 0x00
13401364
#define XGBE_AN_CL37_PCS_MODE_SGMII 0x04
13411365
#define XGBE_AN_CL37_TX_CONFIG_MASK 0x08
1366+
#define XGBE_AN_CL37_MII_CTRL_8BIT 0x0100
13421367

13431368
/* Bit setting and getting macros
13441369
* The get macro will extract the current bit field value from within

‎drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -527,3 +527,28 @@ void xgbe_debugfs_exit(struct xgbe_prv_data *pdata)
527527
debugfs_remove_recursive(pdata->xgbe_debugfs);
528528
pdata->xgbe_debugfs = NULL;
529529
}
530+
531+
void xgbe_debugfs_rename(struct xgbe_prv_data *pdata)
532+
{
533+
struct dentry *pfile;
534+
char *buf;
535+
536+
if (!pdata->xgbe_debugfs)
537+
return;
538+
539+
buf = kasprintf(GFP_KERNEL, "amd-xgbe-%s", pdata->netdev->name);
540+
if (!buf)
541+
return;
542+
543+
if (!strcmp(pdata->xgbe_debugfs->d_name.name, buf))
544+
goto out;
545+
546+
pfile = debugfs_rename(pdata->xgbe_debugfs->d_parent,
547+
pdata->xgbe_debugfs,
548+
pdata->xgbe_debugfs->d_parent, buf);
549+
if (!pfile)
550+
netdev_err(pdata->netdev, "debugfs_rename failed\n");
551+
552+
out:
553+
kfree(buf);
554+
}

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