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335 | 335 | };
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336 | 336 |
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337 | 337 | scif0: serial@e6e60000 {
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338 |
| - /* placeholder */ |
| 338 | + compatible = "renesas,scif-r8a77965", |
| 339 | + "renesas,rcar-gen3-scif", "renesas,scif"; |
| 340 | + reg = <0 0xe6e60000 0 64>; |
| 341 | + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
| 342 | + clocks = <&cpg CPG_MOD 207>, |
| 343 | + <&cpg CPG_CORE 20>, |
| 344 | + <&scif_clk>; |
| 345 | + clock-names = "fck", "brg_int", "scif_clk"; |
| 346 | + dmas = <&dmac1 0x51>, <&dmac1 0x50>, |
| 347 | + <&dmac2 0x51>, <&dmac2 0x50>; |
| 348 | + dma-names = "tx", "rx", "tx", "rx"; |
| 349 | + power-domains = <&sysc 32>; |
| 350 | + resets = <&cpg 207>; |
| 351 | + status = "disabled"; |
339 | 352 | };
|
340 | 353 |
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341 | 354 | scif1: serial@e6e68000 {
|
342 |
| - /* placeholder */ |
| 355 | + compatible = "renesas,scif-r8a77965", |
| 356 | + "renesas,rcar-gen3-scif", "renesas,scif"; |
| 357 | + reg = <0 0xe6e68000 0 64>; |
| 358 | + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
| 359 | + clocks = <&cpg CPG_MOD 206>, |
| 360 | + <&cpg CPG_CORE 20>, |
| 361 | + <&scif_clk>; |
| 362 | + clock-names = "fck", "brg_int", "scif_clk"; |
| 363 | + dmas = <&dmac1 0x53>, <&dmac1 0x52>, |
| 364 | + <&dmac2 0x53>, <&dmac2 0x52>; |
| 365 | + dma-names = "tx", "rx", "tx", "rx"; |
| 366 | + power-domains = <&sysc 32>; |
| 367 | + resets = <&cpg 206>; |
| 368 | + status = "disabled"; |
343 | 369 | };
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344 | 370 |
|
345 | 371 | scif2: serial@e6e88000 {
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346 |
| - /* placeholder */ |
| 372 | + compatible = "renesas,scif-r8a77965", |
| 373 | + "renesas,rcar-gen3-scif", "renesas,scif"; |
| 374 | + reg = <0 0xe6e88000 0 64>; |
| 375 | + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; |
| 376 | + clocks = <&cpg CPG_MOD 310>, |
| 377 | + <&cpg CPG_CORE 20>, |
| 378 | + <&scif_clk>; |
| 379 | + clock-names = "fck", "brg_int", "scif_clk"; |
| 380 | + power-domains = <&sysc 32>; |
| 381 | + resets = <&cpg 310>; |
| 382 | + status = "disabled"; |
347 | 383 | };
|
348 | 384 |
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349 | 385 | scif3: serial@e6c50000 {
|
350 |
| - /* placeholder */ |
| 386 | + compatible = "renesas,scif-r8a77965", |
| 387 | + "renesas,rcar-gen3-scif", "renesas,scif"; |
| 388 | + reg = <0 0xe6c50000 0 64>; |
| 389 | + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
| 390 | + clocks = <&cpg CPG_MOD 204>, |
| 391 | + <&cpg CPG_CORE 20>, |
| 392 | + <&scif_clk>; |
| 393 | + clock-names = "fck", "brg_int", "scif_clk"; |
| 394 | + dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
| 395 | + dma-names = "tx", "rx"; |
| 396 | + power-domains = <&sysc 32>; |
| 397 | + resets = <&cpg 204>; |
| 398 | + status = "disabled"; |
351 | 399 | };
|
352 | 400 |
|
353 | 401 | scif4: serial@e6c40000 {
|
354 |
| - /* placeholder */ |
| 402 | + compatible = "renesas,scif-r8a77965", |
| 403 | + "renesas,rcar-gen3-scif", "renesas,scif"; |
| 404 | + reg = <0 0xe6c40000 0 64>; |
| 405 | + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 406 | + clocks = <&cpg CPG_MOD 203>, |
| 407 | + <&cpg CPG_CORE 20>, |
| 408 | + <&scif_clk>; |
| 409 | + clock-names = "fck", "brg_int", "scif_clk"; |
| 410 | + dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
| 411 | + dma-names = "tx", "rx"; |
| 412 | + power-domains = <&sysc 32>; |
| 413 | + resets = <&cpg 203>; |
| 414 | + status = "disabled"; |
355 | 415 | };
|
356 | 416 |
|
357 | 417 | scif5: serial@e6f30000 {
|
358 |
| - /* placeholder */ |
| 418 | + compatible = "renesas,scif-r8a77965", |
| 419 | + "renesas,rcar-gen3-scif", "renesas,scif"; |
| 420 | + reg = <0 0xe6f30000 0 64>; |
| 421 | + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
| 422 | + clocks = <&cpg CPG_MOD 202>, |
| 423 | + <&cpg CPG_CORE 20>, |
| 424 | + <&scif_clk>; |
| 425 | + clock-names = "fck", "brg_int", "scif_clk"; |
| 426 | + dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, |
| 427 | + <&dmac2 0x5b>, <&dmac2 0x5a>; |
| 428 | + dma-names = "tx", "rx", "tx", "rx"; |
| 429 | + power-domains = <&sysc 32>; |
| 430 | + resets = <&cpg 202>; |
| 431 | + status = "disabled"; |
359 | 432 | };
|
360 | 433 |
|
361 | 434 | avb: ethernet@e6800000 {
|
|
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