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davem330davem330
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Merge branch 'mvpp2-various-fixes'
Antoine Tenart says: ==================== net: mvpp2: various fixes This series contains 3 fixes for the Marvell PPv2 driver. Since v1: - Removed one patch about dma masks as it would need a better fix. - Added one fix about the MAC Tx clock source selection. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents 2580c4c + c7dfc8c commit 2d3924c

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  • drivers/net/ethernet/marvell

1 file changed

+20
-11
lines changed

‎drivers/net/ethernet/marvell/mvpp2.c

Lines changed: 20 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -333,7 +333,7 @@
333333
#define MVPP2_GMAC_INBAND_AN_MASK BIT(0)
334334
#define MVPP2_GMAC_FLOW_CTRL_MASK GENMASK(2, 1)
335335
#define MVPP2_GMAC_PCS_ENABLE_MASK BIT(3)
336-
#define MVPP2_GMAC_PORT_RGMII_MASK BIT(4)
336+
#define MVPP2_GMAC_INTERNAL_CLK_MASK BIT(4)
337337
#define MVPP2_GMAC_DISABLE_PADDING BIT(5)
338338
#define MVPP2_GMAC_PORT_RESET_MASK BIT(6)
339339
#define MVPP2_GMAC_AUTONEG_CONFIG 0xc
@@ -676,6 +676,7 @@ enum mvpp2_tag_type {
676676
#define MVPP2_PRS_RI_L3_MCAST BIT(15)
677677
#define MVPP2_PRS_RI_L3_BCAST (BIT(15) | BIT(16))
678678
#define MVPP2_PRS_RI_IP_FRAG_MASK 0x20000
679+
#define MVPP2_PRS_RI_IP_FRAG_TRUE BIT(17)
679680
#define MVPP2_PRS_RI_UDF3_MASK 0x300000
680681
#define MVPP2_PRS_RI_UDF3_RX_SPECIAL BIT(21)
681682
#define MVPP2_PRS_RI_L4_PROTO_MASK 0x1c00000
@@ -2315,7 +2316,7 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
23152316
(proto != IPPROTO_IGMP))
23162317
return -EINVAL;
23172318

2318-
/* Fragmented packet */
2319+
/* Not fragmented packet */
23192320
tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
23202321
MVPP2_PE_LAST_FREE_TID);
23212322
if (tid < 0)
@@ -2334,8 +2335,12 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
23342335
MVPP2_PRS_SRAM_OP_SEL_UDF_ADD);
23352336
mvpp2_prs_sram_ai_update(&pe, MVPP2_PRS_IPV4_DIP_AI_BIT,
23362337
MVPP2_PRS_IPV4_DIP_AI_BIT);
2337-
mvpp2_prs_sram_ri_update(&pe, ri | MVPP2_PRS_RI_IP_FRAG_MASK,
2338-
ri_mask | MVPP2_PRS_RI_IP_FRAG_MASK);
2338+
mvpp2_prs_sram_ri_update(&pe, ri, ri_mask | MVPP2_PRS_RI_IP_FRAG_MASK);
2339+
2340+
mvpp2_prs_tcam_data_byte_set(&pe, 2, 0x00,
2341+
MVPP2_PRS_TCAM_PROTO_MASK_L);
2342+
mvpp2_prs_tcam_data_byte_set(&pe, 3, 0x00,
2343+
MVPP2_PRS_TCAM_PROTO_MASK);
23392344

23402345
mvpp2_prs_tcam_data_byte_set(&pe, 5, proto, MVPP2_PRS_TCAM_PROTO_MASK);
23412346
mvpp2_prs_tcam_ai_update(&pe, 0, MVPP2_PRS_IPV4_DIP_AI_BIT);
@@ -2346,7 +2351,7 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
23462351
mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_IP4);
23472352
mvpp2_prs_hw_write(priv, &pe);
23482353

2349-
/* Not fragmented packet */
2354+
/* Fragmented packet */
23502355
tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
23512356
MVPP2_PE_LAST_FREE_TID);
23522357
if (tid < 0)
@@ -2358,8 +2363,11 @@ static int mvpp2_prs_ip4_proto(struct mvpp2 *priv, unsigned short proto,
23582363
pe.sram.word[MVPP2_PRS_SRAM_RI_CTRL_WORD] = 0x0;
23592364
mvpp2_prs_sram_ri_update(&pe, ri, ri_mask);
23602365

2361-
mvpp2_prs_tcam_data_byte_set(&pe, 2, 0x00, MVPP2_PRS_TCAM_PROTO_MASK_L);
2362-
mvpp2_prs_tcam_data_byte_set(&pe, 3, 0x00, MVPP2_PRS_TCAM_PROTO_MASK);
2366+
mvpp2_prs_sram_ri_update(&pe, ri | MVPP2_PRS_RI_IP_FRAG_TRUE,
2367+
ri_mask | MVPP2_PRS_RI_IP_FRAG_MASK);
2368+
2369+
mvpp2_prs_tcam_data_byte_set(&pe, 2, 0x00, 0x0);
2370+
mvpp2_prs_tcam_data_byte_set(&pe, 3, 0x00, 0x0);
23632371

23642372
/* Update shadow table and hw entry */
23652373
mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_IP4);
@@ -4591,7 +4599,6 @@ static void mvpp2_port_mii_gmac_configure(struct mvpp2_port *port)
45914599
val |= MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK;
45924600
} else if (phy_interface_mode_is_rgmii(port->phy_interface)) {
45934601
val &= ~MVPP2_GMAC_PCS_ENABLE_MASK;
4594-
val |= MVPP2_GMAC_PORT_RGMII_MASK;
45954602
}
45964603
writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
45974604

@@ -7496,7 +7503,7 @@ static void mvpp2_port_copy_mac_addr(struct net_device *dev, struct mvpp2 *priv,
74967503
/* Ports initialization */
74977504
static int mvpp2_port_probe(struct platform_device *pdev,
74987505
struct device_node *port_node,
7499-
struct mvpp2 *priv)
7506+
struct mvpp2 *priv, int index)
75007507
{
75017508
struct device_node *phy_node;
75027509
struct phy *comphy;
@@ -7670,7 +7677,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
76707677
}
76717678
netdev_info(dev, "Using %s mac address %pM\n", mac_from, dev->dev_addr);
76727679

7673-
priv->port_list[id] = port;
7680+
priv->port_list[index] = port;
76747681
return 0;
76757682

76767683
err_free_port_pcpu:
@@ -8005,10 +8012,12 @@ static int mvpp2_probe(struct platform_device *pdev)
80058012
}
80068013

80078014
/* Initialize ports */
8015+
i = 0;
80088016
for_each_available_child_of_node(dn, port_node) {
8009-
err = mvpp2_port_probe(pdev, port_node, priv);
8017+
err = mvpp2_port_probe(pdev, port_node, priv, i);
80108018
if (err < 0)
80118019
goto err_mg_clk;
8020+
i++;
80128021
}
80138022

80148023
platform_set_drvdata(pdev, priv);

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