MIPS: CPC: Fix type for GCR CPC base reg for 64-bit

Markos Chandras · ralfbaechle · commit 391057d915f4 · 2015-08-26T15:23:14.000+02:00
The GCR CPC base register is 64-bit on 64-bit processors so use the appropriate field. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10645/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/kernel/mips-cpc.c b/arch/mips/kernel/mips-cpc.c
@@ -23,7 +23,7 @@ static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags);
 
 phys_addr_t __weak mips_cpc_phys_base(void)
 {
-	u32 cpc_base;
+	unsigned long cpc_base;
 
 	if (!mips_cm_present())
 		return 0;

Original file line number	Diff line number	Diff line change
`@@ -23,7 +23,7 @@ static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags);`
`23`	`23`
`24`	`24`	`phys_addr_t __weak mips_cpc_phys_base(void)`
`25`	`25`	`{`
`26`		`- u32 cpc_base;`
	`26`	`+ unsigned long cpc_base;`
`27`	`27`
`28`	`28`	`if (!mips_cm_present())`
`29`	`29`	`return 0;`