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davem330davem330
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Merge branch 'mlx5e-next'
Amir Vadai says: ==================== ConnectX-4 driver update 2015-07-23 This patchset introduce some performance enhancements to the ConnectX-4 driver. 1. Improving RSS distribution, and make RSS function controlable using ethtool. 2. Make memory that is written by NIC and read by host CPU allocate in the local NUMA to the processing CPU 3. Support tx copybreak 4. Using hardware feature called blueflame to save DMA reads when possible Another patch by Achiad fix some cosmetic issues in the driver. Patchset was applied and tested on top of commit 045a0fa ("ip_tunnel: Call ip_tunnel_core_init() from inet_init()") ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents fda19e8 + a741749 commit 6ecfdd2

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12 files changed

+535
-149
lines changed

12 files changed

+535
-149
lines changed

‎drivers/net/ethernet/mellanox/mlx5/core/alloc.c

Lines changed: 40 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -45,15 +45,34 @@
4545
* register it in a memory region at HCA virtual address 0.
4646
*/
4747

48-
int mlx5_buf_alloc(struct mlx5_core_dev *dev, int size, struct mlx5_buf *buf)
48+
static void *mlx5_dma_zalloc_coherent_node(struct mlx5_core_dev *dev,
49+
size_t size, dma_addr_t *dma_handle,
50+
int node)
51+
{
52+
struct mlx5_priv *priv = &dev->priv;
53+
int original_node;
54+
void *cpu_handle;
55+
56+
mutex_lock(&priv->alloc_mutex);
57+
original_node = dev_to_node(&dev->pdev->dev);
58+
set_dev_node(&dev->pdev->dev, node);
59+
cpu_handle = dma_zalloc_coherent(&dev->pdev->dev, size,
60+
dma_handle, GFP_KERNEL);
61+
set_dev_node(&dev->pdev->dev, original_node);
62+
mutex_unlock(&priv->alloc_mutex);
63+
return cpu_handle;
64+
}
65+
66+
int mlx5_buf_alloc_node(struct mlx5_core_dev *dev, int size,
67+
struct mlx5_buf *buf, int node)
4968
{
5069
dma_addr_t t;
5170

5271
buf->size = size;
5372
buf->npages = 1;
5473
buf->page_shift = (u8)get_order(size) + PAGE_SHIFT;
55-
buf->direct.buf = dma_zalloc_coherent(&dev->pdev->dev,
56-
size, &t, GFP_KERNEL);
74+
buf->direct.buf = mlx5_dma_zalloc_coherent_node(dev, size,
75+
&t, node);
5776
if (!buf->direct.buf)
5877
return -ENOMEM;
5978

@@ -66,6 +85,11 @@ int mlx5_buf_alloc(struct mlx5_core_dev *dev, int size, struct mlx5_buf *buf)
6685

6786
return 0;
6887
}
88+
89+
int mlx5_buf_alloc(struct mlx5_core_dev *dev, int size, struct mlx5_buf *buf)
90+
{
91+
return mlx5_buf_alloc_node(dev, size, buf, dev->priv.numa_node);
92+
}
6993
EXPORT_SYMBOL_GPL(mlx5_buf_alloc);
7094

7195
void mlx5_buf_free(struct mlx5_core_dev *dev, struct mlx5_buf *buf)
@@ -75,7 +99,8 @@ void mlx5_buf_free(struct mlx5_core_dev *dev, struct mlx5_buf *buf)
7599
}
76100
EXPORT_SYMBOL_GPL(mlx5_buf_free);
77101

78-
static struct mlx5_db_pgdir *mlx5_alloc_db_pgdir(struct device *dma_device)
102+
static struct mlx5_db_pgdir *mlx5_alloc_db_pgdir(struct mlx5_core_dev *dev,
103+
int node)
79104
{
80105
struct mlx5_db_pgdir *pgdir;
81106

@@ -84,8 +109,9 @@ static struct mlx5_db_pgdir *mlx5_alloc_db_pgdir(struct device *dma_device)
84109
return NULL;
85110

86111
bitmap_fill(pgdir->bitmap, MLX5_DB_PER_PAGE);
87-
pgdir->db_page = dma_alloc_coherent(dma_device, PAGE_SIZE,
88-
&pgdir->db_dma, GFP_KERNEL);
112+
113+
pgdir->db_page = mlx5_dma_zalloc_coherent_node(dev, PAGE_SIZE,
114+
&pgdir->db_dma, node);
89115
if (!pgdir->db_page) {
90116
kfree(pgdir);
91117
return NULL;
@@ -118,7 +144,7 @@ static int mlx5_alloc_db_from_pgdir(struct mlx5_db_pgdir *pgdir,
118144
return 0;
119145
}
120146

121-
int mlx5_db_alloc(struct mlx5_core_dev *dev, struct mlx5_db *db)
147+
int mlx5_db_alloc_node(struct mlx5_core_dev *dev, struct mlx5_db *db, int node)
122148
{
123149
struct mlx5_db_pgdir *pgdir;
124150
int ret = 0;
@@ -129,7 +155,7 @@ int mlx5_db_alloc(struct mlx5_core_dev *dev, struct mlx5_db *db)
129155
if (!mlx5_alloc_db_from_pgdir(pgdir, db))
130156
goto out;
131157

132-
pgdir = mlx5_alloc_db_pgdir(&(dev->pdev->dev));
158+
pgdir = mlx5_alloc_db_pgdir(dev, node);
133159
if (!pgdir) {
134160
ret = -ENOMEM;
135161
goto out;
@@ -145,6 +171,12 @@ int mlx5_db_alloc(struct mlx5_core_dev *dev, struct mlx5_db *db)
145171

146172
return ret;
147173
}
174+
EXPORT_SYMBOL_GPL(mlx5_db_alloc_node);
175+
176+
int mlx5_db_alloc(struct mlx5_core_dev *dev, struct mlx5_db *db)
177+
{
178+
return mlx5_db_alloc_node(dev, db, dev->priv.numa_node);
179+
}
148180
EXPORT_SYMBOL_GPL(mlx5_db_alloc);
149181

150182
void mlx5_db_free(struct mlx5_core_dev *dev, struct mlx5_db *db)

‎drivers/net/ethernet/mellanox/mlx5/core/en.h

Lines changed: 33 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@
6060

6161
#define MLX5E_TX_CQ_POLL_BUDGET 128
6262
#define MLX5E_UPDATE_STATS_INTERVAL 200 /* msecs */
63+
#define MLX5E_SQ_BF_BUDGET 16
6364

6465
static const char vport_strings[][ETH_GSTRING_LEN] = {
6566
/* vport statistics */
@@ -195,6 +196,8 @@ struct mlx5e_params {
195196
u16 rx_hash_log_tbl_sz;
196197
bool lro_en;
197198
u32 lro_wqe_sz;
199+
u8 rss_hfunc;
200+
u16 tx_max_inline;
198201
};
199202

200203
enum {
@@ -266,7 +269,9 @@ struct mlx5e_sq {
266269
/* dirtied @xmit */
267270
u16 pc ____cacheline_aligned_in_smp;
268271
u32 dma_fifo_pc;
269-
u32 bf_offset;
272+
u16 bf_offset;
273+
u16 prev_cc;
274+
u8 bf_budget;
270275
struct mlx5e_sq_stats stats;
271276

272277
struct mlx5e_cq cq;
@@ -279,9 +284,10 @@ struct mlx5e_sq {
279284
struct mlx5_wq_cyc wq;
280285
u32 dma_fifo_mask;
281286
void __iomem *uar_map;
287+
void __iomem *uar_bf_map;
282288
struct netdev_queue *txq;
283289
u32 sqn;
284-
u32 bf_buf_size;
290+
u16 bf_buf_size;
285291
u16 max_inline;
286292
u16 edge;
287293
struct device *pdev;
@@ -324,14 +330,18 @@ struct mlx5e_channel {
324330
};
325331

326332
enum mlx5e_traffic_types {
327-
MLX5E_TT_IPV4_TCP = 0,
328-
MLX5E_TT_IPV6_TCP = 1,
329-
MLX5E_TT_IPV4_UDP = 2,
330-
MLX5E_TT_IPV6_UDP = 3,
331-
MLX5E_TT_IPV4 = 4,
332-
MLX5E_TT_IPV6 = 5,
333-
MLX5E_TT_ANY = 6,
334-
MLX5E_NUM_TT = 7,
333+
MLX5E_TT_IPV4_TCP,
334+
MLX5E_TT_IPV6_TCP,
335+
MLX5E_TT_IPV4_UDP,
336+
MLX5E_TT_IPV6_UDP,
337+
MLX5E_TT_IPV4_IPSEC_AH,
338+
MLX5E_TT_IPV6_IPSEC_AH,
339+
MLX5E_TT_IPV4_IPSEC_ESP,
340+
MLX5E_TT_IPV6_IPSEC_ESP,
341+
MLX5E_TT_IPV4,
342+
MLX5E_TT_IPV6,
343+
MLX5E_TT_ANY,
344+
MLX5E_NUM_TT,
335345
};
336346

337347
enum {
@@ -491,8 +501,10 @@ int mlx5e_update_priv_params(struct mlx5e_priv *priv,
491501
struct mlx5e_params *new_params);
492502

493503
static inline void mlx5e_tx_notify_hw(struct mlx5e_sq *sq,
494-
struct mlx5e_tx_wqe *wqe)
504+
struct mlx5e_tx_wqe *wqe, int bf_sz)
495505
{
506+
u16 ofst = MLX5_BF_OFFSET + sq->bf_offset;
507+
496508
/* ensure wqe is visible to device before updating doorbell record */
497509
dma_wmb();
498510

@@ -503,9 +515,15 @@ static inline void mlx5e_tx_notify_hw(struct mlx5e_sq *sq,
503515
*/
504516
wmb();
505517

506-
mlx5_write64((__be32 *)&wqe->ctrl,
507-
sq->uar_map + MLX5_BF_OFFSET + sq->bf_offset,
508-
NULL);
518+
if (bf_sz) {
519+
__iowrite64_copy(sq->uar_bf_map + ofst, &wqe->ctrl, bf_sz);
520+
521+
/* flush the write-combining mapped buffer */
522+
wmb();
523+
524+
} else {
525+
mlx5_write64((__be32 *)&wqe->ctrl, sq->uar_map + ofst, NULL);
526+
}
509527

510528
sq->bf_offset ^= sq->bf_buf_size;
511529
}
@@ -519,3 +537,4 @@ static inline void mlx5e_cq_arm(struct mlx5e_cq *cq)
519537
}
520538

521539
extern const struct ethtool_ops mlx5e_ethtool_ops;
540+
u16 mlx5e_get_max_inline_cap(struct mlx5_core_dev *mdev);

‎drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

Lines changed: 92 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -662,6 +662,94 @@ static int mlx5e_set_settings(struct net_device *netdev,
662662
return err;
663663
}
664664

665+
static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
666+
u8 *hfunc)
667+
{
668+
struct mlx5e_priv *priv = netdev_priv(netdev);
669+
670+
if (hfunc)
671+
*hfunc = priv->params.rss_hfunc;
672+
673+
return 0;
674+
}
675+
676+
static int mlx5e_set_rxfh(struct net_device *netdev, const u32 *indir,
677+
const u8 *key, const u8 hfunc)
678+
{
679+
struct mlx5e_priv *priv = netdev_priv(netdev);
680+
int err = 0;
681+
682+
if (hfunc == ETH_RSS_HASH_NO_CHANGE)
683+
return 0;
684+
685+
if ((hfunc != ETH_RSS_HASH_XOR) &&
686+
(hfunc != ETH_RSS_HASH_TOP))
687+
return -EINVAL;
688+
689+
mutex_lock(&priv->state_lock);
690+
691+
priv->params.rss_hfunc = hfunc;
692+
if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
693+
mlx5e_close_locked(priv->netdev);
694+
err = mlx5e_open_locked(priv->netdev);
695+
}
696+
697+
mutex_unlock(&priv->state_lock);
698+
699+
return err;
700+
}
701+
702+
static int mlx5e_get_tunable(struct net_device *dev,
703+
const struct ethtool_tunable *tuna,
704+
void *data)
705+
{
706+
const struct mlx5e_priv *priv = netdev_priv(dev);
707+
int err = 0;
708+
709+
switch (tuna->id) {
710+
case ETHTOOL_TX_COPYBREAK:
711+
*(u32 *)data = priv->params.tx_max_inline;
712+
break;
713+
default:
714+
err = -EINVAL;
715+
break;
716+
}
717+
718+
return err;
719+
}
720+
721+
static int mlx5e_set_tunable(struct net_device *dev,
722+
const struct ethtool_tunable *tuna,
723+
const void *data)
724+
{
725+
struct mlx5e_priv *priv = netdev_priv(dev);
726+
struct mlx5_core_dev *mdev = priv->mdev;
727+
struct mlx5e_params new_params;
728+
u32 val;
729+
int err = 0;
730+
731+
switch (tuna->id) {
732+
case ETHTOOL_TX_COPYBREAK:
733+
val = *(u32 *)data;
734+
if (val > mlx5e_get_max_inline_cap(mdev)) {
735+
err = -EINVAL;
736+
break;
737+
}
738+
739+
mutex_lock(&priv->state_lock);
740+
new_params = priv->params;
741+
new_params.tx_max_inline = val;
742+
err = mlx5e_update_priv_params(priv, &new_params);
743+
mutex_unlock(&priv->state_lock);
744+
break;
745+
default:
746+
err = -EINVAL;
747+
break;
748+
}
749+
750+
return err;
751+
}
752+
665753
const struct ethtool_ops mlx5e_ethtool_ops = {
666754
.get_drvinfo = mlx5e_get_drvinfo,
667755
.get_link = ethtool_op_get_link,
@@ -676,4 +764,8 @@ const struct ethtool_ops mlx5e_ethtool_ops = {
676764
.set_coalesce = mlx5e_set_coalesce,
677765
.get_settings = mlx5e_get_settings,
678766
.set_settings = mlx5e_set_settings,
767+
.get_rxfh = mlx5e_get_rxfh,
768+
.set_rxfh = mlx5e_set_rxfh,
769+
.get_tunable = mlx5e_get_tunable,
770+
.set_tunable = mlx5e_set_tunable,
679771
};

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