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Yuval Mintzdavem330
Yuval Mintz
authored and
davem330
committed
bnx2x,cnic: use FW 7.8.2
This patch moves the bnx2x and cnic drivers into using FW 7.8.2 which was recently submitted into the linux-firmware tree. A short summary of minor bugs fixed by this FW: 1. In switch dependent mode, fix several issues regarding inner vlan vs. DCB priorities. 2. iSCSI - not all packets were completed on a forward channel. 3. DCB - fixed for 4-port devices. 4. Fixed false parity reported in CAM memories when operating near -5% on the 1.0V core supply. 5. ETS default settings are set to fairness between traffic classes (rather than strict priority), and uses the same chip receive buffer configuration for both PFC and pause. For a complete list of fixes made by this FW, see commit 236367d in the linux-firmware git repository. Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com> Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com> Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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-563
lines changed

11 files changed

+79
-563
lines changed

‎drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3026,8 +3026,9 @@ netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
30263026
first_bd = tx_start_bd;
30273027

30283028
tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3029-
SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_ETH_ADDR_TYPE,
3030-
mac_type);
3029+
SET_FLAG(tx_start_bd->general_data,
3030+
ETH_TX_START_BD_PARSE_NBDS,
3031+
0);
30313032

30323033
/* header nbd */
30333034
SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_HDR_NBDS, 1);
@@ -3077,13 +3078,20 @@ netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
30773078
&pbd_e2->dst_mac_addr_lo,
30783079
eth->h_dest);
30793080
}
3081+
3082+
SET_FLAG(pbd_e2_parsing_data,
3083+
ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE, mac_type);
30803084
} else {
3085+
u16 global_data = 0;
30813086
pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
30823087
memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
30833088
/* Set PBD in checksum offload case */
30843089
if (xmit_type & XMIT_CSUM)
30853090
hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type);
30863091

3092+
SET_FLAG(global_data,
3093+
ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE, mac_type);
3094+
pbd_e1x->global_data |= cpu_to_le16(global_data);
30873095
}
30883096

30893097
/* Setup the data pointer of the first BD of the packet */

‎drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -91,25 +91,21 @@ static void bnx2x_pfc_set(struct bnx2x *bp)
9191
/*
9292
* Rx COS configuration
9393
* Changing PFC RX configuration .
94-
* In RX COS0 will always be configured to lossy and COS1 to lossless
94+
* In RX COS0 will always be configured to lossless and COS1 to lossy
9595
*/
9696
for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
9797
pri_bit = 1 << i;
9898

99-
if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
99+
if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp)))
100100
val |= 1 << (i * 4);
101101
}
102102

103103
pfc_params.pkt_priority_to_cos = val;
104104

105105
/* RX COS0 */
106-
pfc_params.llfc_low_priority_classes = 0;
106+
pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
107107
/* RX COS1 */
108-
pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
109-
110-
/* BRB configuration */
111-
pfc_params.cos0_pauseable = false;
112-
pfc_params.cos1_pauseable = true;
108+
pfc_params.llfc_high_priority_classes = 0;
113109

114110
bnx2x_acquire_phy_lock(bp);
115111
bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;

‎drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c

Lines changed: 20 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2040,8 +2040,6 @@ static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode)
20402040
u16 pkt_prod, bd_prod;
20412041
struct sw_tx_bd *tx_buf;
20422042
struct eth_tx_start_bd *tx_start_bd;
2043-
struct eth_tx_parse_bd_e1x *pbd_e1x = NULL;
2044-
struct eth_tx_parse_bd_e2 *pbd_e2 = NULL;
20452043
dma_addr_t mapping;
20462044
union eth_rx_cqe *cqe;
20472045
u8 cqe_fp_flags, cqe_fp_type;
@@ -2132,22 +2130,33 @@ static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode)
21322130
tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb));
21332131
tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod);
21342132
tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
2135-
SET_FLAG(tx_start_bd->general_data,
2136-
ETH_TX_START_BD_ETH_ADDR_TYPE,
2137-
UNICAST_ADDRESS);
21382133
SET_FLAG(tx_start_bd->general_data,
21392134
ETH_TX_START_BD_HDR_NBDS,
21402135
1);
2136+
SET_FLAG(tx_start_bd->general_data,
2137+
ETH_TX_START_BD_PARSE_NBDS,
2138+
0);
21412139

21422140
/* turn on parsing and get a BD */
21432141
bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
21442142

2145-
pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
2146-
pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2;
2147-
2148-
memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
2149-
memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
2150-
2143+
if (CHIP_IS_E1x(bp)) {
2144+
u16 global_data = 0;
2145+
struct eth_tx_parse_bd_e1x *pbd_e1x =
2146+
&txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
2147+
memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
2148+
SET_FLAG(global_data,
2149+
ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE, UNICAST_ADDRESS);
2150+
pbd_e1x->global_data = cpu_to_le16(global_data);
2151+
} else {
2152+
u32 parsing_data = 0;
2153+
struct eth_tx_parse_bd_e2 *pbd_e2 =
2154+
&txdata->tx_desc_ring[bd_prod].parse_bd_e2;
2155+
memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
2156+
SET_FLAG(parsing_data,
2157+
ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE, UNICAST_ADDRESS);
2158+
pbd_e2->parsing_data = cpu_to_le32(parsing_data);
2159+
}
21512160
wmb();
21522161

21532162
txdata->tx_db.data.prod += 2;

‎drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -88,9 +88,6 @@
8888
#define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[102].base)
8989
#define TSTORM_ASSERT_LIST_OFFSET(assertListEntry) \
9090
(IRO[101].base + ((assertListEntry) * IRO[101].m1))
91-
#define TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET (IRO[107].base)
92-
#define TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET \
93-
(IRO[108].base)
9491
#define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) \
9592
(IRO[201].base + ((pfId) * IRO[201].m1))
9693
#define TSTORM_FUNC_EN_OFFSET(funcId) \

‎drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h

Lines changed: 30 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -2789,8 +2789,8 @@ struct afex_stats {
27892789
};
27902790

27912791
#define BCM_5710_FW_MAJOR_VERSION 7
2792-
#define BCM_5710_FW_MINOR_VERSION 2
2793-
#define BCM_5710_FW_REVISION_VERSION 51
2792+
#define BCM_5710_FW_MINOR_VERSION 8
2793+
#define BCM_5710_FW_REVISION_VERSION 2
27942794
#define BCM_5710_FW_ENGINEERING_VERSION 0
27952795
#define BCM_5710_FW_COMPILE_FLAGS 1
27962796

@@ -3912,10 +3912,8 @@ struct eth_rss_update_ramrod_data {
39123912
#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY_SHIFT 4
39133913
#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY (0x1<<5)
39143914
#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY_SHIFT 5
3915-
#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY (0x1<<6)
3916-
#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY_SHIFT 6
3917-
#define __ETH_RSS_UPDATE_RAMROD_DATA_RESERVED0 (0x1<<7)
3918-
#define __ETH_RSS_UPDATE_RAMROD_DATA_RESERVED0_SHIFT 7
3915+
#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY (0x1<<7)
3916+
#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY_SHIFT 7
39193917
u8 rss_result_mask;
39203918
u8 rss_mode;
39213919
__le32 __reserved2;
@@ -4131,27 +4129,29 @@ struct eth_tx_start_bd {
41314129
#define ETH_TX_START_BD_HDR_NBDS_SHIFT 0
41324130
#define ETH_TX_START_BD_FORCE_VLAN_MODE (0x1<<4)
41334131
#define ETH_TX_START_BD_FORCE_VLAN_MODE_SHIFT 4
4134-
#define ETH_TX_START_BD_RESREVED (0x1<<5)
4135-
#define ETH_TX_START_BD_RESREVED_SHIFT 5
4136-
#define ETH_TX_START_BD_ETH_ADDR_TYPE (0x3<<6)
4137-
#define ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT 6
4132+
#define ETH_TX_START_BD_PARSE_NBDS (0x3<<5)
4133+
#define ETH_TX_START_BD_PARSE_NBDS_SHIFT 5
4134+
#define ETH_TX_START_BD_RESREVED (0x1<<7)
4135+
#define ETH_TX_START_BD_RESREVED_SHIFT 7
41384136
};
41394137

41404138
/*
41414139
* Tx parsing BD structure for ETH E1/E1h
41424140
*/
41434141
struct eth_tx_parse_bd_e1x {
4144-
u8 global_data;
4142+
__le16 global_data;
41454143
#define ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W (0xF<<0)
41464144
#define ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W_SHIFT 0
4147-
#define ETH_TX_PARSE_BD_E1X_RESERVED0 (0x1<<4)
4148-
#define ETH_TX_PARSE_BD_E1X_RESERVED0_SHIFT 4
4149-
#define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN (0x1<<5)
4150-
#define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN_SHIFT 5
4151-
#define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN (0x1<<6)
4152-
#define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT 6
4153-
#define ETH_TX_PARSE_BD_E1X_NS_FLG (0x1<<7)
4154-
#define ETH_TX_PARSE_BD_E1X_NS_FLG_SHIFT 7
4145+
#define ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE (0x3<<4)
4146+
#define ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT 4
4147+
#define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN (0x1<<6)
4148+
#define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN_SHIFT 6
4149+
#define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN (0x1<<7)
4150+
#define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT 7
4151+
#define ETH_TX_PARSE_BD_E1X_NS_FLG (0x1<<8)
4152+
#define ETH_TX_PARSE_BD_E1X_NS_FLG_SHIFT 8
4153+
#define ETH_TX_PARSE_BD_E1X_RESERVED0 (0x7F<<9)
4154+
#define ETH_TX_PARSE_BD_E1X_RESERVED0_SHIFT 9
41554155
u8 tcp_flags;
41564156
#define ETH_TX_PARSE_BD_E1X_FIN_FLG (0x1<<0)
41574157
#define ETH_TX_PARSE_BD_E1X_FIN_FLG_SHIFT 0
@@ -4170,7 +4170,6 @@ struct eth_tx_parse_bd_e1x {
41704170
#define ETH_TX_PARSE_BD_E1X_CWR_FLG (0x1<<7)
41714171
#define ETH_TX_PARSE_BD_E1X_CWR_FLG_SHIFT 7
41724172
u8 ip_hlen_w;
4173-
s8 reserved;
41744173
__le16 total_hlen_w;
41754174
__le16 tcp_pseudo_csum;
41764175
__le16 lso_mss;
@@ -4189,14 +4188,16 @@ struct eth_tx_parse_bd_e2 {
41894188
__le16 src_mac_addr_mid;
41904189
__le16 src_mac_addr_hi;
41914190
__le32 parsing_data;
4192-
#define ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W (0x1FFF<<0)
4191+
#define ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W (0x7FF<<0)
41934192
#define ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT 0
4194-
#define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW (0xF<<13)
4195-
#define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT 13
4196-
#define ETH_TX_PARSE_BD_E2_LSO_MSS (0x3FFF<<17)
4197-
#define ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT 17
4198-
#define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR (0x1<<31)
4199-
#define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR_SHIFT 31
4193+
#define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW (0xF<<11)
4194+
#define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT 11
4195+
#define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR (0x1<<15)
4196+
#define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR_SHIFT 15
4197+
#define ETH_TX_PARSE_BD_E2_LSO_MSS (0x3FFF<<16)
4198+
#define ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT 16
4199+
#define ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE (0x3<<30)
4200+
#define ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT 30
42004201
};
42014202

42024203
/*
@@ -4964,7 +4965,8 @@ struct flow_control_configuration {
49644965
*
49654966
*/
49664967
struct function_start_data {
4967-
__le16 function_mode;
4968+
u8 function_mode;
4969+
u8 reserved;
49684970
__le16 sd_vlan_tag;
49694971
__le16 vif_id;
49704972
u8 path_id;

‎drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -566,7 +566,7 @@ static const struct {
566566
u32 e2; /* 57712 */
567567
u32 e3; /* 578xx */
568568
} reg_mask; /* Register mask (all valid bits) */
569-
char name[7]; /* Block's longest name is 6 characters long
569+
char name[8]; /* Block's longest name is 7 characters long
570570
* (name + suffix)
571571
*/
572572
} bnx2x_blocks_parity_data[] = {

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