Skip to content

Commit c300af2

Browse files
torvaldstorvalds
committed
Merge tag 'riscv-for-linus-4.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux
Pull RISC-V updates from Palmer Dabbelt: "This patch set contains a lot (at least, for me) of improvements to the RISC-V kernel port: - The removal of some cacheinfo values that were bogus. - On systems with F but without D the kernel will not show the F extension to userspace, as it isn't actually supported. - Support for futexes. - Removal of some unused code. - Cleanup of some menuconfig entries. - Support for systems without a floating-point unit, and for building kernels that will never use the floating-point unit. - More fixes to the RV32I port, which regressed again. It's really time to get this into a regression test somewhere so I stop breaking it. Thanks to Zong for resurrecting it again! - Various fixes that resulted from a year old review of our original patch set that I finally got around to. - Various improvements to SMP support, largely based around having switched to logical hart numbering, as well as some interrupt improvements. This one is in the same patch set as above, thanks to Atish for sheparding everything though as my patch set was a bit of a mess. I'm pretty sure this is our largest patch set since the original kernel contribution, and it's certainly the one with the most contributors. While I don't have anything else I know I'm going to submit for the merge window, I would be somewhat surprised if I didn't screw anything up. Thanks for the help, everyone!" * tag 'riscv-for-linus-4.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux: (31 commits) RISC-V: Cosmetic menuconfig changes riscv: move GCC version check for ARCH_SUPPORTS_INT128 to Kconfig RISC-V: remove the unused return_to_handler export RISC-V: Add futex support. RISC-V: Add FP register ptrace support for gdb. RISC-V: Mask out the F extension on systems without D RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} RISC-V: Show IPI stats RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo RISC-V: Use Linux logical CPU number instead of hartid RISC-V: Add logical CPU indexing for RISC-V RISC-V: Use WRITE_ONCE instead of direct access RISC-V: Use mmgrab() RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid RISC-V: Provide a cleaner raw_smp_processor_id() RISC-V: Disable preemption before enabling interrupts RISC-V: Comment on the TLB flush in smp_callin() RISC-V: Filter ISA and MMU values in cpuinfo RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} ...
2 parents 0d1e8b8 + d26c4bb commit c300af2

33 files changed

+1039
-246
lines changed

‎arch/riscv/Kconfig

Lines changed: 51 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@ config RISCV
3131
select HAVE_MEMBLOCK
3232
select HAVE_MEMBLOCK_NODE_MAP
3333
select HAVE_DMA_CONTIGUOUS
34+
select HAVE_FUTEX_CMPXCHG if FUTEX
3435
select HAVE_GENERIC_DMA_COHERENT
3536
select HAVE_PERF_EVENTS
3637
select IRQ_DOMAIN
@@ -108,10 +109,12 @@ config ARCH_RV32I
108109
select GENERIC_LIB_ASHRDI3
109110
select GENERIC_LIB_LSHRDI3
110111
select GENERIC_LIB_UCMPDI2
112+
select GENERIC_LIB_UMODDI3
111113

112114
config ARCH_RV64I
113115
bool "RV64I"
114116
select 64BIT
117+
select ARCH_SUPPORTS_INT128 if GCC_VERSION >= 50000
115118
select HAVE_FUNCTION_TRACER
116119
select HAVE_FUNCTION_GRAPH_TRACER
117120
select HAVE_FTRACE_MCOUNT_RECORD
@@ -208,14 +211,61 @@ config RISCV_BASE_PMU
208211

209212
endmenu
210213

214+
config FPU
215+
bool "FPU support"
216+
default y
217+
help
218+
Say N here if you want to disable all floating-point related procedure
219+
in the kernel.
220+
221+
If you don't know what to do here, say Y.
222+
211223
endmenu
212224

213-
menu "Kernel type"
225+
menu "Kernel features"
214226

215227
source "kernel/Kconfig.hz"
216228

217229
endmenu
218230

231+
menu "Boot options"
232+
233+
config CMDLINE_BOOL
234+
bool "Built-in kernel command line"
235+
help
236+
For most platforms, it is firmware or second stage bootloader
237+
that by default specifies the kernel command line options.
238+
However, it might be necessary or advantageous to either override
239+
the default kernel command line or add a few extra options to it.
240+
For such cases, this option allows hardcoding command line options
241+
directly into the kernel.
242+
243+
For that, choose 'Y' here and fill in the extra boot parameters
244+
in CONFIG_CMDLINE.
245+
246+
The built-in options will be concatenated to the default command
247+
line if CMDLINE_FORCE is set to 'N'. Otherwise, the default
248+
command line will be ignored and replaced by the built-in string.
249+
250+
config CMDLINE
251+
string "Built-in kernel command string"
252+
depends on CMDLINE_BOOL
253+
default ""
254+
help
255+
Supply command-line options at build time by entering them here.
256+
257+
config CMDLINE_FORCE
258+
bool "Built-in command line overrides bootloader arguments"
259+
depends on CMDLINE_BOOL
260+
help
261+
Set this option to 'Y' to have the kernel ignore the bootloader
262+
or firmware command line. Instead, the built-in command line
263+
will be used exclusively.
264+
265+
If you don't know what to do here, say N.
266+
267+
endmenu
268+
219269
menu "Bus support"
220270

221271
config PCI

‎arch/riscv/Kconfig.debug

Lines changed: 0 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1,37 +1,2 @@
1-
2-
config CMDLINE_BOOL
3-
bool "Built-in kernel command line"
4-
help
5-
For most platforms, it is firmware or second stage bootloader
6-
that by default specifies the kernel command line options.
7-
However, it might be necessary or advantageous to either override
8-
the default kernel command line or add a few extra options to it.
9-
For such cases, this option allows hardcoding command line options
10-
directly into the kernel.
11-
12-
For that, choose 'Y' here and fill in the extra boot parameters
13-
in CONFIG_CMDLINE.
14-
15-
The built-in options will be concatenated to the default command
16-
line if CMDLINE_FORCE is set to 'N'. Otherwise, the default
17-
command line will be ignored and replaced by the built-in string.
18-
19-
config CMDLINE
20-
string "Built-in kernel command string"
21-
depends on CMDLINE_BOOL
22-
default ""
23-
help
24-
Supply command-line options at build time by entering them here.
25-
26-
config CMDLINE_FORCE
27-
bool "Built-in command line overrides bootloader arguments"
28-
depends on CMDLINE_BOOL
29-
help
30-
Set this option to 'Y' to have the kernel ignore the bootloader
31-
or firmware command line. Instead, the built-in command line
32-
will be used exclusively.
33-
34-
If you don't know what to do here, say N.
35-
361
config EARLY_PRINTK
372
def_bool y

‎arch/riscv/Makefile

Lines changed: 8 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -25,33 +25,28 @@ ifeq ($(CONFIG_ARCH_RV64I),y)
2525

2626
KBUILD_CFLAGS += -mabi=lp64
2727
KBUILD_AFLAGS += -mabi=lp64
28-
29-
KBUILD_CFLAGS += $(call cc-ifversion, -ge, 0500, -DCONFIG_ARCH_SUPPORTS_INT128)
3028

31-
KBUILD_MARCH = rv64im
3229
KBUILD_LDFLAGS += -melf64lriscv
3330
else
3431
BITS := 32
3532
UTS_MACHINE := riscv32
3633

3734
KBUILD_CFLAGS += -mabi=ilp32
3835
KBUILD_AFLAGS += -mabi=ilp32
39-
KBUILD_MARCH = rv32im
4036
KBUILD_LDFLAGS += -melf32lriscv
4137
endif
4238

4339
KBUILD_CFLAGS += -Wall
4440

45-
ifeq ($(CONFIG_RISCV_ISA_A),y)
46-
KBUILD_ARCH_A = a
47-
endif
48-
ifeq ($(CONFIG_RISCV_ISA_C),y)
49-
KBUILD_ARCH_C = c
50-
endif
51-
52-
KBUILD_AFLAGS += -march=$(KBUILD_MARCH)$(KBUILD_ARCH_A)fd$(KBUILD_ARCH_C)
41+
# ISA string setting
42+
riscv-march-$(CONFIG_ARCH_RV32I) := rv32im
43+
riscv-march-$(CONFIG_ARCH_RV64I) := rv64im
44+
riscv-march-$(CONFIG_RISCV_ISA_A) := $(riscv-march-y)a
45+
riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
46+
riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
47+
KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
48+
KBUILD_AFLAGS += -march=$(riscv-march-y)
5349

54-
KBUILD_CFLAGS += -march=$(KBUILD_MARCH)$(KBUILD_ARCH_A)$(KBUILD_ARCH_C)
5550
KBUILD_CFLAGS += -mno-save-restore
5651
KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
5752

‎arch/riscv/include/asm/Kbuild

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@ generic-y += errno.h
1313
generic-y += exec.h
1414
generic-y += fb.h
1515
generic-y += fcntl.h
16-
generic-y += futex.h
1716
generic-y += hardirq.h
1817
generic-y += hash.h
1918
generic-y += hw_irq.h

‎arch/riscv/include/asm/futex.h

Lines changed: 128 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,128 @@
1+
/* SPDX-License-Identifier: GPL-2.0 */
2+
/*
3+
* Copyright (c) 2006 Ralf Baechle (ralf@linux-mips.org)
4+
* Copyright (c) 2018 Jim Wilson (jimw@sifive.com)
5+
*/
6+
7+
#ifndef _ASM_FUTEX_H
8+
#define _ASM_FUTEX_H
9+
10+
#ifndef CONFIG_RISCV_ISA_A
11+
/*
12+
* Use the generic interrupt disabling versions if the A extension
13+
* is not supported.
14+
*/
15+
#ifdef CONFIG_SMP
16+
#error "Can't support generic futex calls without A extension on SMP"
17+
#endif
18+
#include <asm-generic/futex.h>
19+
20+
#else /* CONFIG_RISCV_ISA_A */
21+
22+
#include <linux/futex.h>
23+
#include <linux/uaccess.h>
24+
#include <linux/errno.h>
25+
#include <asm/asm.h>
26+
27+
#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
28+
{ \
29+
uintptr_t tmp; \
30+
__enable_user_access(); \
31+
__asm__ __volatile__ ( \
32+
"1: " insn " \n" \
33+
"2: \n" \
34+
" .section .fixup,\"ax\" \n" \
35+
" .balign 4 \n" \
36+
"3: li %[r],%[e] \n" \
37+
" jump 2b,%[t] \n" \
38+
" .previous \n" \
39+
" .section __ex_table,\"a\" \n" \
40+
" .balign " RISCV_SZPTR " \n" \
41+
" " RISCV_PTR " 1b, 3b \n" \
42+
" .previous \n" \
43+
: [r] "+r" (ret), [ov] "=&r" (oldval), \
44+
[u] "+m" (*uaddr), [t] "=&r" (tmp) \
45+
: [op] "Jr" (oparg), [e] "i" (-EFAULT) \
46+
: "memory"); \
47+
__disable_user_access(); \
48+
}
49+
50+
static inline int
51+
arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
52+
{
53+
int oldval = 0, ret = 0;
54+
55+
pagefault_disable();
56+
57+
switch (op) {
58+
case FUTEX_OP_SET:
59+
__futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",
60+
ret, oldval, uaddr, oparg);
61+
break;
62+
case FUTEX_OP_ADD:
63+
__futex_atomic_op("amoadd.w.aqrl %[ov],%z[op],%[u]",
64+
ret, oldval, uaddr, oparg);
65+
break;
66+
case FUTEX_OP_OR:
67+
__futex_atomic_op("amoor.w.aqrl %[ov],%z[op],%[u]",
68+
ret, oldval, uaddr, oparg);
69+
break;
70+
case FUTEX_OP_ANDN:
71+
__futex_atomic_op("amoand.w.aqrl %[ov],%z[op],%[u]",
72+
ret, oldval, uaddr, ~oparg);
73+
break;
74+
case FUTEX_OP_XOR:
75+
__futex_atomic_op("amoxor.w.aqrl %[ov],%z[op],%[u]",
76+
ret, oldval, uaddr, oparg);
77+
break;
78+
default:
79+
ret = -ENOSYS;
80+
}
81+
82+
pagefault_enable();
83+
84+
if (!ret)
85+
*oval = oldval;
86+
87+
return ret;
88+
}
89+
90+
static inline int
91+
futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
92+
u32 oldval, u32 newval)
93+
{
94+
int ret = 0;
95+
u32 val;
96+
uintptr_t tmp;
97+
98+
if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
99+
return -EFAULT;
100+
101+
__enable_user_access();
102+
__asm__ __volatile__ (
103+
"1: lr.w.aqrl %[v],%[u] \n"
104+
" bne %[v],%z[ov],3f \n"
105+
"2: sc.w.aqrl %[t],%z[nv],%[u] \n"
106+
" bnez %[t],1b \n"
107+
"3: \n"
108+
" .section .fixup,\"ax\" \n"
109+
" .balign 4 \n"
110+
"4: li %[r],%[e] \n"
111+
" jump 3b,%[t] \n"
112+
" .previous \n"
113+
" .section __ex_table,\"a\" \n"
114+
" .balign " RISCV_SZPTR " \n"
115+
" " RISCV_PTR " 1b, 4b \n"
116+
" " RISCV_PTR " 2b, 4b \n"
117+
" .previous \n"
118+
: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
119+
: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
120+
: "memory");
121+
__disable_user_access();
122+
123+
*uval = val;
124+
return ret;
125+
}
126+
127+
#endif /* CONFIG_RISCV_ISA_A */
128+
#endif /* _ASM_FUTEX_H */

‎arch/riscv/include/asm/processor.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ static inline void wait_for_interrupt(void)
8888
}
8989

9090
struct device_node;
91-
extern int riscv_of_processor_hart(struct device_node *node);
91+
int riscv_of_processor_hartid(struct device_node *node);
9292

9393
extern void riscv_fill_hwcap(void);
9494

‎arch/riscv/include/asm/smp.h

Lines changed: 36 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -14,16 +14,24 @@
1414
#ifndef _ASM_RISCV_SMP_H
1515
#define _ASM_RISCV_SMP_H
1616

17-
/* This both needs asm-offsets.h and is used when generating it. */
18-
#ifndef GENERATING_ASM_OFFSETS
19-
#include <asm/asm-offsets.h>
20-
#endif
21-
2217
#include <linux/cpumask.h>
2318
#include <linux/irqreturn.h>
19+
#include <linux/thread_info.h>
20+
21+
#define INVALID_HARTID ULONG_MAX
22+
/*
23+
* Mapping between linux logical cpu index and hartid.
24+
*/
25+
extern unsigned long __cpuid_to_hartid_map[NR_CPUS];
26+
#define cpuid_to_hartid_map(cpu) __cpuid_to_hartid_map[cpu]
27+
28+
struct seq_file;
2429

2530
#ifdef CONFIG_SMP
2631

32+
/* print IPI stats */
33+
void show_ipi_stats(struct seq_file *p, int prec);
34+
2735
/* SMP initialization hook for setup_arch */
2836
void __init setup_smp(void);
2937

@@ -33,14 +41,31 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
3341
/* Hook for the generic smp_call_function_single() routine. */
3442
void arch_send_call_function_single_ipi(int cpu);
3543

44+
int riscv_hartid_to_cpuid(int hartid);
45+
void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out);
46+
3647
/*
37-
* This is particularly ugly: it appears we can't actually get the definition
38-
* of task_struct here, but we need access to the CPU this task is running on.
39-
* Instead of using C we're using asm-offsets.h to get the current processor
40-
* ID.
48+
* Obtains the hart ID of the currently executing task. This relies on
49+
* THREAD_INFO_IN_TASK, but we define that unconditionally.
4150
*/
42-
#define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
51+
#define raw_smp_processor_id() (current_thread_info()->cpu)
4352

44-
#endif /* CONFIG_SMP */
53+
#else
54+
55+
static inline void show_ipi_stats(struct seq_file *p, int prec)
56+
{
57+
}
4558

59+
static inline int riscv_hartid_to_cpuid(int hartid)
60+
{
61+
return 0;
62+
}
63+
64+
static inline void riscv_cpuid_to_hartid_mask(const struct cpumask *in,
65+
struct cpumask *out)
66+
{
67+
cpumask_set_cpu(cpuid_to_hartid_map(0), out);
68+
}
69+
70+
#endif /* CONFIG_SMP */
4671
#endif /* _ASM_RISCV_SMP_H */

0 commit comments

Comments
 (0)