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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner: "Another set of x86 related updates: - Fix the long broken x32 version of the IPC user space headers which was noticed by Arnd Bergman in course of his ongoing y2038 work. GLIBC seems to have non broken private copies of these headers so this went unnoticed. - Two microcode fixlets which address some more fallout from the recent modifications in that area: - Unconditionally save the microcode patch, which was only saved when CPU_HOTPLUG was enabled causing failures in the late loading mechanism - Make the later loader synchronization finally work under all circumstances. It was exiting early and causing timeout failures due to a missing synchronization point. - Do not use mwait_play_dead() on AMD systems to prevent excessive power consumption as the CPU cannot go into deep power states from there. - Address an annoying sparse warning due to lost type qualifiers of the vmemmap and vmalloc base address constants. - Prevent reserving crash kernel region on Xen PV as this leads to the wrong perception that crash kernels actually work there which is not the case. Xen PV has its own crash mechanism handled by the hypervisor. - Add missing TLB cpuid values to the table to make the printout on certain machines correct. - Enumerate the new CLDEMOTE instruction - Fix an incorrect SPDX identifier - Remove stale macros" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/ipc: Fix x32 version of shmid64_ds and msqid64_ds x86/setup: Do not reserve a crash kernel region if booted on Xen PV x86/cpu/intel: Add missing TLB cpuid values x86/smpboot: Don't use mwait_play_dead() on AMD systems x86/mm: Make vmemmap and vmalloc base address constants unsigned long x86/vector: Remove the unused macro FPU_IRQ x86/vector: Remove the macro VECTOR_OFFSET_START x86/cpufeatures: Enumerate cldemote instruction x86/microcode: Do not exit early from __reload_late() x86/microcode/intel: Save microcode patch unconditionally x86/jailhouse: Fix incorrect SPDX identifier
2 parents 65f4d6d + 1a512c0 commit c61a56a

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-19
lines changed

12 files changed

+93
-19
lines changed

‎arch/x86/include/asm/cpufeatures.h

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Original file line numberDiff line numberDiff line change
@@ -320,6 +320,7 @@
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#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */
321321
#define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */
322322
#define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */
323+
#define X86_FEATURE_CLDEMOTE (16*32+25) /* CLDEMOTE instruction */
323324

324325
/* AMD-defined CPU features, CPUID level 0x80000007 (EBX), word 17 */
325326
#define X86_FEATURE_OVERFLOW_RECOV (17*32+ 0) /* MCA overflow recovery support */

‎arch/x86/include/asm/irq_vectors.h

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@@ -34,11 +34,6 @@
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* (0x80 is the syscall vector, 0x30-0x3f are for ISA)
3535
*/
3636
#define FIRST_EXTERNAL_VECTOR 0x20
37-
/*
38-
* We start allocating at 0x21 to spread out vectors evenly between
39-
* priority levels. (0x80 is the syscall vector)
40-
*/
41-
#define VECTOR_OFFSET_START 1
4237

4338
/*
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* Reserve the lowest usable vector (and hence lowest priority) 0x20 for
@@ -119,8 +114,6 @@
119114
#define FIRST_SYSTEM_VECTOR NR_VECTORS
120115
#endif
121116

122-
#define FPU_IRQ 13
123-
124117
/*
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* Size the maximum number of interrupts.
126119
*

‎arch/x86/include/asm/jailhouse_para.h

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@@ -1,4 +1,4 @@
1-
/* SPDX-License-Identifier: GPL2.0 */
1+
/* SPDX-License-Identifier: GPL-2.0 */
22

33
/*
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* Jailhouse paravirt detection

‎arch/x86/include/asm/pgtable_64_types.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -105,14 +105,14 @@ extern unsigned int ptrs_per_p4d;
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#define LDT_PGD_ENTRY (pgtable_l5_enabled ? LDT_PGD_ENTRY_L5 : LDT_PGD_ENTRY_L4)
106106
#define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT)
107107

108-
#define __VMALLOC_BASE_L4 0xffffc90000000000
109-
#define __VMALLOC_BASE_L5 0xffa0000000000000
108+
#define __VMALLOC_BASE_L4 0xffffc90000000000UL
109+
#define __VMALLOC_BASE_L5 0xffa0000000000000UL
110110

111111
#define VMALLOC_SIZE_TB_L4 32UL
112112
#define VMALLOC_SIZE_TB_L5 12800UL
113113

114-
#define __VMEMMAP_BASE_L4 0xffffea0000000000
115-
#define __VMEMMAP_BASE_L5 0xffd4000000000000
114+
#define __VMEMMAP_BASE_L4 0xffffea0000000000UL
115+
#define __VMEMMAP_BASE_L5 0xffd4000000000000UL
116116

117117
#ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
118118
# define VMALLOC_START vmalloc_base

‎arch/x86/include/uapi/asm/msgbuf.h

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Original file line numberDiff line numberDiff line change
@@ -1 +1,32 @@
1+
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2+
#ifndef __ASM_X64_MSGBUF_H
3+
#define __ASM_X64_MSGBUF_H
4+
5+
#if !defined(__x86_64__) || !defined(__ILP32__)
16
#include <asm-generic/msgbuf.h>
7+
#else
8+
/*
9+
* The msqid64_ds structure for x86 architecture with x32 ABI.
10+
*
11+
* On x86-32 and x86-64 we can just use the generic definition, but
12+
* x32 uses the same binary layout as x86_64, which is differnet
13+
* from other 32-bit architectures.
14+
*/
15+
16+
struct msqid64_ds {
17+
struct ipc64_perm msg_perm;
18+
__kernel_time_t msg_stime; /* last msgsnd time */
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__kernel_time_t msg_rtime; /* last msgrcv time */
20+
__kernel_time_t msg_ctime; /* last change time */
21+
__kernel_ulong_t msg_cbytes; /* current number of bytes on queue */
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__kernel_ulong_t msg_qnum; /* number of messages in queue */
23+
__kernel_ulong_t msg_qbytes; /* max number of bytes on queue */
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__kernel_pid_t msg_lspid; /* pid of last msgsnd */
25+
__kernel_pid_t msg_lrpid; /* last receive pid */
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__kernel_ulong_t __unused4;
27+
__kernel_ulong_t __unused5;
28+
};
29+
30+
#endif
31+
32+
#endif /* __ASM_GENERIC_MSGBUF_H */

‎arch/x86/include/uapi/asm/shmbuf.h

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@@ -1 +1,43 @@
1+
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2+
#ifndef __ASM_X86_SHMBUF_H
3+
#define __ASM_X86_SHMBUF_H
4+
5+
#if !defined(__x86_64__) || !defined(__ILP32__)
16
#include <asm-generic/shmbuf.h>
7+
#else
8+
/*
9+
* The shmid64_ds structure for x86 architecture with x32 ABI.
10+
*
11+
* On x86-32 and x86-64 we can just use the generic definition, but
12+
* x32 uses the same binary layout as x86_64, which is differnet
13+
* from other 32-bit architectures.
14+
*/
15+
16+
struct shmid64_ds {
17+
struct ipc64_perm shm_perm; /* operation perms */
18+
size_t shm_segsz; /* size of segment (bytes) */
19+
__kernel_time_t shm_atime; /* last attach time */
20+
__kernel_time_t shm_dtime; /* last detach time */
21+
__kernel_time_t shm_ctime; /* last change time */
22+
__kernel_pid_t shm_cpid; /* pid of creator */
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__kernel_pid_t shm_lpid; /* pid of last operator */
24+
__kernel_ulong_t shm_nattch; /* no. of current attaches */
25+
__kernel_ulong_t __unused4;
26+
__kernel_ulong_t __unused5;
27+
};
28+
29+
struct shminfo64 {
30+
__kernel_ulong_t shmmax;
31+
__kernel_ulong_t shmmin;
32+
__kernel_ulong_t shmmni;
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__kernel_ulong_t shmseg;
34+
__kernel_ulong_t shmall;
35+
__kernel_ulong_t __unused1;
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__kernel_ulong_t __unused2;
37+
__kernel_ulong_t __unused3;
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__kernel_ulong_t __unused4;
39+
};
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#endif
42+
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#endif /* __ASM_X86_SHMBUF_H */

‎arch/x86/kernel/cpu/intel.c

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@@ -835,6 +835,9 @@ static const struct _tlb_table intel_tlb_table[] = {
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{ 0x5d, TLB_DATA_4K_4M, 256, " TLB_DATA 4 KByte and 4 MByte pages" },
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{ 0x61, TLB_INST_4K, 48, " TLB_INST 4 KByte pages, full associative" },
837837
{ 0x63, TLB_DATA_1G, 4, " TLB_DATA 1 GByte pages, 4-way set associative" },
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{ 0x6b, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 8-way associative" },
839+
{ 0x6c, TLB_DATA_2M_4M, 128, " TLB_DATA 2 MByte or 4 MByte pages, 8-way associative" },
840+
{ 0x6d, TLB_DATA_1G, 16, " TLB_DATA 1 GByte pages, fully associative" },
838841
{ 0x76, TLB_INST_2M_4M, 8, " TLB_INST 2-MByte or 4-MByte pages, fully associative" },
839842
{ 0xb0, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 4-way set associative" },
840843
{ 0xb1, TLB_INST_2M_4M, 4, " TLB_INST 2M pages, 4-way, 8 entries or 4M pages, 4-way entries" },

‎arch/x86/kernel/cpu/microcode/core.c

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Original file line numberDiff line numberDiff line change
@@ -564,14 +564,12 @@ static int __reload_late(void *info)
564564
apply_microcode_local(&err);
565565
spin_unlock(&update_lock);
566566

567+
/* siblings return UCODE_OK because their engine got updated already */
567568
if (err > UCODE_NFOUND) {
568569
pr_warn("Error reloading microcode on CPU %d\n", cpu);
569-
return -1;
570-
/* siblings return UCODE_OK because their engine got updated already */
570+
ret = -1;
571571
} else if (err == UCODE_UPDATED || err == UCODE_OK) {
572572
ret = 1;
573-
} else {
574-
return ret;
575573
}
576574

577575
/*

‎arch/x86/kernel/cpu/microcode/intel.c

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@@ -485,7 +485,6 @@ static void show_saved_mc(void)
485485
*/
486486
static void save_mc_for_early(u8 *mc, unsigned int size)
487487
{
488-
#ifdef CONFIG_HOTPLUG_CPU
489488
/* Synchronization during CPU hotplug. */
490489
static DEFINE_MUTEX(x86_cpu_microcode_mutex);
491490

@@ -495,7 +494,6 @@ static void save_mc_for_early(u8 *mc, unsigned int size)
495494
show_saved_mc();
496495

497496
mutex_unlock(&x86_cpu_microcode_mutex);
498-
#endif
499497
}
500498

501499
static bool load_builtin_intel_microcode(struct cpio_data *cp)

‎arch/x86/kernel/jailhouse.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// SPDX-License-Identifier: GPL2.0
1+
// SPDX-License-Identifier: GPL-2.0
22
/*
33
* Jailhouse paravirt_ops implementation
44
*

‎arch/x86/kernel/setup.c

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Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@
5050
#include <linux/init_ohci1394_dma.h>
5151
#include <linux/kvm_para.h>
5252
#include <linux/dma-contiguous.h>
53+
#include <xen/xen.h>
5354

5455
#include <linux/errno.h>
5556
#include <linux/kernel.h>
@@ -534,6 +535,11 @@ static void __init reserve_crashkernel(void)
534535
high = true;
535536
}
536537

538+
if (xen_pv_domain()) {
539+
pr_info("Ignoring crashkernel for a Xen PV domain\n");
540+
return;
541+
}
542+
537543
/* 0 means: find the address automatically */
538544
if (crash_base <= 0) {
539545
/*

‎arch/x86/kernel/smpboot.c

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@@ -1571,6 +1571,8 @@ static inline void mwait_play_dead(void)
15711571
void *mwait_ptr;
15721572
int i;
15731573

1574+
if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
1575+
return;
15741576
if (!this_cpu_has(X86_FEATURE_MWAIT))
15751577
return;
15761578
if (!this_cpu_has(X86_FEATURE_CLFLUSH))

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