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Merge branch '2016-02-26-st-drm-next' of http://git.linaro.org/people/benjamin.gaignard/kernel into drm-next
Here are sti patches for drm-next. It brings: - The support of the atomic_check for the planes and minor fixes for planes - The support of the vendor specific infoframe for HDMI and the support of 2 HDMI properties related to the connector - The support of the DVO solving panel detection issue and timing issue. - The support of debugfs for connectors, encoders, crtcs and planes. * '2016-02-26-st-drm-next' of http://git.linaro.org/people/benjamin.gaignard/kernel: (36 commits) drm/sti: use u32 to store DMA addresses drm: sti: remove sti_gem_prime_export hack drm/sti: add debugfs fps_show/fps_get mechanism for planes drm/sti: add debugfs entries for TVOUT encoders drm/sti: add debugfs entries for MIXER crtc drm/sti: add debugfs entries for VID plane drm/sti: add debugfs entries for HQVDP plane drm/sti: add debugfs entries for GDP planes drm/sti: add debugfs entries for CURSOR plane drm/sti: add debugfs entries for HDA connector drm/sti: add debugfs entries for DVO connector drm/sti: add debugfs entries for HDMI connector drm/sti: add hdmi_mode property for HDMI connector drm/sti: add colorspace property to the HDMI connector drm/sti: add HDMI vendor specific infoframe drm/sti: reset infoframe transmission when HDMI is stopped drm/sti: HDMI infoframe transmission mode not take into account drm/sti: reset HD DACS when HDA connector is created drm/sti: fix dvo data_enable signal drm/sti: adjust delay for DVO ...
2 parents 9f443bf + 52807ae commit cf48106

20 files changed

+2399
-416
lines changed

‎drivers/gpu/drm/sti/sti_awg_utils.c

Lines changed: 44 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
#include "sti_awg_utils.h"
88

99
#define AWG_OPCODE_OFFSET 10
10+
#define AWG_MAX_ARG 0x3ff
1011

1112
enum opcode {
1213
SET,
@@ -34,6 +35,8 @@ static int awg_generate_instr(enum opcode opcode,
3435
/* skip, repeat and replay arg should not exceed 1023.
3536
* If user wants to exceed this value, the instruction should be
3637
* duplicate and arg should be adjust for each duplicated instruction.
38+
*
39+
* mux_sel is used in case of SAV/EAV synchronization.
3740
*/
3841

3942
while (arg_tmp > 0) {
@@ -65,7 +68,7 @@ static int awg_generate_instr(enum opcode opcode,
6568

6669
mux = 0;
6770
data_enable = 0;
68-
arg &= (0x3ff);
71+
arg &= AWG_MAX_ARG;
6972
break;
7073
case REPEAT:
7174
case REPLAY:
@@ -76,13 +79,13 @@ static int awg_generate_instr(enum opcode opcode,
7679

7780
mux = 0;
7881
data_enable = 0;
79-
arg &= (0x3ff);
82+
arg &= AWG_MAX_ARG;
8083
break;
8184
case JUMP:
8285
mux = 0;
8386
data_enable = 0;
8487
arg |= 0x40; /* for jump instruction 7th bit is 1 */
85-
arg &= 0x3ff;
88+
arg &= AWG_MAX_ARG;
8689
break;
8790
case STOP:
8891
arg = 0;
@@ -110,68 +113,75 @@ static int awg_generate_instr(enum opcode opcode,
110113
return 0;
111114
}
112115

113-
int sti_awg_generate_code_data_enable_mode(
116+
static int awg_generate_line_signal(
114117
struct awg_code_generation_params *fwparams,
115118
struct awg_timing *timing)
116119
{
117120
long int val;
118-
long int data_en;
119121
int ret = 0;
120122

121-
if (timing->trailing_lines > 0) {
122-
/* skip trailing lines */
123-
val = timing->blanking_level;
124-
data_en = 0;
125-
ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
126-
127-
val = timing->trailing_lines - 1;
128-
data_en = 0;
129-
ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
130-
}
131-
132123
if (timing->trailing_pixels > 0) {
133124
/* skip trailing pixel */
134125
val = timing->blanking_level;
135-
data_en = 0;
136-
ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
126+
ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
137127

138128
val = timing->trailing_pixels - 1;
139-
data_en = 0;
140-
ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams);
129+
ret |= awg_generate_instr(SKIP, val, 0, 0, fwparams);
141130
}
142131

143132
/* set DE signal high */
144133
val = timing->blanking_level;
145-
data_en = 1;
146134
ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET,
147-
val, 0, data_en, fwparams);
135+
val, 0, 1, fwparams);
148136

149137
if (timing->blanking_pixels > 0) {
150138
/* skip the number of active pixel */
151139
val = timing->active_pixels - 1;
152-
data_en = 1;
153-
ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams);
140+
ret |= awg_generate_instr(SKIP, val, 0, 1, fwparams);
154141

155142
/* set DE signal low */
156143
val = timing->blanking_level;
157-
data_en = 0;
158-
ret |= awg_generate_instr(SET, val, 0, data_en, fwparams);
144+
ret |= awg_generate_instr(SET, val, 0, 0, fwparams);
145+
}
146+
147+
return ret;
148+
}
149+
150+
int sti_awg_generate_code_data_enable_mode(
151+
struct awg_code_generation_params *fwparams,
152+
struct awg_timing *timing)
153+
{
154+
long int val, tmp_val;
155+
int ret = 0;
156+
157+
if (timing->trailing_lines > 0) {
158+
/* skip trailing lines */
159+
val = timing->blanking_level;
160+
ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
161+
162+
val = timing->trailing_lines - 1;
163+
ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams);
159164
}
160165

161-
/* replay the sequence as many active lines defined */
162-
val = timing->active_lines - 1;
163-
data_en = 0;
164-
ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
166+
tmp_val = timing->active_lines - 1;
167+
168+
while (tmp_val > 0) {
169+
/* generate DE signal for each line */
170+
ret |= awg_generate_line_signal(fwparams, timing);
171+
/* replay the sequence as many active lines defined */
172+
ret |= awg_generate_instr(REPLAY,
173+
min_t(int, AWG_MAX_ARG, tmp_val),
174+
0, 0, fwparams);
175+
tmp_val -= AWG_MAX_ARG;
176+
}
165177

166178
if (timing->blanking_lines > 0) {
167179
/* skip blanking lines */
168180
val = timing->blanking_level;
169-
data_en = 0;
170-
ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
181+
ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
171182

172183
val = timing->blanking_lines - 1;
173-
data_en = 0;
174-
ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
184+
ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams);
175185
}
176186

177187
return ret;

‎drivers/gpu/drm/sti/sti_compositor.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,13 +75,13 @@ static int sti_compositor_bind(struct device *dev,
7575
switch (desc[i].type) {
7676
case STI_VID_SUBDEV:
7777
compo->vid[vid_id++] =
78-
sti_vid_create(compo->dev, desc[i].id,
78+
sti_vid_create(compo->dev, drm_dev, desc[i].id,
7979
compo->regs + desc[i].offset);
8080
break;
8181
case STI_MIXER_MAIN_SUBDEV:
8282
case STI_MIXER_AUX_SUBDEV:
8383
compo->mixer[mixer_id++] =
84-
sti_mixer_create(compo->dev, desc[i].id,
84+
sti_mixer_create(compo->dev, drm_dev, desc[i].id,
8585
compo->regs + desc[i].offset);
8686
break;
8787
case STI_GPD_SUBDEV:

‎drivers/gpu/drm/sti/sti_crtc.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,15 @@ static void sti_crtc_disabling(struct drm_crtc *crtc)
5151
mixer->status = STI_MIXER_DISABLING;
5252
}
5353

54+
static bool sti_crtc_mode_fixup(struct drm_crtc *crtc,
55+
const struct drm_display_mode *mode,
56+
struct drm_display_mode *adjusted_mode)
57+
{
58+
/* accept the provided drm_display_mode, do not fix it up */
59+
drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
60+
return true;
61+
}
62+
5463
static int
5564
sti_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode)
5665
{

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