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568 | 568 | <&cpg CPG_CORE R8A7796_CLK_S3D1>,
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569 | 569 | <&scif_clk>;
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570 | 570 | clock-names = "fck", "brg_int", "scif_clk";
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| 571 | + dmas = <&dmac1 0x51>, <&dmac1 0x50>, |
| 572 | + <&dmac2 0x51>, <&dmac2 0x50>; |
| 573 | + dma-names = "tx", "rx", "tx", "rx"; |
571 | 574 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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572 | 575 | status = "disabled";
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573 | 576 | };
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581 | 584 | <&cpg CPG_CORE R8A7796_CLK_S3D1>,
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582 | 585 | <&scif_clk>;
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583 | 586 | clock-names = "fck", "brg_int", "scif_clk";
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| 587 | + dmas = <&dmac1 0x53>, <&dmac1 0x52>, |
| 588 | + <&dmac2 0x53>, <&dmac2 0x52>; |
| 589 | + dma-names = "tx", "rx", "tx", "rx"; |
584 | 590 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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585 | 591 | status = "disabled";
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586 | 592 | };
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607 | 613 | <&cpg CPG_CORE R8A7796_CLK_S3D1>,
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608 | 614 | <&scif_clk>;
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609 | 615 | clock-names = "fck", "brg_int", "scif_clk";
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| 616 | + dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
| 617 | + dma-names = "tx", "rx"; |
610 | 618 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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611 | 619 | status = "disabled";
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612 | 620 | };
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620 | 628 | <&cpg CPG_CORE R8A7796_CLK_S3D1>,
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621 | 629 | <&scif_clk>;
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622 | 630 | clock-names = "fck", "brg_int", "scif_clk";
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| 631 | + dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
| 632 | + dma-names = "tx", "rx"; |
623 | 633 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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624 | 634 | status = "disabled";
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625 | 635 | };
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633 | 643 | <&cpg CPG_CORE R8A7796_CLK_S3D1>,
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634 | 644 | <&scif_clk>;
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635 | 645 | clock-names = "fck", "brg_int", "scif_clk";
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| 646 | + dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, |
| 647 | + <&dmac2 0x5b>, <&dmac2 0x5a>; |
| 648 | + dma-names = "tx", "rx", "tx", "rx"; |
636 | 649 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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637 | 650 | status = "disabled";
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638 | 651 | };
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