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Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "The irq department delivers: - new core infrastructure to allow better management of multi-queue devices (interrupt spreading, node aware descriptor allocation ...) - a new interrupt flow handler to support the new fangled Intel VMD devices. - yet another new interrupt controller driver. - a series of fixes which addresses sparse warnings, missing includes, missing static declarations etc from Ben Dooks. - a fix for the error handling in the hierarchical domain allocation code. - the usual pile of small updates to core and driver code" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (46 commits) genirq: Fix missing irq allocation affinity hint irqdomain: Fix irq_domain_alloc_irqs_recursive() error handling irq/Documentation: Correct result of echnoing 5 to smp_affinity MAINTAINERS: Remove Jiang Liu from irq domains genirq/msi: Fix broken debug output genirq: Add a helper to spread an affinity mask for MSI/MSI-X vectors genirq/msi: Make use of affinity aware allocations genirq: Use affinity hint in irqdesc allocation genirq: Add affinity hint to irq allocation genirq: Introduce IRQD_AFFINITY_MANAGED flag genirq/msi: Remove unused MSI_FLAG_IDENTITY_MAP irqchip/s3c24xx: Fixup IO accessors for big endian irqchip/exynos-combiner: Fix usage of __raw IO irqdomain: Fix disposal of mappings for interrupt hierarchies irqchip/aspeed-vic: Add irq controller for Aspeed doc/devicetree: Add Aspeed VIC bindings x86/PCI/VMD: Use untracked irq handler genirq: Add untracked irq handler irqchip/mips-gic: Populate irq_domain names irqchip/gicv3-its: Implement two-level(indirect) device table support ...
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‎Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ Main node required properties:
2121
"arm,pl390"
2222
"arm,tc11mp-gic"
2323
"brcm,brahma-b15-gic"
24+
"nvidia,tegra210-agic"
2425
"qcom,msm-8660-qgic"
2526
"qcom,msm-qgic2"
2627
- interrupt-controller : Identifies the node as an interrupt controller
@@ -68,7 +69,7 @@ Optional
6869
"ic_clk" (for "arm,arm11mp-gic")
6970
"PERIPHCLKEN" (for "arm,cortex-a15-gic")
7071
"PERIPHCLK", "PERIPHCLKEN" (for "arm,cortex-a9-gic")
71-
"clk" (for "arm,gic-400")
72+
"clk" (for "arm,gic-400" and "nvidia,tegra210")
7273
"gclk" (for "arm,pl390")
7374

7475
- power-domains : A phandle and PM domain specifier as defined by bindings of

‎Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
Aspeed Vectored Interrupt Controller
2+
3+
These bindings are for the Aspeed AST2400 interrupt controller register layout.
4+
The SoC has an legacy register layout, but this driver does not support that
5+
mode of operation.
6+
7+
Required properties:
8+
9+
- compatible : should be "aspeed,ast2400-vic".
10+
11+
- interrupt-controller : Identifies the node as an interrupt controller
12+
- #interrupt-cells : Specifies the number of cells needed to encode an
13+
interrupt source. The value shall be 1.
14+
15+
Example:
16+
17+
vic: interrupt-controller@1e6c0080 {
18+
compatible = "aspeed,ast2400-vic";
19+
interrupt-controller;
20+
#interrupt-cells = <1>;
21+
reg = <0x1e6c0080 0x80>;
22+
};

‎Documentation/filesystems/proc.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -725,7 +725,7 @@ IRQ, you can set it by doing:
725725
> echo 1 > /proc/irq/10/smp_affinity
726726

727727
This means that only the first CPU will handle the IRQ, but you can also echo
728-
5 which means that only the first and fourth CPU can handle the IRQ.
728+
5 which means that only the first and third CPU can handle the IRQ.
729729

730730
The contents of each smp_affinity file is the same by default:
731731

‎MAINTAINERS

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6235,7 +6235,6 @@ F: Documentation/devicetree/bindings/interrupt-controller/
62356235
F: drivers/irqchip/
62366236

62376237
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
6238-
M: Jiang Liu <jiang.liu@linux.intel.com>
62396238
M: Marc Zyngier <marc.zyngier@arm.com>
62406239
S: Maintained
62416240
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core

‎arch/sparc/kernel/irq_64.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -242,7 +242,7 @@ unsigned int irq_alloc(unsigned int dev_handle, unsigned int dev_ino)
242242
{
243243
int irq;
244244

245-
irq = __irq_alloc_descs(-1, 1, 1, numa_node_id(), NULL);
245+
irq = __irq_alloc_descs(-1, 1, 1, numa_node_id(), NULL, NULL);
246246
if (irq <= 0)
247247
goto out;
248248

‎arch/x86/kernel/apic/io_apic.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -981,7 +981,7 @@ static int alloc_irq_from_domain(struct irq_domain *domain, int ioapic, u32 gsi,
981981

982982
return __irq_domain_alloc_irqs(domain, irq, 1,
983983
ioapic_alloc_attr_node(info),
984-
info, legacy);
984+
info, legacy, NULL);
985985
}
986986

987987
/*
@@ -1014,7 +1014,8 @@ static int alloc_isa_irq_from_domain(struct irq_domain *domain,
10141014
info->ioapic_pin))
10151015
return -ENOMEM;
10161016
} else {
1017-
irq = __irq_domain_alloc_irqs(domain, irq, 1, node, info, true);
1017+
irq = __irq_domain_alloc_irqs(domain, irq, 1, node, info, true,
1018+
NULL);
10181019
if (irq >= 0) {
10191020
irq_data = irq_domain_get_irq_data(domain, irq);
10201021
data = irq_data->chip_data;

‎arch/x86/pci/vmd.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -195,7 +195,7 @@ static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
195195
vmdirq->virq = virq;
196196

197197
irq_domain_set_info(domain, virq, vmdirq->irq->vmd_vector, info->chip,
198-
vmdirq, handle_simple_irq, vmd, NULL);
198+
vmdirq, handle_untracked_irq, vmd, NULL);
199199
return 0;
200200
}
201201

‎drivers/irqchip/Kconfig

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,12 @@ config ARM_GIC
88
select IRQ_DOMAIN_HIERARCHY
99
select MULTI_IRQ_HANDLER
1010

11+
config ARM_GIC_PM
12+
bool
13+
depends on PM
14+
select ARM_GIC
15+
select PM_CLK
16+
1117
config ARM_GIC_MAX_NR
1218
int
1319
default 2 if ARCH_REALVIEW

‎drivers/irqchip/Makefile

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o
2424
obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi-nmi.o
2525
obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o
2626
obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o
27+
obj-$(CONFIG_ARM_GIC_PM) += irq-gic-pm.o
2728
obj-$(CONFIG_REALVIEW_DT) += irq-gic-realview.o
2829
obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
2930
obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
@@ -69,3 +70,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
6970
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
7071
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
7172
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
73+
obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o

‎drivers/irqchip/exynos-combiner.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -55,14 +55,14 @@ static void combiner_mask_irq(struct irq_data *data)
5555
{
5656
u32 mask = 1 << (data->hwirq % 32);
5757

58-
__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
58+
writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
5959
}
6060

6161
static void combiner_unmask_irq(struct irq_data *data)
6262
{
6363
u32 mask = 1 << (data->hwirq % 32);
6464

65-
__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
65+
writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_SET);
6666
}
6767

6868
static void combiner_handle_cascade_irq(struct irq_desc *desc)
@@ -75,7 +75,7 @@ static void combiner_handle_cascade_irq(struct irq_desc *desc)
7575
chained_irq_enter(chip, desc);
7676

7777
spin_lock(&irq_controller_lock);
78-
status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
78+
status = readl_relaxed(chip_data->base + COMBINER_INT_STATUS);
7979
spin_unlock(&irq_controller_lock);
8080
status &= chip_data->irq_mask;
8181

@@ -135,7 +135,7 @@ static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
135135
combiner_data->parent_irq = irq;
136136

137137
/* Disable all interrupts */
138-
__raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
138+
writel_relaxed(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
139139
}
140140

141141
static int combiner_irq_domain_xlate(struct irq_domain *d,
@@ -218,7 +218,7 @@ static int combiner_suspend(void)
218218

219219
for (i = 0; i < max_nr; i++)
220220
combiner_data[i].pm_save =
221-
__raw_readl(combiner_data[i].base + COMBINER_ENABLE_SET);
221+
readl_relaxed(combiner_data[i].base + COMBINER_ENABLE_SET);
222222

223223
return 0;
224224
}
@@ -235,9 +235,9 @@ static void combiner_resume(void)
235235
int i;
236236

237237
for (i = 0; i < max_nr; i++) {
238-
__raw_writel(combiner_data[i].irq_mask,
238+
writel_relaxed(combiner_data[i].irq_mask,
239239
combiner_data[i].base + COMBINER_ENABLE_CLEAR);
240-
__raw_writel(combiner_data[i].pm_save,
240+
writel_relaxed(combiner_data[i].pm_save,
241241
combiner_data[i].base + COMBINER_ENABLE_SET);
242242
}
243243
}

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