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Merge tag 'please-pull-paravirt' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
Pull ia64 paravirt removal from Tony Luck: "Nobody cares about paravirtualization on ia64 anymore" * tag 'please-pull-paravirt' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux: ia64: remove paravirt code
2 parents df68770 + e55645e commit efdfce2

33 files changed

+68
-3317
lines changed

arch/ia64/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -137,29 +137,6 @@ config AUDIT_ARCH
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bool
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default y
139139

140-
menuconfig PARAVIRT_GUEST
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bool "Paravirtualized guest support"
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depends on BROKEN
143-
help
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Say Y here to get to see options related to running Linux under
145-
various hypervisors. This option alone does not add any kernel code.
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If you say N, all options in this submenu will be skipped and disabled.
148-
149-
if PARAVIRT_GUEST
150-
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config PARAVIRT
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bool "Enable paravirtualization code"
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depends on PARAVIRT_GUEST
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default y
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help
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This changes the kernel so it can modify itself when it is run
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under a hypervisor, potentially improving performance significantly
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over full virtualization. However, when run without a hypervisor
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the kernel is theoretically slower and slightly larger.
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161-
endif
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163140
choice
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prompt "System type"
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default IA64_GENERIC

arch/ia64/include/asm/hw_irq.h

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@@ -15,11 +15,7 @@
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#include <asm/ptrace.h>
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#include <asm/smp.h>
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18-
#ifndef CONFIG_PARAVIRT
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typedef u8 ia64_vector;
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#else
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typedef u16 ia64_vector;
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#endif
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/*
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* 0 special
@@ -114,15 +110,11 @@ DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);
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extern struct irq_chip irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
116112

117-
#ifdef CONFIG_PARAVIRT_GUEST
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#include <asm/paravirt.h>
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#else
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#define ia64_register_ipi ia64_native_register_ipi
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#define assign_irq_vector ia64_native_assign_irq_vector
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#define free_irq_vector ia64_native_free_irq_vector
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#define register_percpu_irq ia64_native_register_percpu_irq
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#define ia64_resend_irq ia64_native_resend_irq
125-
#endif
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127119
extern void ia64_native_register_ipi(void);
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extern int bind_irq_vector(int irq, int vector, cpumask_t domain);

arch/ia64/include/asm/intrinsics.h

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Original file line numberDiff line numberDiff line change
@@ -7,19 +7,6 @@
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#ifndef _ASM_IA64_INTRINSICS_H
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#define _ASM_IA64_INTRINSICS_H
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10-
#include <asm/paravirt_privop.h>
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#include <uapi/asm/intrinsics.h>
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13-
#ifndef __ASSEMBLY__
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#if defined(CONFIG_PARAVIRT)
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# undef IA64_INTRINSIC_API
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# undef IA64_INTRINSIC_MACRO
17-
# ifdef ASM_SUPPORTED
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# define IA64_INTRINSIC_API(name) paravirt_ ## name
19-
# else
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# define IA64_INTRINSIC_API(name) pv_cpu_ops.name
21-
# endif
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#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
23-
#endif
24-
#endif /* !__ASSEMBLY__ */
2512
#endif /* _ASM_IA64_INTRINSICS_H */

arch/ia64/include/asm/iosapic.h

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Original file line numberDiff line numberDiff line change
@@ -55,14 +55,10 @@
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5656
#define NR_IOSAPICS 256
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58-
#ifdef CONFIG_PARAVIRT_GUEST
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#include <asm/paravirt.h>
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#else
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#define iosapic_pcat_compat_init ia64_native_iosapic_pcat_compat_init
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#define __iosapic_read __ia64_native_iosapic_read
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#define __iosapic_write __ia64_native_iosapic_write
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#define iosapic_get_irq_chip ia64_native_iosapic_get_irq_chip
65-
#endif
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extern void __init ia64_native_iosapic_pcat_compat_init(void);
6864
extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);

arch/ia64/include/asm/module.h

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Original file line numberDiff line numberDiff line change
@@ -18,12 +18,6 @@ struct mod_arch_specific {
1818
struct elf64_shdr *got; /* global offset table */
1919
struct elf64_shdr *opd; /* official procedure descriptors */
2020
struct elf64_shdr *unwind; /* unwind-table section */
21-
#ifdef CONFIG_PARAVIRT
22-
struct elf64_shdr *paravirt_bundles;
23-
/* paravirt_alt_bundle_patch table */
24-
struct elf64_shdr *paravirt_insts;
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/* paravirt_alt_inst_patch table */
26-
#endif
2721
unsigned long gp; /* global-pointer for module */
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2923
void *core_unw_table; /* core unwind-table cookie returned by unwinder */

arch/ia64/include/asm/native/inst.h

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Original file line numberDiff line numberDiff line change
@@ -22,32 +22,6 @@
2222

2323
#define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN
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25-
#define __paravirt_switch_to ia64_native_switch_to
26-
#define __paravirt_leave_syscall ia64_native_leave_syscall
27-
#define __paravirt_work_processed_syscall ia64_native_work_processed_syscall
28-
#define __paravirt_leave_kernel ia64_native_leave_kernel
29-
#define __paravirt_pending_syscall_end ia64_work_pending_syscall_end
30-
#define __paravirt_work_processed_syscall_target \
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ia64_work_processed_syscall
32-
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#define paravirt_fsyscall_table ia64_native_fsyscall_table
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#define paravirt_fsys_bubble_down ia64_native_fsys_bubble_down
35-
36-
#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
37-
# define PARAVIRT_POISON 0xdeadbeefbaadf00d
38-
# define CLOBBER(clob) \
39-
;; \
40-
movl clob = PARAVIRT_POISON; \
41-
;;
42-
# define CLOBBER_PRED(pred_clob) \
43-
;; \
44-
cmp.eq pred_clob, p0 = r0, r0 \
45-
;;
46-
#else
47-
# define CLOBBER(clob) /* nothing */
48-
# define CLOBBER_PRED(pred_clob) /* nothing */
49-
#endif
50-
5125
#define MOV_FROM_IFA(reg) \
5226
mov reg = cr.ifa
5327

@@ -70,122 +44,87 @@
7044
mov reg = cr.iip
7145

7246
#define MOV_FROM_IVR(reg, clob) \
73-
mov reg = cr.ivr \
74-
CLOBBER(clob)
47+
mov reg = cr.ivr
7548

7649
#define MOV_FROM_PSR(pred, reg, clob) \
77-
(pred) mov reg = psr \
78-
CLOBBER(clob)
50+
(pred) mov reg = psr
7951

8052
#define MOV_FROM_ITC(pred, pred_clob, reg, clob) \
81-
(pred) mov reg = ar.itc \
82-
CLOBBER(clob) \
83-
CLOBBER_PRED(pred_clob)
53+
(pred) mov reg = ar.itc
8454

8555
#define MOV_TO_IFA(reg, clob) \
86-
mov cr.ifa = reg \
87-
CLOBBER(clob)
56+
mov cr.ifa = reg
8857

8958
#define MOV_TO_ITIR(pred, reg, clob) \
90-
(pred) mov cr.itir = reg \
91-
CLOBBER(clob)
59+
(pred) mov cr.itir = reg
9260

9361
#define MOV_TO_IHA(pred, reg, clob) \
94-
(pred) mov cr.iha = reg \
95-
CLOBBER(clob)
62+
(pred) mov cr.iha = reg
9663

9764
#define MOV_TO_IPSR(pred, reg, clob) \
98-
(pred) mov cr.ipsr = reg \
99-
CLOBBER(clob)
65+
(pred) mov cr.ipsr = reg
10066

10167
#define MOV_TO_IFS(pred, reg, clob) \
102-
(pred) mov cr.ifs = reg \
103-
CLOBBER(clob)
68+
(pred) mov cr.ifs = reg
10469

10570
#define MOV_TO_IIP(reg, clob) \
106-
mov cr.iip = reg \
107-
CLOBBER(clob)
71+
mov cr.iip = reg
10872

10973
#define MOV_TO_KR(kr, reg, clob0, clob1) \
110-
mov IA64_KR(kr) = reg \
111-
CLOBBER(clob0) \
112-
CLOBBER(clob1)
74+
mov IA64_KR(kr) = reg
11375

11476
#define ITC_I(pred, reg, clob) \
115-
(pred) itc.i reg \
116-
CLOBBER(clob)
77+
(pred) itc.i reg
11778

11879
#define ITC_D(pred, reg, clob) \
119-
(pred) itc.d reg \
120-
CLOBBER(clob)
80+
(pred) itc.d reg
12181

12282
#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
12383
(pred_i) itc.i reg; \
124-
(pred_d) itc.d reg \
125-
CLOBBER(clob)
84+
(pred_d) itc.d reg
12685

12786
#define THASH(pred, reg0, reg1, clob) \
128-
(pred) thash reg0 = reg1 \
129-
CLOBBER(clob)
87+
(pred) thash reg0 = reg1
13088

13189
#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
13290
ssm psr.ic | PSR_DEFAULT_BITS \
133-
CLOBBER(clob0) \
134-
CLOBBER(clob1) \
13591
;; \
13692
srlz.i /* guarantee that interruption collectin is on */ \
13793
;;
13894

13995
#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
14096
ssm psr.ic \
141-
CLOBBER(clob0) \
142-
CLOBBER(clob1) \
14397
;; \
14498
srlz.d
14599

146100
#define RSM_PSR_IC(clob) \
147-
rsm psr.ic \
148-
CLOBBER(clob)
101+
rsm psr.ic
149102

150103
#define SSM_PSR_I(pred, pred_clob, clob) \
151-
(pred) ssm psr.i \
152-
CLOBBER(clob) \
153-
CLOBBER_PRED(pred_clob)
104+
(pred) ssm psr.i
154105

155106
#define RSM_PSR_I(pred, clob0, clob1) \
156-
(pred) rsm psr.i \
157-
CLOBBER(clob0) \
158-
CLOBBER(clob1)
107+
(pred) rsm psr.i
159108

160109
#define RSM_PSR_I_IC(clob0, clob1, clob2) \
161-
rsm psr.i | psr.ic \
162-
CLOBBER(clob0) \
163-
CLOBBER(clob1) \
164-
CLOBBER(clob2)
110+
rsm psr.i | psr.ic
165111

166112
#define RSM_PSR_DT \
167113
rsm psr.dt
168114

169115
#define RSM_PSR_BE_I(clob0, clob1) \
170-
rsm psr.be | psr.i \
171-
CLOBBER(clob0) \
172-
CLOBBER(clob1)
116+
rsm psr.be | psr.i
173117

174118
#define SSM_PSR_DT_AND_SRLZ_I \
175119
ssm psr.dt \
176120
;; \
177121
srlz.i
178122

179123
#define BSW_0(clob0, clob1, clob2) \
180-
bsw.0 \
181-
CLOBBER(clob0) \
182-
CLOBBER(clob1) \
183-
CLOBBER(clob2)
124+
bsw.0
184125

185126
#define BSW_1(clob0, clob1) \
186-
bsw.1 \
187-
CLOBBER(clob0) \
188-
CLOBBER(clob1)
127+
bsw.1
189128

190129
#define COVER \
191130
cover

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