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Jon Masonffainelli
Jon Mason
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arm64: dts: NS2: Add dma-coherent to relevant DT entries
Cache related issues with DMA rings and performance issues related to caching are being caused by not properly setting the "dma-coherent" flag in the device tree entries. Adding it here to correct the issue. Signed-off-by: Jon Mason <jon.mason@broadcom.com> Fixes: fd5e5dd ("arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2") Fixes: dddc3c9 ("arm64: dts: NS2: add AMAC ethernet support") Fixes: e792491 ("arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver") Fixes: ac9aae0 ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2") Fixes: efc8776 ("arm64: dts: Add SDHCI DT node for NS2") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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‎arch/arm64/boot/dts/broadcom/ns2.dtsi

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Original file line numberDiff line numberDiff line change
@@ -114,6 +114,7 @@
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pcie0: pcie@20020000 {
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compatible = "brcm,iproc-pcie";
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reg = <0 0x20020000 0 0x1000>;
117+
dma-coherent;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
@@ -144,6 +145,7 @@
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pcie4: pcie@50020000 {
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compatible = "brcm,iproc-pcie";
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reg = <0 0x50020000 0 0x1000>;
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dma-coherent;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
@@ -174,6 +176,7 @@
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pcie8: pcie@60c00000 {
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compatible = "brcm,iproc-pcie-paxc";
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reg = <0 0x60c00000 0 0x1000>;
179+
dma-coherent;
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linux,pci-domain = <8>;
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bus-range = <0x0 0x1>;
@@ -203,6 +206,7 @@
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<0x61030000 0x100>;
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reg-names = "amac_base", "idm_base", "nicpm_base";
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interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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phy-handle = <&gphy0>;
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phy-mode = "rgmii";
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status = "disabled";
@@ -213,6 +217,7 @@
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reg = <0x612c0000 0x445>; /* PDC FS0 regs */
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
220+
dma-coherent;
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brcm,rx-status-len = <32>;
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brcm,use-bcm-hdr;
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};
@@ -222,6 +227,7 @@
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reg = <0x612e0000 0x445>; /* PDC FS1 regs */
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interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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dma-coherent;
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brcm,rx-status-len = <32>;
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brcm,use-bcm-hdr;
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};
@@ -231,6 +237,7 @@
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reg = <0x61300000 0x445>; /* PDC FS2 regs */
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interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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dma-coherent;
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brcm,rx-status-len = <32>;
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brcm,use-bcm-hdr;
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};
@@ -240,6 +247,7 @@
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reg = <0x61320000 0x445>; /* PDC FS3 regs */
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interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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dma-coherent;
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brcm,rx-status-len = <32>;
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brcm,use-bcm-hdr;
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};
@@ -644,6 +652,7 @@
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sata: ahci@663f2000 {
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compatible = "brcm,iproc-ahci", "generic-ahci";
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reg = <0x663f2000 0x1000>;
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dma-coherent;
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reg-names = "ahci";
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interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
@@ -667,6 +676,7 @@
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compatible = "brcm,sdhci-iproc-cygnus";
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reg = <0x66420000 0x100>;
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interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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bus-width = <8>;
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clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
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status = "disabled";
@@ -676,6 +686,7 @@
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compatible = "brcm,sdhci-iproc-cygnus";
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reg = <0x66430000 0x100>;
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interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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bus-width = <8>;
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clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
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status = "disabled";

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