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mwajdeczjlahtine-intel
mwajdecz
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jlahtine-intel
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drm/i915: Update DMC firmware load error messages
Some of the error messages from DMC load were too generic and may be confusing for the user. Lets explicitly add DMC words there. Also as homepage of DMC firmware is same as for the GuC and Huc, lets reuse URL definition. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Imre Deak <imre.deak@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171016144724.17244-12-michal.wajdeczko@intel.com
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‎drivers/gpu/drm/i915/intel_csr.c

Lines changed: 16 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -52,10 +52,6 @@ MODULE_FIRMWARE(I915_CSR_SKL);
5252
MODULE_FIRMWARE(I915_CSR_BXT);
5353
#define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
5454

55-
#define FIRMWARE_URL "https://01.org/linuxgraphics/downloads/firmware"
56-
57-
58-
5955

6056
#define CSR_MAX_FW_SIZE 0x2FFF
6157
#define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF
@@ -291,7 +287,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
291287
css_header = (struct intel_css_header *)fw->data;
292288
if (sizeof(struct intel_css_header) !=
293289
(css_header->header_len * 4)) {
294-
DRM_ERROR("Firmware has wrong CSS header length %u bytes\n",
290+
DRM_ERROR("DMC firmware has wrong CSS header length "
291+
"(%u bytes)\n",
295292
(css_header->header_len * 4));
296293
return NULL;
297294
}
@@ -315,7 +312,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
315312

316313
if (csr->version != required_version) {
317314
DRM_INFO("Refusing to load DMC firmware v%u.%u,"
318-
" please use v%u.%u [" FIRMWARE_URL "].\n",
315+
" please use v%u.%u\n",
319316
CSR_VERSION_MAJOR(csr->version),
320317
CSR_VERSION_MINOR(csr->version),
321318
CSR_VERSION_MAJOR(required_version),
@@ -330,7 +327,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
330327
&fw->data[readcount];
331328
if (sizeof(struct intel_package_header) !=
332329
(package_header->header_len * 4)) {
333-
DRM_ERROR("Firmware has wrong package header length %u bytes\n",
330+
DRM_ERROR("DMC firmware has wrong package header length "
331+
"(%u bytes)\n",
334332
(package_header->header_len * 4));
335333
return NULL;
336334
}
@@ -351,7 +349,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
351349
dmc_offset = package_header->fw_info[i].offset;
352350
}
353351
if (dmc_offset == CSR_DEFAULT_FW_OFFSET) {
354-
DRM_ERROR("Firmware not supported for %c stepping\n",
352+
DRM_ERROR("DMC firmware not supported for %c stepping\n",
355353
si->stepping);
356354
return NULL;
357355
}
@@ -360,23 +358,24 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
360358
/* Extract dmc_header information. */
361359
dmc_header = (struct intel_dmc_header *)&fw->data[readcount];
362360
if (sizeof(struct intel_dmc_header) != (dmc_header->header_len)) {
363-
DRM_ERROR("Firmware has wrong dmc header length %u bytes\n",
361+
DRM_ERROR("DMC firmware has wrong dmc header length "
362+
"(%u bytes)\n",
364363
(dmc_header->header_len));
365364
return NULL;
366365
}
367366
readcount += sizeof(struct intel_dmc_header);
368367

369368
/* Cache the dmc header info. */
370369
if (dmc_header->mmio_count > ARRAY_SIZE(csr->mmioaddr)) {
371-
DRM_ERROR("Firmware has wrong mmio count %u\n",
370+
DRM_ERROR("DMC firmware has wrong mmio count %u\n",
372371
dmc_header->mmio_count);
373372
return NULL;
374373
}
375374
csr->mmio_count = dmc_header->mmio_count;
376375
for (i = 0; i < dmc_header->mmio_count; i++) {
377376
if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE ||
378377
dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) {
379-
DRM_ERROR(" Firmware has wrong mmio address 0x%x\n",
378+
DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n",
380379
dmc_header->mmioaddr[i]);
381380
return NULL;
382381
}
@@ -387,7 +386,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
387386
/* fw_size is in dwords, so multiplied by 4 to convert into bytes. */
388387
nbytes = dmc_header->fw_size * 4;
389388
if (nbytes > CSR_MAX_FW_SIZE) {
390-
DRM_ERROR("CSR firmware too big (%u) bytes\n", nbytes);
389+
DRM_ERROR("DMC firmware too big (%u bytes)\n", nbytes);
391390
return NULL;
392391
}
393392
csr->dmc_fw_size = dmc_header->fw_size;
@@ -425,9 +424,11 @@ static void csr_load_work_fn(struct work_struct *work)
425424
CSR_VERSION_MINOR(csr->version));
426425
} else {
427426
dev_notice(dev_priv->drm.dev,
428-
"Failed to load DMC firmware"
429-
" [" FIRMWARE_URL "],"
430-
" disabling runtime power management.\n");
427+
"Failed to load DMC firmware %s."
428+
" Disabling runtime power management.\n",
429+
csr->fw_path);
430+
dev_notice(dev_priv->drm.dev, "DMC firmware homepage: %s",
431+
INTEL_UC_FIRMWARE_URL);
431432
}
432433

433434
release_firmware(fw);

‎drivers/gpu/drm/i915/intel_uc_fw.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@
2727

2828
struct drm_i915_private;
2929

30+
/* Home of GuC, HuC and DMC firmwares */
3031
#define INTEL_UC_FIRMWARE_URL "https://01.org/linuxgraphics/downloads/firmware"
3132

3233
enum intel_uc_fw_status {

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