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Espressif Systems
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add tie folder
1 parent eac93dd commit 0255463

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‎extra_include/xtensa/tie/xt_MUL32.h

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/* Definitions for the 32-bit Integer Multiply Option. */
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/*
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* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2009 by Tensilica Inc. ALL RIGHTS RESERVED.
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* These coded instructions, statements, and computer programs are the
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* copyrighted works and confidential proprietary information of Tensilica Inc.
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* They may not be modified, copied, reproduced, distributed, or disclosed to
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* third parties in any manner, medium, or form, in whole or in part, without
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* the prior written consent of Tensilica Inc.
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*/
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/* NOTE: This file exists only for backward compatibility with RB-200X.x
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and earlier Xtensa releases. Starting with RC-2009.0 you should use
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<xtensa/tie/xt_mul.h>. */
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#ifndef _XTENSA_xt_MUL32_HEADER
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#define _XTENSA_xt_MUL32_HEADER
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#ifdef __XTENSA__
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#include <xtensa/tie/xt_mul.h>
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#endif /* __XTENSA__ */
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#endif /* !_XTENSA_xt_MUL32_HEADER */

‎extra_include/xtensa/tie/xt_core.h

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/* Definitions for the xt_core TIE package */
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/*
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* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
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* These coded instructions, statements, and computer programs are the
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* copyrighted works and confidential proprietary information of Tensilica Inc.
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* They may not be modified, copied, reproduced, distributed, or disclosed to
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* third parties in any manner, medium, or form, in whole or in part, without
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* the prior written consent of Tensilica Inc.
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*/
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/* Do not modify. This is automatically generated.*/
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#ifndef _XTENSA_xt_core_HEADER
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#define _XTENSA_xt_core_HEADER
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#ifdef __XTENSA__
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#ifdef __XCC__
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/*
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* The following prototypes describe intrinsic functions
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* corresponding to TIE instructions. Some TIE instructions
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* may produce multiple results (designated as "out" operands
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* in the iclass section) or may have operands used as both
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* inputs and outputs (designated as "inout"). However, the C
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* and C++ languages do not provide syntax that can express
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* the in/out/inout constraints of TIE intrinsics.
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* Nevertheless, the compiler understands these constraints
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* and will check that the intrinsic functions are used
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* correctly. To improve the readability of these prototypes,
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* the "out" and "inout" parameters are marked accordingly
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* with comments.
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*/
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extern void _TIE_xt_core_ILL(void);
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extern void _TIE_xt_core_NOP(void);
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extern void _TIE_xt_core_MEMW(void);
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extern void _TIE_xt_core_EXTW(void);
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extern void _TIE_xt_core_ISYNC(void);
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extern void _TIE_xt_core_DSYNC(void);
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extern void _TIE_xt_core_ESYNC(void);
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extern void _TIE_xt_core_RSYNC(void);
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extern unsigned _TIE_xt_core_RSR_176(void);
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extern void _TIE_xt_core_WSR_176(unsigned art);
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extern unsigned _TIE_xt_core_RSR_208(void);
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extern unsigned _TIE_xt_core_uint32_loadi(const unsigned * p, immediate o);
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extern void _TIE_xt_core_uint32_storei(unsigned c, unsigned * p, immediate o);
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extern unsigned _TIE_xt_core_uint32_move(unsigned b);
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extern int _TIE_xt_core_ADDI(int s, immediate i);
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extern int _TIE_xt_core_OR(int s, int t);
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extern int _TIE_xt_core_L32I(const int * p, immediate i);
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extern void _TIE_xt_core_S32I(int r, int * p, immediate i);
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extern unsigned char _TIE_xt_core_L8UI(const unsigned char * p, immediate i);
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extern void _TIE_xt_core_S8I(signed char r, signed char * p, immediate i);
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extern unsigned short _TIE_xt_core_L16UI(const unsigned short * p, immediate i);
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extern short _TIE_xt_core_L16SI(const short * p, immediate i);
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extern void _TIE_xt_core_S16I(short r, short * p, immediate i);
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extern int _TIE_xt_core_ADDMI(int s, immediate i);
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extern int _TIE_xt_core_ADD(int s, int t);
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extern int _TIE_xt_core_ADDX2(int s, int t);
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extern int _TIE_xt_core_ADDX4(int s, int t);
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extern int _TIE_xt_core_ADDX8(int s, int t);
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extern int _TIE_xt_core_SUB(int s, int t);
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extern int _TIE_xt_core_SUBX2(int s, int t);
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extern int _TIE_xt_core_SUBX4(int s, int t);
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extern int _TIE_xt_core_SUBX8(int s, int t);
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extern int _TIE_xt_core_AND(int s, int t);
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extern int _TIE_xt_core_XOR(int s, int t);
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extern unsigned _TIE_xt_core_EXTUI(unsigned t, immediate i, immediate o);
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extern int _TIE_xt_core_MOVI(immediate i);
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extern void _TIE_xt_core_MOVEQZ(int r /*inout*/, int s, int t);
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extern void _TIE_xt_core_MOVNEZ(int r /*inout*/, int s, int t);
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extern void _TIE_xt_core_MOVLTZ(int r /*inout*/, int s, int t);
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extern void _TIE_xt_core_MOVGEZ(int r /*inout*/, int s, int t);
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extern int _TIE_xt_core_NEG(int t);
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extern int _TIE_xt_core_ABS(int t);
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extern void _TIE_xt_core_SSR(int s);
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extern void _TIE_xt_core_SSL(int s);
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extern void _TIE_xt_core_SSA8L(int s);
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extern void _TIE_xt_core_SSA8B(int s);
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extern void _TIE_xt_core_SSAI(immediate i);
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extern int _TIE_xt_core_SLL(int s);
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extern int _TIE_xt_core_SRC(int s, int t);
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extern unsigned _TIE_xt_core_SRL(unsigned t);
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extern int _TIE_xt_core_SRA(int t);
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extern int _TIE_xt_core_SLLI(int s, immediate i);
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extern int _TIE_xt_core_SRAI(int t, immediate i);
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extern unsigned _TIE_xt_core_SRLI(unsigned t, immediate i);
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extern int _TIE_xt_core_SSAI_SRC(int src1, int src2, immediate amount);
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extern int _TIE_xt_core_SSR_SRC(int src1, int src2, int amount);
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extern int _TIE_xt_core_WSR_SAR_SRC(int src1, int src2, int amount);
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extern int _TIE_xt_core_SSR_SRA(int src, int amount);
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extern unsigned _TIE_xt_core_SSR_SRL(unsigned src, int amount);
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extern int _TIE_xt_core_SSL_SLL(int src, int amount);
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extern int _TIE_xt_core_RSIL(immediate t);
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extern unsigned _TIE_xt_core_RSR_SAR(void);
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extern void _TIE_xt_core_WSR_SAR(unsigned t);
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extern void _TIE_xt_core_XSR_SAR(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_LITBASE(void);
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extern void _TIE_xt_core_WSR_LITBASE(unsigned t);
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extern void _TIE_xt_core_XSR_LITBASE(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_PS(void);
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extern void _TIE_xt_core_WSR_PS(unsigned t);
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extern void _TIE_xt_core_XSR_PS(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPC1(void);
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extern void _TIE_xt_core_WSR_EPC1(unsigned t);
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extern void _TIE_xt_core_XSR_EPC1(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCSAVE1(void);
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extern void _TIE_xt_core_WSR_EXCSAVE1(unsigned t);
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extern void _TIE_xt_core_XSR_EXCSAVE1(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPC2(void);
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extern void _TIE_xt_core_WSR_EPC2(unsigned t);
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extern void _TIE_xt_core_XSR_EPC2(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCSAVE2(void);
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extern void _TIE_xt_core_WSR_EXCSAVE2(unsigned t);
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extern void _TIE_xt_core_XSR_EXCSAVE2(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPC3(void);
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extern void _TIE_xt_core_WSR_EPC3(unsigned t);
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extern void _TIE_xt_core_XSR_EPC3(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCSAVE3(void);
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extern void _TIE_xt_core_WSR_EXCSAVE3(unsigned t);
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extern void _TIE_xt_core_XSR_EXCSAVE3(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_VECBASE(void);
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extern void _TIE_xt_core_WSR_VECBASE(unsigned t);
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extern void _TIE_xt_core_XSR_VECBASE(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPS2(void);
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extern void _TIE_xt_core_WSR_EPS2(unsigned t);
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extern void _TIE_xt_core_XSR_EPS2(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPS3(void);
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extern void _TIE_xt_core_WSR_EPS3(unsigned t);
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extern void _TIE_xt_core_XSR_EPS3(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCCAUSE(void);
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extern void _TIE_xt_core_WSR_EXCCAUSE(unsigned t);
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extern void _TIE_xt_core_XSR_EXCCAUSE(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCVADDR(void);
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extern void _TIE_xt_core_WSR_EXCVADDR(unsigned t);
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extern void _TIE_xt_core_XSR_EXCVADDR(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_DEPC(void);
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extern void _TIE_xt_core_WSR_DEPC(unsigned t);
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extern void _TIE_xt_core_XSR_DEPC(unsigned t /*inout*/);
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extern int _TIE_xt_core_RSR_PRID(void);
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#define XT_ILL _TIE_xt_core_ILL
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#define XT_NOP _TIE_xt_core_NOP
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#define XT_MEMW _TIE_xt_core_MEMW
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#define XT_EXTW _TIE_xt_core_EXTW
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#define XT_ISYNC _TIE_xt_core_ISYNC
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#define XT_DSYNC _TIE_xt_core_DSYNC
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#define XT_ESYNC _TIE_xt_core_ESYNC
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#define XT_RSYNC _TIE_xt_core_RSYNC
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#define XT_RSR_176 _TIE_xt_core_RSR_176
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#define XT_WSR_176 _TIE_xt_core_WSR_176
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#define XT_RSR_208 _TIE_xt_core_RSR_208
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#define XT_uint32_loadi _TIE_xt_core_uint32_loadi
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#define XT_uint32_storei _TIE_xt_core_uint32_storei
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#define XT_uint32_move _TIE_xt_core_uint32_move
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#define XT_ADDI _TIE_xt_core_ADDI
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#define XT_OR _TIE_xt_core_OR
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#define XT_L32I _TIE_xt_core_L32I
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#define XT_S32I _TIE_xt_core_S32I
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#define XT_L8UI _TIE_xt_core_L8UI
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#define XT_S8I _TIE_xt_core_S8I
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#define XT_L16UI _TIE_xt_core_L16UI
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#define XT_L16SI _TIE_xt_core_L16SI
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#define XT_S16I _TIE_xt_core_S16I
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#define XT_ADDMI _TIE_xt_core_ADDMI
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#define XT_ADD _TIE_xt_core_ADD
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#define XT_ADDX2 _TIE_xt_core_ADDX2
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#define XT_ADDX4 _TIE_xt_core_ADDX4
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#define XT_ADDX8 _TIE_xt_core_ADDX8
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#define XT_SUB _TIE_xt_core_SUB
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#define XT_SUBX2 _TIE_xt_core_SUBX2
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#define XT_SUBX4 _TIE_xt_core_SUBX4
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#define XT_SUBX8 _TIE_xt_core_SUBX8
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#define XT_AND _TIE_xt_core_AND
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#define XT_XOR _TIE_xt_core_XOR
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#define XT_EXTUI _TIE_xt_core_EXTUI
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#define XT_MOVI _TIE_xt_core_MOVI
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#define XT_MOVEQZ _TIE_xt_core_MOVEQZ
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#define XT_MOVNEZ _TIE_xt_core_MOVNEZ
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#define XT_MOVLTZ _TIE_xt_core_MOVLTZ
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#define XT_MOVGEZ _TIE_xt_core_MOVGEZ
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#define XT_NEG _TIE_xt_core_NEG
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#define XT_ABS _TIE_xt_core_ABS
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#define XT_SSR _TIE_xt_core_SSR
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#define XT_SSL _TIE_xt_core_SSL
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#define XT_SSA8L _TIE_xt_core_SSA8L
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#define XT_SSA8B _TIE_xt_core_SSA8B
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#define XT_SSAI _TIE_xt_core_SSAI
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#define XT_SLL _TIE_xt_core_SLL
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#define XT_SRC _TIE_xt_core_SRC
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#define XT_SRL _TIE_xt_core_SRL
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#define XT_SRA _TIE_xt_core_SRA
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#define XT_SLLI _TIE_xt_core_SLLI
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#define XT_SRAI _TIE_xt_core_SRAI
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#define XT_SRLI _TIE_xt_core_SRLI
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#define XT_SSAI_SRC _TIE_xt_core_SSAI_SRC
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#define XT_SSR_SRC _TIE_xt_core_SSR_SRC
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#define XT_WSR_SAR_SRC _TIE_xt_core_WSR_SAR_SRC
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#define XT_SSR_SRA _TIE_xt_core_SSR_SRA
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#define XT_SSR_SRL _TIE_xt_core_SSR_SRL
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#define XT_SSL_SLL _TIE_xt_core_SSL_SLL
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#define XT_RSIL _TIE_xt_core_RSIL
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#define XT_RSR_SAR _TIE_xt_core_RSR_SAR
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#define XT_WSR_SAR _TIE_xt_core_WSR_SAR
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#define XT_XSR_SAR _TIE_xt_core_XSR_SAR
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#define XT_RSR_LITBASE _TIE_xt_core_RSR_LITBASE
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#define XT_WSR_LITBASE _TIE_xt_core_WSR_LITBASE
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#define XT_XSR_LITBASE _TIE_xt_core_XSR_LITBASE
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#define XT_RSR_PS _TIE_xt_core_RSR_PS
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#define XT_WSR_PS _TIE_xt_core_WSR_PS
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#define XT_XSR_PS _TIE_xt_core_XSR_PS
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#define XT_RSR_EPC1 _TIE_xt_core_RSR_EPC1
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#define XT_WSR_EPC1 _TIE_xt_core_WSR_EPC1
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#define XT_XSR_EPC1 _TIE_xt_core_XSR_EPC1
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#define XT_RSR_EXCSAVE1 _TIE_xt_core_RSR_EXCSAVE1
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#define XT_WSR_EXCSAVE1 _TIE_xt_core_WSR_EXCSAVE1
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#define XT_XSR_EXCSAVE1 _TIE_xt_core_XSR_EXCSAVE1
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#define XT_RSR_EPC2 _TIE_xt_core_RSR_EPC2
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#define XT_WSR_EPC2 _TIE_xt_core_WSR_EPC2
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#define XT_XSR_EPC2 _TIE_xt_core_XSR_EPC2
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#define XT_RSR_EXCSAVE2 _TIE_xt_core_RSR_EXCSAVE2
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#define XT_WSR_EXCSAVE2 _TIE_xt_core_WSR_EXCSAVE2
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#define XT_XSR_EXCSAVE2 _TIE_xt_core_XSR_EXCSAVE2
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#define XT_RSR_EPC3 _TIE_xt_core_RSR_EPC3
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#define XT_WSR_EPC3 _TIE_xt_core_WSR_EPC3
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#define XT_XSR_EPC3 _TIE_xt_core_XSR_EPC3
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#define XT_RSR_EXCSAVE3 _TIE_xt_core_RSR_EXCSAVE3
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#define XT_WSR_EXCSAVE3 _TIE_xt_core_WSR_EXCSAVE3
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#define XT_XSR_EXCSAVE3 _TIE_xt_core_XSR_EXCSAVE3
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#define XT_RSR_VECBASE _TIE_xt_core_RSR_VECBASE
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#define XT_WSR_VECBASE _TIE_xt_core_WSR_VECBASE
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#define XT_XSR_VECBASE _TIE_xt_core_XSR_VECBASE
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#define XT_RSR_EPS2 _TIE_xt_core_RSR_EPS2
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#define XT_WSR_EPS2 _TIE_xt_core_WSR_EPS2
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#define XT_XSR_EPS2 _TIE_xt_core_XSR_EPS2
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#define XT_RSR_EPS3 _TIE_xt_core_RSR_EPS3
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#define XT_WSR_EPS3 _TIE_xt_core_WSR_EPS3
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#define XT_XSR_EPS3 _TIE_xt_core_XSR_EPS3
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#define XT_RSR_EXCCAUSE _TIE_xt_core_RSR_EXCCAUSE
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#define XT_WSR_EXCCAUSE _TIE_xt_core_WSR_EXCCAUSE
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#define XT_XSR_EXCCAUSE _TIE_xt_core_XSR_EXCCAUSE
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#define XT_RSR_EXCVADDR _TIE_xt_core_RSR_EXCVADDR
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#define XT_WSR_EXCVADDR _TIE_xt_core_WSR_EXCVADDR
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#define XT_XSR_EXCVADDR _TIE_xt_core_XSR_EXCVADDR
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#define XT_RSR_DEPC _TIE_xt_core_RSR_DEPC
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#define XT_WSR_DEPC _TIE_xt_core_WSR_DEPC
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#define XT_XSR_DEPC _TIE_xt_core_XSR_DEPC
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#define XT_RSR_PRID _TIE_xt_core_RSR_PRID
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#endif /* __XCC__ */
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#endif /* __XTENSA__ */
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#endif /* !_XTENSA_xt_core_HEADER */

‎extra_include/xtensa/tie/xt_debug.h

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/* Definitions for the xt_debug TIE package */
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/*
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* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
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* These coded instructions, statements, and computer programs are the
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* copyrighted works and confidential proprietary information of Tensilica Inc.
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* They may not be modified, copied, reproduced, distributed, or disclosed to
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* third parties in any manner, medium, or form, in whole or in part, without
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* the prior written consent of Tensilica Inc.
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*/
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/* Do not modify. This is automatically generated.*/
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#ifndef _XTENSA_xt_debug_HEADER
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#define _XTENSA_xt_debug_HEADER
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#ifdef __XTENSA__
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#ifdef __XCC__
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#include <xtensa/tie/xt_core.h>
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/*
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* The following prototypes describe intrinsic functions
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* corresponding to TIE instructions. Some TIE instructions
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* may produce multiple results (designated as "out" operands
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* in the iclass section) or may have operands used as both
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* inputs and outputs (designated as "inout"). However, the C
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* and C++ languages do not provide syntax that can express
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* the in/out/inout constraints of TIE intrinsics.
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* Nevertheless, the compiler understands these constraints
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* and will check that the intrinsic functions are used
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* correctly. To improve the readability of these prototypes,
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* the "out" and "inout" parameters are marked accordingly
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* with comments.
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*/
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extern void _TIE_xt_debug_BREAK(immediate imms, immediate immt);
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extern void _TIE_xt_debug_BREAK_N(immediate imms);
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extern unsigned _TIE_xt_debug_RSR_DBREAKA0(void);
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extern void _TIE_xt_debug_WSR_DBREAKA0(unsigned art);
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extern void _TIE_xt_debug_XSR_DBREAKA0(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DBREAKC0(void);
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extern void _TIE_xt_debug_WSR_DBREAKC0(unsigned art);
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extern void _TIE_xt_debug_XSR_DBREAKC0(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_IBREAKA0(void);
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extern void _TIE_xt_debug_WSR_IBREAKA0(unsigned art);
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extern void _TIE_xt_debug_XSR_IBREAKA0(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_IBREAKENABLE(void);
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extern void _TIE_xt_debug_WSR_IBREAKENABLE(unsigned art);
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extern void _TIE_xt_debug_XSR_IBREAKENABLE(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DEBUGCAUSE(void);
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extern void _TIE_xt_debug_WSR_DEBUGCAUSE(unsigned art);
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extern void _TIE_xt_debug_XSR_DEBUGCAUSE(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_ICOUNT(void);
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extern void _TIE_xt_debug_WSR_ICOUNT(unsigned art);
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extern void _TIE_xt_debug_XSR_ICOUNT(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_ICOUNTLEVEL(void);
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extern void _TIE_xt_debug_WSR_ICOUNTLEVEL(unsigned art);
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extern void _TIE_xt_debug_XSR_ICOUNTLEVEL(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DDR(void);
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extern void _TIE_xt_debug_WSR_DDR(unsigned art);
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extern void _TIE_xt_debug_XSR_DDR(unsigned art /*inout*/);
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#define XT_BREAK _TIE_xt_debug_BREAK
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#define XT_BREAK_N _TIE_xt_debug_BREAK_N
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#define XT_RSR_DBREAKA0 _TIE_xt_debug_RSR_DBREAKA0
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#define XT_WSR_DBREAKA0 _TIE_xt_debug_WSR_DBREAKA0
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#define XT_XSR_DBREAKA0 _TIE_xt_debug_XSR_DBREAKA0
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#define XT_RSR_DBREAKC0 _TIE_xt_debug_RSR_DBREAKC0
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#define XT_WSR_DBREAKC0 _TIE_xt_debug_WSR_DBREAKC0
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#define XT_XSR_DBREAKC0 _TIE_xt_debug_XSR_DBREAKC0
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#define XT_RSR_IBREAKA0 _TIE_xt_debug_RSR_IBREAKA0
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#define XT_WSR_IBREAKA0 _TIE_xt_debug_WSR_IBREAKA0
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#define XT_XSR_IBREAKA0 _TIE_xt_debug_XSR_IBREAKA0
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#define XT_RSR_IBREAKENABLE _TIE_xt_debug_RSR_IBREAKENABLE
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#define XT_WSR_IBREAKENABLE _TIE_xt_debug_WSR_IBREAKENABLE
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#define XT_XSR_IBREAKENABLE _TIE_xt_debug_XSR_IBREAKENABLE
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#define XT_RSR_DEBUGCAUSE _TIE_xt_debug_RSR_DEBUGCAUSE
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#define XT_WSR_DEBUGCAUSE _TIE_xt_debug_WSR_DEBUGCAUSE
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#define XT_XSR_DEBUGCAUSE _TIE_xt_debug_XSR_DEBUGCAUSE
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#define XT_RSR_ICOUNT _TIE_xt_debug_RSR_ICOUNT
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#define XT_WSR_ICOUNT _TIE_xt_debug_WSR_ICOUNT
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#define XT_XSR_ICOUNT _TIE_xt_debug_XSR_ICOUNT
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#define XT_RSR_ICOUNTLEVEL _TIE_xt_debug_RSR_ICOUNTLEVEL
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#define XT_WSR_ICOUNTLEVEL _TIE_xt_debug_WSR_ICOUNTLEVEL
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#define XT_XSR_ICOUNTLEVEL _TIE_xt_debug_XSR_ICOUNTLEVEL
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#define XT_RSR_DDR _TIE_xt_debug_RSR_DDR
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#define XT_WSR_DDR _TIE_xt_debug_WSR_DDR
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#define XT_XSR_DDR _TIE_xt_debug_XSR_DDR
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#endif /* __XCC__ */
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#endif /* __XTENSA__ */
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#endif /* !_XTENSA_xt_debug_HEADER */

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