Reland "[X86][APX] Remove redundant TEST*ri instructions" #156002
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The goal is to remove redundant TEST*ri instructions, especially with NF feature. Other tests are side effects due to longer live range of EFLAGS. https://godbolt.org/z/PbaTj1oa3
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@llvm/pr-subscribers-backend-x86 Author: Phoebe Wang (phoebewang) ChangesThe goal is to remove redundant TEST*ri instructions, especially with NF feature. Other tests are side effects due to longer live range of EFLAGS. https://godbolt.org/z/PbaTj1oa3 Reland with fix to buildbot failures. Full diff: https://github.com/llvm/llvm-project/pull/156002.diff 7 Files Affected:
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index abf365eedec39..bd33db3d445d7 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -4903,6 +4903,16 @@ bool X86InstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg,
CmpMask = ~0;
CmpValue = 0;
return true;
+ case X86::TEST64ri32:
+ case X86::TEST32ri:
+ case X86::TEST16ri:
+ case X86::TEST8ri:
+ SrcReg = MI.getOperand(0).getReg();
+ SrcReg2 = 0;
+ // Force identical compare.
+ CmpMask = 0;
+ CmpValue = 0;
+ return true;
}
return false;
}
@@ -4942,6 +4952,10 @@ bool X86InstrInfo::isRedundantFlagInstr(const MachineInstr &FlagI,
case X86::CMP32ri:
case X86::CMP16ri:
case X86::CMP8ri:
+ case X86::TEST64ri32:
+ case X86::TEST32ri:
+ case X86::TEST16ri:
+ case X86::TEST8ri:
CASE_ND(SUB64ri32)
CASE_ND(SUB32ri)
CASE_ND(SUB16ri)
diff --git a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
index 8d690ba06e3bd..6541693776099 100644
--- a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
+++ b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
@@ -13,25 +13,24 @@ define fastcc void @mp_sqrt(i32 %n, i32 %radix, ptr %in, ptr %out, ptr %tmp1, pt
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: pushl %eax
-; CHECK-NEXT: movb $1, %cl
+; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: movl $1, %ebx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %bb.i5
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movl %ecx, %eax
+; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: addl %ebx, %ebx
-; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testb $1, %al
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: testb $1, %cl
; CHECK-NEXT: jne .LBB0_1
; CHECK-NEXT: # %bb.2: # %mp_unexp_mp2d.exit.i
; CHECK-NEXT: je .LBB0_3
; CHECK-NEXT: # %bb.5: # %cond_next.i
-; CHECK-NEXT: testb $1, %al
; CHECK-NEXT: jne .LBB0_3
; CHECK-NEXT: # %bb.6: # %cond_next36.i
; CHECK-NEXT: movl $0, 0
-; CHECK-NEXT: movzbl %al, %ebp
+; CHECK-NEXT: movzbl %cl, %ebp
; CHECK-NEXT: andl $1, %ebp
; CHECK-NEXT: xorpd %xmm0, %xmm0
; CHECK-NEXT: xorl %eax, %eax
diff --git a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
index bf939c4131080..3913e93b83a66 100644
--- a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
@@ -38,7 +38,6 @@ define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct
; CHECK-NEXT: ## %bb.1: ## %bb116.i
; CHECK-NEXT: je LBB0_25
; CHECK-NEXT: ## %bb.2: ## %bb52.i.i
-; CHECK-NEXT: testb $1, %bl
; CHECK-NEXT: je LBB0_25
; CHECK-NEXT: ## %bb.3: ## %bb142.i
; CHECK-NEXT: je LBB0_25
@@ -49,23 +48,23 @@ define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct
; CHECK-NEXT: jmp LBB0_5
; CHECK-NEXT: LBB0_21: ## %bb7806
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
-; CHECK-NEXT: Ltmp16:
+; CHECK-NEXT: Ltmp16: ## EH_LABEL
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, (%esp)
; CHECK-NEXT: calll __ZN12wxStringBase6appendEmw
-; CHECK-NEXT: Ltmp17:
+; CHECK-NEXT: Ltmp17: ## EH_LABEL
; CHECK-NEXT: LBB0_5: ## %bb3261
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpl $37, 0
; CHECK-NEXT: jne LBB0_25
; CHECK-NEXT: ## %bb.6: ## %bb3306
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
-; CHECK-NEXT: Ltmp0:
+; CHECK-NEXT: Ltmp0: ## EH_LABEL
; CHECK-NEXT: movl %edi, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, (%esp)
; CHECK-NEXT: calll __ZN12wxStringBaseaSEPKw
-; CHECK-NEXT: Ltmp1:
+; CHECK-NEXT: Ltmp1: ## EH_LABEL
; CHECK-NEXT: ## %bb.7: ## %bb3314
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
; CHECK-NEXT: movl 0, %eax
@@ -89,11 +88,11 @@ define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct
; CHECK-NEXT: je LBB0_14
; CHECK-NEXT: ## %bb.13: ## %bb155.i8541
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
-; CHECK-NEXT: Ltmp4:
+; CHECK-NEXT: Ltmp4: ## EH_LABEL
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, (%esp)
; CHECK-NEXT: calll _gmtime_r
-; CHECK-NEXT: Ltmp5:
+; CHECK-NEXT: Ltmp5: ## EH_LABEL
; CHECK-NEXT: LBB0_14: ## %bb182.i8560
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
; CHECK-NEXT: testb $1, %bl
@@ -103,7 +102,7 @@ define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct
; CHECK-NEXT: je LBB0_18
; CHECK-NEXT: ## %bb.17: ## %bb440.i8663
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
-; CHECK-NEXT: Ltmp6:
+; CHECK-NEXT: Ltmp6: ## EH_LABEL
; CHECK-NEXT: movl L_.str4$non_lazy_ptr, %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl L_.str33$non_lazy_ptr, %eax
@@ -113,47 +112,47 @@ define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct
; CHECK-NEXT: movl %ebp, (%esp)
; CHECK-NEXT: movl $1717, {{[0-9]+}}(%esp) ## imm = 0x6B5
; CHECK-NEXT: calll __Z10wxOnAssertPKwiPKcS0_S0_
-; CHECK-NEXT: Ltmp7:
+; CHECK-NEXT: Ltmp7: ## EH_LABEL
; CHECK-NEXT: jmp LBB0_18
; CHECK-NEXT: LBB0_15: ## %bb187.i8591
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
; CHECK-NEXT: jne LBB0_25
; CHECK-NEXT: LBB0_18: ## %invcont5814
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
-; CHECK-NEXT: Ltmp8:
+; CHECK-NEXT: Ltmp8: ## EH_LABEL
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, (%esp)
; CHECK-NEXT: calll __ZN8wxString6FormatEPKwz
; CHECK-NEXT: subl $4, %esp
-; CHECK-NEXT: Ltmp9:
+; CHECK-NEXT: Ltmp9: ## EH_LABEL
; CHECK-NEXT: ## %bb.19: ## %invcont5831
; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
-; CHECK-NEXT: Ltmp10:
+; CHECK-NEXT: Ltmp10: ## EH_LABEL
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, (%esp)
; CHECK-NEXT: calll __ZN12wxStringBase10ConcatSelfEmPKwm
-; CHECK-NEXT: Ltmp11:
+; CHECK-NEXT: Ltmp11: ## EH_LABEL
; CHECK-NEXT: jmp LBB0_5
; CHECK-NEXT: LBB0_9: ## %bb5657
-; CHECK-NEXT: Ltmp13:
+; CHECK-NEXT: Ltmp13: ## EH_LABEL
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, (%esp)
; CHECK-NEXT: calll __ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE
-; CHECK-NEXT: Ltmp14:
+; CHECK-NEXT: Ltmp14: ## EH_LABEL
; CHECK-NEXT: jmp LBB0_25
; CHECK-NEXT: LBB0_20: ## %bb5968
-; CHECK-NEXT: Ltmp2:
+; CHECK-NEXT: Ltmp2: ## EH_LABEL
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, (%esp)
; CHECK-NEXT: calll __ZN8wxString6FormatEPKwz
; CHECK-NEXT: subl $4, %esp
-; CHECK-NEXT: Ltmp3:
+; CHECK-NEXT: Ltmp3: ## EH_LABEL
; CHECK-NEXT: LBB0_25: ## %bb115.critedge.i
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: addl $28, %esp
@@ -163,13 +162,13 @@ define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct
; CHECK-NEXT: popl %ebp
; CHECK-NEXT: retl $4
; CHECK-NEXT: LBB0_23: ## %lpad.loopexit.split-lp
-; CHECK-NEXT: Ltmp15:
+; CHECK-NEXT: Ltmp15: ## EH_LABEL
; CHECK-NEXT: jmp LBB0_25
; CHECK-NEXT: LBB0_24: ## %lpad8185
-; CHECK-NEXT: Ltmp12:
+; CHECK-NEXT: Ltmp12: ## EH_LABEL
; CHECK-NEXT: jmp LBB0_25
; CHECK-NEXT: LBB0_22: ## %lpad.loopexit
-; CHECK-NEXT: Ltmp18:
+; CHECK-NEXT: Ltmp18: ## EH_LABEL
; CHECK-NEXT: jmp LBB0_25
; CHECK-NEXT: Lfunc_end0:
entry:
diff --git a/llvm/test/CodeGen/X86/apx/cf.ll b/llvm/test/CodeGen/X86/apx/cf.ll
index e52ce6ca815bb..b2651e91134ee 100644
--- a/llvm/test/CodeGen/X86/apx/cf.ll
+++ b/llvm/test/CodeGen/X86/apx/cf.ll
@@ -229,3 +229,21 @@ entry:
call void @llvm.masked.store.v1i32.p0(<1 x i32> zeroinitializer, ptr %p, i32 1, <1 x i1> %1)
ret void
}
+
+define i64 @redundant_test(i64 %num, ptr %p1, i64 %in) {
+; CHECK-LABEL: redundant_test:
+; CHECK: # %bb.0:
+; CHECK-NEXT: testl $-32, %edi
+; CHECK-NEXT: cfcmoveq (%rsi), %rax
+; CHECK-NEXT: {nf} addq %rdx, %rax
+; CHECK-NEXT: cmovneq %rdi, %rax
+; CHECK-NEXT: retq
+ %and = and i64 %num, 4294967264
+ %cmp = icmp eq i64 %and, 0
+ %mask = bitcast i1 %cmp to <1 x i1>
+ %condload = tail call <1 x i64> @llvm.masked.load.v1i64.p0(ptr %p1, i32 8, <1 x i1> %mask, <1 x i64> poison)
+ %v = bitcast <1 x i64> %condload to i64
+ %add = add i64 %v, %in
+ %sel = select i1 %cmp, i64 %add, i64 %num
+ ret i64 %sel
+}
diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
index 3ac0fd7746a30..eccb32346a403 100644
--- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
+++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
@@ -22,41 +22,45 @@ define void @FontChange(i1 %foo) nounwind {
; CHECK-LABEL: FontChange:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil
-; CHECK-NEXT: je .LBB0_10
+; CHECK-NEXT: je .LBB0_12
+; CHECK-NEXT: # %bb.1: # %bb298
+; CHECK-NEXT: je .LBB0_3
+; CHECK-NEXT: # %bb.2: # %bb304
+; CHECK-NEXT: je .LBB0_4
; CHECK-NEXT: .p2align 4
-; CHECK-NEXT: .LBB0_1: # %bb366
+; CHECK-NEXT: .LBB0_3: # %bb366
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb $1, %dil
-; CHECK-NEXT: jne .LBB0_1
-; CHECK-NEXT: # %bb.2: # %bb428
+; CHECK-NEXT: jne .LBB0_3
+; CHECK-NEXT: .LBB0_4: # %bb428
; CHECK-NEXT: testb $1, %dil
-; CHECK-NEXT: je .LBB0_10
-; CHECK-NEXT: # %bb.3:
+; CHECK-NEXT: je .LBB0_12
+; CHECK-NEXT: # %bb.5:
; CHECK-NEXT: cmpb $0, 0
; CHECK-NEXT: .p2align 4
-; CHECK-NEXT: .LBB0_4: # %bb650
+; CHECK-NEXT: .LBB0_6: # %bb650
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: je .LBB0_4
-; CHECK-NEXT: # %bb.5: # %bb662
+; CHECK-NEXT: je .LBB0_6
+; CHECK-NEXT: # %bb.7: # %bb662
; CHECK-NEXT: movl 0, %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: andl $57344, %ecx # imm = 0xE000
; CHECK-NEXT: cmpl $8192, %ecx # imm = 0x2000
-; CHECK-NEXT: jne .LBB0_10
-; CHECK-NEXT: # %bb.6: # %bb4884
+; CHECK-NEXT: jne .LBB0_12
+; CHECK-NEXT: # %bb.8: # %bb4884
; CHECK-NEXT: andl $7168, %eax # imm = 0x1C00
; CHECK-NEXT: cmpl $1024, %eax # imm = 0x400
-; CHECK-NEXT: jne .LBB0_10
-; CHECK-NEXT: # %bb.7: # %bb4932
+; CHECK-NEXT: jne .LBB0_12
+; CHECK-NEXT: # %bb.9: # %bb4932
; CHECK-NEXT: testb $1, %dil
-; CHECK-NEXT: jne .LBB0_10
-; CHECK-NEXT: # %bb.8: # %bb4940
+; CHECK-NEXT: jne .LBB0_12
+; CHECK-NEXT: # %bb.10: # %bb4940
; CHECK-NEXT: movl 0, %eax
; CHECK-NEXT: cmpl $160, %eax
-; CHECK-NEXT: je .LBB0_10
-; CHECK-NEXT: # %bb.9: # %bb4940
+; CHECK-NEXT: je .LBB0_12
+; CHECK-NEXT: # %bb.11: # %bb4940
; CHECK-NEXT: cmpl $159, %eax
-; CHECK-NEXT: .LBB0_10: # %bb4897
+; CHECK-NEXT: .LBB0_12: # %bb4897
; CHECK-NEXT: retq
entry:
br i1 %foo, label %bb298, label %bb49
diff --git a/llvm/test/CodeGen/X86/peep-test-5.ll b/llvm/test/CodeGen/X86/peep-test-5.ll
index 52bcbe9f83d7a..1840570a4f46b 100644
--- a/llvm/test/CodeGen/X86/peep-test-5.ll
+++ b/llvm/test/CodeGen/X86/peep-test-5.ll
@@ -51,3 +51,21 @@ end:
}
declare void @free_object()
+
+; Check TEST instruction would not be combined with CMP.
+define i1 @pr155586(i8 %0) {
+; CHECK-LABEL: pr155586:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: cmpb $1, %dil
+; CHECK-NEXT: setne %cl
+; CHECK-NEXT: testb $1, %dil
+; CHECK-NEXT: sete %al
+; CHECK-NEXT: andb %cl, %al
+; CHECK-NEXT: retq
+entry:
+ %cmp88.not = icmp eq i8 %0, 1
+ %1 = and i8 %0, 1
+ %tobool161.not = icmp eq i8 %1, 0
+ %common.ret.op = select i1 %cmp88.not, i1 false, i1 %tobool161.not
+ ret i1 %common.ret.op
+}
diff --git a/llvm/test/CodeGen/X86/pr38795.ll b/llvm/test/CodeGen/X86/pr38795.ll
index c3c96e8228797..6a0c13526ac18 100644
--- a/llvm/test/CodeGen/X86/pr38795.ll
+++ b/llvm/test/CodeGen/X86/pr38795.ll
@@ -260,7 +260,6 @@ define void @verifier_error_reduced_issue38788(i1 %cmp11) {
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .cfi_offset %ebx, -8
-; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: jmp .LBB1_1
@@ -272,10 +271,9 @@ define void @verifier_error_reduced_issue38788(i1 %cmp11) {
; CHECK-NEXT: # in Loop: Header=BB1_1 Depth=1
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: movl %edx, %ebx
-; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: .LBB1_1: # %for.cond
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: testb $1, %al
+; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: je .LBB1_3
; CHECK-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
; CHECK-NEXT: xorl %eax, %eax
@@ -283,12 +281,11 @@ define void @verifier_error_reduced_issue38788(i1 %cmp11) {
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_3: # %if.end
; CHECK-NEXT: # in Loop: Header=BB1_1 Depth=1
-; CHECK-NEXT: testb $1, %al
; CHECK-NEXT: je .LBB1_4
; CHECK-NEXT: # %bb.9: # %if.then13
; CHECK-NEXT: # in Loop: Header=BB1_1 Depth=1
; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: testb $1, %al
+; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: movl $0, %ebx
; CHECK-NEXT: jne .LBB1_8
|
You can test this locally with the following command:git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86InstrInfo.cpp
View the diff from clang-format here.diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 5c0deeb56..cad4a2810 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -4951,10 +4951,10 @@ bool X86InstrInfo::isRedundantFlagInstr(const MachineInstr &FlagI,
case X86::TEST32ri:
case X86::TEST16ri:
case X86::TEST8ri:
- CASE_ND(SUB64ri32)
- CASE_ND(SUB32ri)
- CASE_ND(SUB16ri)
- CASE_ND(SUB8ri)
+ CASE_ND(SUB64ri32)
+ CASE_ND(SUB32ri)
+ CASE_ND(SUB16ri)
+ CASE_ND(SUB8ri)
case X86::TEST64rr:
case X86::TEST32rr:
case X86::TEST16rr:
|
KanRobert
approved these changes
Aug 29, 2025
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The goal is to remove redundant TEST*ri instructions, especially with NF feature. Other tests are side effects due to longer live range of EFLAGS. https://godbolt.org/z/PbaTj1oa3
Reland with fix to buildbot failures.