[X86][GlobalIsel] Add ceil/trunc/floor cpp intrinsic test #156281
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@llvm/pr-subscribers-backend-x86 Author: Mahesh-Attarde (mahesh-attarde) ChangesI am working towards supporting G_INTRINSIC_TRUNC, G_FCEIL and G_FFLOOR. This patch adds isel test for usecase. Full diff: https://github.com/llvm/llvm-project/pull/156281.diff 3 Files Affected:
diff --git a/llvm/test/CodeGen/X86/isel-llvm-ceil.ll b/llvm/test/CodeGen/X86/isel-llvm-ceil.ll
new file mode 100644
index 0000000000000..cdd6b9c6cc713
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-llvm-ceil.ll
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
+
+define float @ceil_f32(float %a) nounwind readnone {
+; DAG-X64-LABEL: ceil_f32:
+; DAG-X64: # %bb.0:
+; DAG-X64-NEXT: jmp ceilf@PLT # TAILCALL
+;
+; FASTISEL-X64-LABEL: ceil_f32:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: pushq %rax
+; FASTISEL-X64-NEXT: callq ceilf@PLT
+; FASTISEL-X64-NEXT: popq %rax
+; FASTISEL-X64-NEXT: retq
+;
+; X86-LABEL: ceil_f32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll ceilf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call float @llvm.ceil.f32(float %a)
+ ret float %c
+}
+
+define double @ceil_f64(double %a) nounwind readnone {
+; DAG-X64-LABEL: ceil_f64:
+; DAG-X64: # %bb.0:
+; DAG-X64-NEXT: jmp ceil@PLT # TAILCALL
+;
+; FASTISEL-X64-LABEL: ceil_f64:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: pushq %rax
+; FASTISEL-X64-NEXT: callq ceil@PLT
+; FASTISEL-X64-NEXT: popq %rax
+; FASTISEL-X64-NEXT: retq
+;
+; X86-LABEL: ceil_f64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll ceil
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call double @llvm.ceil.f64(double %a)
+ ret double %c
+}
+
+define x86_fp80 @ceil_f80(x86_fp80 %a) nounwind readnone {
+; X64-LABEL: ceil_f80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq ceill@PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
+;
+; X86-LABEL: ceil_f80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll ceill
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call x86_fp80 @llvm.ceil.f80(x86_fp80 %a)
+ ret x86_fp80 %c
+}
diff --git a/llvm/test/CodeGen/X86/isel-llvm-floor.ll b/llvm/test/CodeGen/X86/isel-llvm-floor.ll
new file mode 100644
index 0000000000000..63b4d6dc4ded6
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-llvm-floor.ll
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
+
+define float @floor_f32(float %a) nounwind readnone {
+; DAG-X64-LABEL: floor_f32:
+; DAG-X64: # %bb.0:
+; DAG-X64-NEXT: jmp floorf@PLT # TAILCALL
+;
+; FASTISEL-X64-LABEL: floor_f32:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: pushq %rax
+; FASTISEL-X64-NEXT: callq floorf@PLT
+; FASTISEL-X64-NEXT: popq %rax
+; FASTISEL-X64-NEXT: retq
+;
+; X86-LABEL: floor_f32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll floorf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call float @llvm.floor.f32(float %a)
+ ret float %c
+}
+
+define double @floor_f64(double %a) nounwind readnone {
+; DAG-X64-LABEL: floor_f64:
+; DAG-X64: # %bb.0:
+; DAG-X64-NEXT: jmp floor@PLT # TAILCALL
+;
+; FASTISEL-X64-LABEL: floor_f64:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: pushq %rax
+; FASTISEL-X64-NEXT: callq floor@PLT
+; FASTISEL-X64-NEXT: popq %rax
+; FASTISEL-X64-NEXT: retq
+;
+; X86-LABEL: floor_f64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll floor
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call double @llvm.floor.f64(double %a)
+ ret double %c
+}
+
+define x86_fp80 @floor_f80(x86_fp80 %a) nounwind readnone {
+; X64-LABEL: floor_f80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq floorl@PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
+;
+; X86-LABEL: floor_f80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll floorl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call x86_fp80 @llvm.floor.f80(x86_fp80 %a)
+ ret x86_fp80 %c
+}
diff --git a/llvm/test/CodeGen/X86/isel-llvm-trunc.ll b/llvm/test/CodeGen/X86/isel-llvm-trunc.ll
new file mode 100644
index 0000000000000..303017f1e9411
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-llvm-trunc.ll
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
+
+define float @trunc_f32(float %a) nounwind readnone {
+; DAG-X64-LABEL: trunc_f32:
+; DAG-X64: # %bb.0:
+; DAG-X64-NEXT: jmp truncf@PLT # TAILCALL
+;
+; FASTISEL-X64-LABEL: trunc_f32:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: pushq %rax
+; FASTISEL-X64-NEXT: callq truncf@PLT
+; FASTISEL-X64-NEXT: popq %rax
+; FASTISEL-X64-NEXT: retq
+;
+; X86-LABEL: trunc_f32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll truncf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call float @llvm.trunc.f32(float %a)
+ ret float %c
+}
+
+define double @trunc_f64(double %a) nounwind readnone {
+; DAG-X64-LABEL: trunc_f64:
+; DAG-X64: # %bb.0:
+; DAG-X64-NEXT: jmp trunc@PLT # TAILCALL
+;
+; FASTISEL-X64-LABEL: trunc_f64:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: pushq %rax
+; FASTISEL-X64-NEXT: callq trunc@PLT
+; FASTISEL-X64-NEXT: popq %rax
+; FASTISEL-X64-NEXT: retq
+;
+; X86-LABEL: trunc_f64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll trunc
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call double @llvm.trunc.f64(double %a)
+ ret double %c
+}
+
+define x86_fp80 @trunc_f80(x86_fp80 %a) nounwind readnone {
+; X64-LABEL: trunc_f80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq truncl@PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
+;
+; X86-LABEL: trunc_f80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll truncl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %c = call x86_fp80 @llvm.trunc.f80(x86_fp80 %a)
+ ret x86_fp80 %c
+}
|
| ; FASTISEL-X64-NEXT: popq %rax | ||
| ; FASTISEL-X64-NEXT: retq | ||
| ; | ||
| ; GISEL-X64-LABEL: floor_f32: |
There was a problem hiding this comment.
IIUC, it will fall back to selection DAG and as of now support is not there for GISEL. so maybe these checks are redundant.
RKSimon
requested changes
Sep 1, 2025
done. |
RKSimon
approved these changes
Sep 2, 2025
|
Thank you @RKSimon @abhishek-kaushik22 |
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I am working towards supporting G_INTRINSIC_TRUNC, G_FCEIL and G_FFLOOR. This patch adds isel test for usecase.
Ref https://llvm.org/docs/GlobalISel/GenericOpcode.html#g-fceil-g-fsqrt-g-ffloor-g-frint-g-fnearbyint