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[PowerPC][NFC] Update TableGen range punctuator with '...' #156893

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Merged
merged 1 commit into from
Sep 4, 2025
Merged

[PowerPC][NFC] Update TableGen range punctuator with '...' #156893

merged 1 commit into from
Sep 4, 2025

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lei137
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@lei137 lei137 commented Sep 4, 2025

The '-' punctuator was deprecated via: 196e6f9

@lei137 lei137 requested a review from s-barannikov September 4, 2025 14:15
@llvmbot
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llvmbot commented Sep 4, 2025

@llvm/pr-subscribers-backend-powerpc

Author: Lei Huang (lei137)

Changes

The '-' punctuator was deprecated via: 196e6f9

Patch is 76.62 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/156893.diff

6 Files Affected:

  • (modified) llvm/lib/Target/PowerPC/PPCInstrFormats.td (+474-474)
  • (modified) llvm/lib/Target/PowerPC/PPCInstrFuture.td (+26-26)
  • (modified) llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td (+59-59)
  • (modified) llvm/lib/Target/PowerPC/PPCInstrInfo.td (+1-1)
  • (modified) llvm/lib/Target/PowerPC/PPCInstrP10.td (+199-199)
  • (modified) llvm/lib/Target/PowerPC/PPCInstrSPE.td (+27-27)
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
index b4b475b470a56..fba1c6609dba0 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
@@ -18,7 +18,7 @@ class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
   bit PPC64 = 0;  // Default value, override with isPPC64
 
   let Namespace = "PPC";
-  let Inst{0-5} = opcode;
+  let Inst{0...5} = opcode;
   let OutOperandList = OOL;
   let InOperandList = IOL;
   let AsmString = asmstr;
@@ -34,7 +34,7 @@ class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
   let TSFlags{0}   = PPC970_First;
   let TSFlags{1}   = PPC970_Single;
   let TSFlags{2}   = PPC970_Cracked;
-  let TSFlags{5-3} = PPC970_Unit;
+  let TSFlags{5...3} = PPC970_Unit;
 
   // Indicate that this instruction is of type X-Form Load or Store
   bits<1> XFormMemOp = 0;
@@ -99,8 +99,8 @@ class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
   bit PPC64 = 0;  // Default value, override with isPPC64
 
   let Namespace = "PPC";
-  let Inst{0-5} = opcode1;
-  let Inst{32-37} = opcode2;
+  let Inst{0...5} = opcode1;
+  let Inst{32...37} = opcode2;
   let OutOperandList = OOL;
   let InOperandList = IOL;
   let AsmString = asmstr;
@@ -116,7 +116,7 @@ class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
   let TSFlags{0}   = PPC970_First;
   let TSFlags{1}   = PPC970_Single;
   let TSFlags{2}   = PPC970_Cracked;
-  let TSFlags{5-3} = PPC970_Unit;
+  let TSFlags{5...3} = PPC970_Unit;
 
   // Fields used for relation models.
   string BaseName = "";
@@ -135,7 +135,7 @@ class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
   let Pattern = pattern;
   bits<24> LI;
 
-  let Inst{6-29}  = LI;
+  let Inst{6...29}  = LI;
   let Inst{30}    = aa;
   let Inst{31}    = lk;
 }
@@ -148,12 +148,12 @@ class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
   bits<14> BD;
 
   bits<5> BI;
-  let BI{0-1} = BIBO{5-6};
-  let BI{2-4} = CR{0-2};
+  let BI{0...1} = BIBO{5...6};
+  let BI{2...4} = CR{0...2};
 
-  let Inst{6-10}  = BIBO{4-0};
-  let Inst{11-15} = BI;
-  let Inst{16-29} = BD;
+  let Inst{6...10}  = BIBO{4...0};
+  let Inst{11...15} = BI;
+  let Inst{16...29} = BD;
   let Inst{30}    = aa;
   let Inst{31}    = lk;
 }
@@ -161,8 +161,8 @@ class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
 class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL,
              string asmstr>
   : BForm<opcode, aa, lk, OOL, IOL, asmstr> {
-  let BIBO{4-0} = bo;
-  let BIBO{6-5} = 0;
+  let BIBO{4...0} = bo;
+  let BIBO{6...5} = 0;
   let CR = 0;
 }
 
@@ -171,9 +171,9 @@ class BForm_2<bits<6> opcode, bits<5> bo, bits<5> bi, bit aa, bit lk,
   : I<opcode, OOL, IOL, asmstr, IIC_BrB> {
   bits<14> BD;
 
-  let Inst{6-10}  = bo;
-  let Inst{11-15} = bi;
-  let Inst{16-29} = BD;
+  let Inst{6...10}  = bo;
+  let Inst{11...15} = bi;
+  let Inst{16...29} = BD;
   let Inst{30}    = aa;
   let Inst{31}    = lk;
 }
@@ -185,9 +185,9 @@ class BForm_3<bits<6> opcode, bit aa, bit lk,
   bits<5> BI;
   bits<14> BD;
 
-  let Inst{6-10}  = BO;
-  let Inst{11-15} = BI;
-  let Inst{16-29} = BD;
+  let Inst{6...10}  = BO;
+  let Inst{11...15} = BI;
+  let Inst{16...29} = BD;
   let Inst{30}    = aa;
   let Inst{31}    = lk;
 }
@@ -200,10 +200,10 @@ class BForm_3_at<bits<6> opcode, bit aa, bit lk,
   bits<5> BI;
   bits<14> BD;
 
-  let Inst{6-8}   = BO{4-2};
-  let Inst{9-10}  = at;
-  let Inst{11-15} = BI;
-  let Inst{16-29} = BD;
+  let Inst{6...8}   = BO{4...2};
+  let Inst{9...10}  = at;
+  let Inst{11...15} = BI;
+  let Inst{16...29} = BD;
   let Inst{30}    = aa;
   let Inst{31}    = lk;
 }
@@ -215,9 +215,9 @@ BForm_4<bits<6> opcode, bits<5> bo, bit aa, bit lk,
   bits<5> BI;
   bits<14> BD;
 
-  let Inst{6-10}  = bo;
-  let Inst{11-15} = BI;
-  let Inst{16-29} = BD;
+  let Inst{6...10}  = bo;
+  let Inst{11...15} = BI;
+  let Inst{16...29} = BD;
   let Inst{30}    = aa;
   let Inst{31}    = lk;
 }
@@ -231,7 +231,7 @@ class SCForm<bits<6> opcode, bits<1> xo1, bits<1> xo2,
 
   let Pattern = pattern;
 
-  let Inst{20-26} = LEV;
+  let Inst{20...26} = LEV;
   let Inst{30}    = xo1;
   let Inst{31}    = xo2;
 }
@@ -246,9 +246,9 @@ class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-15} = RA;
-  let Inst{16-31} = D;
+  let Inst{6...10}  = RST;
+  let Inst{11...15} = RA;
+  let Inst{16...31} = D;
 }
 
 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
@@ -273,9 +273,9 @@ class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-15} = 0;
-  let Inst{16-31} = D;
+  let Inst{6...10}  = RST;
+  let Inst{11...15} = 0;
+  let Inst{16...31} = D;
 }
 
 class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,
@@ -287,9 +287,9 @@ class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-15} = RA;
-  let Inst{16-31} = D;
+  let Inst{6...10}  = RST;
+  let Inst{11...15} = RA;
+  let Inst{16...31} = D;
 }
 
 class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr,
@@ -321,13 +321,13 @@ class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
   let Pattern = pattern;
   bits<24> LI;
 
-  let Inst{6-29}  = LI;
+  let Inst{6...29}  = LI;
   let Inst{30}    = aa;
   let Inst{31}    = lk;
 
-  let Inst{38-42}  = RST;
-  let Inst{43-47} = RA;
-  let Inst{48-63} = D;
+  let Inst{38...42}  = RST;
+  let Inst{43...47} = RA;
+  let Inst{48...63} = D;
 }
 
 // This is used to emit BL8+NOP.
@@ -349,11 +349,11 @@ class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
   bits<5>  RA;
   bits<16> D;
 
-  let Inst{6-8}   = BF;
+  let Inst{6...8}   = BF;
   let Inst{9}     = 0;
   let Inst{10}    = L;
-  let Inst{11-15} = RA;
-  let Inst{16-31} = D;
+  let Inst{11...15} = RA;
+  let Inst{16...31} = D;
 }
 
 class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
@@ -383,10 +383,10 @@ class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-15} = RA;
-  let Inst{16-29} = D;
-  let Inst{30-31} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...15} = RA;
+  let Inst{16...29} = D;
+  let Inst{30...31} = xo;
 }
 
 // ISA V3.0B 1.6.6 DX-Form
@@ -398,10 +398,10 @@ class DXForm<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
 
-  let Inst{6-10}  = RT;
-  let Inst{11-15} = D{5-1};  // d1
-  let Inst{16-25} = D{15-6}; // d0
-  let Inst{26-30} = xo;
+  let Inst{6...10}  = RT;
+  let Inst{11...15} = D{5...1};  // d1
+  let Inst{16...25} = D{15...6}; // d0
+  let Inst{26...30} = xo;
   let Inst{31}    = D{0};    // d2
 }
 
@@ -415,11 +415,11 @@ class DQ_RD6_RS5_DQ12<bits<6> opcode, bits<3> xo, dag OOL, dag IOL,
 
   let Pattern = pattern;
 
-  let Inst{6-10}  = XT{4-0};
-  let Inst{11-15} = RA;
-  let Inst{16-27} = DQ;
+  let Inst{6...10}  = XT{4...0};
+  let Inst{11...15} = RA;
+  let Inst{16...27} = DQ;
   let Inst{28}    = XT{5};
-  let Inst{29-31} = xo;
+  let Inst{29...31} = xo;
 }
 
 class DQForm_RTp5_RA17_MEM<bits<6> opcode, bits<4> xo, dag OOL, dag IOL,
@@ -431,10 +431,10 @@ class DQForm_RTp5_RA17_MEM<bits<6> opcode, bits<4> xo, dag OOL, dag IOL,
   bits<12> DQ;
   let Pattern = pattern;
 
-  let Inst{6-10} =  RTp{4-0};
-  let Inst{11-15} = RA;
-  let Inst{16-27} = DQ;
-  let Inst{28-31} = xo;
+  let Inst{6...10} =  RTp{4...0};
+  let Inst{11...15} = RA;
+  let Inst{16...27} = DQ;
+  let Inst{28...31} = xo;
 }
 
 // 1.7.6 X-Form
@@ -449,10 +449,10 @@ class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asms
 
   bit RC = 0;    // set by isRecordForm
 
-  let Inst{6-10}  = RST;
-  let Inst{11-15} = RA;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...15} = RA;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 
@@ -475,7 +475,7 @@ class XForm_tlbilx<bits<10> xo, dag OOL, dag IOL, string asmstr,
 class XForm_attn<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
                  InstrItinClass itin>
   : I<opcode, OOL, IOL, asmstr, itin> {
-  let Inst{21-30} = xo;
+  let Inst{21...30} = xo;
 }
 
 // This is the same as XForm_base_r3xo, but the first two operands are swapped
@@ -490,10 +490,10 @@ class XForm_base_r3xo_swapped
 
   bit RC = 0;    // set by isRecordForm
 
-  let Inst{6-10}  = RST;
-  let Inst{11-15} = RA;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...15} = RA;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 
@@ -528,10 +528,10 @@ class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-15} = RA;
+  let Inst{6...10}  = RST;
+  let Inst{11...15} = RA;
   let Inst{20}    = WS;
-  let Inst{21-30} = xo;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -570,12 +570,12 @@ class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RA;
   bits<5> RB;
 
-  let Inst{6-8}   = BF;
+  let Inst{6...8}   = BF;
   let Inst{9}     = 0;
   let Inst{10}    = L;
-  let Inst{11-15} = RA;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{11...15} = RA;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -587,10 +587,10 @@ class XForm_icbt<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RB;
 
   let Inst{6} = 0;
-  let Inst{7-10} = CT;
-  let Inst{11-15} = RA;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{7...10} = CT;
+  let Inst{11...15} = RA;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
   let Inst{31} = 0;
 }
 
@@ -600,9 +600,9 @@ class XForm_sr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RS;
   bits<4> SR;
 
-  let Inst{6-10} = RS;
-  let Inst{12-15} = SR;
-  let Inst{21-30} = xo;
+  let Inst{6...10} = RS;
+  let Inst{12...15} = SR;
+  let Inst{21...30} = xo;
 }
 
 class XForm_mbar<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
@@ -610,8 +610,8 @@ class XForm_mbar<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
          : I<opcode, OOL, IOL, asmstr, itin> {
   bits<5> MO;
 
-  let Inst{6-10} = MO;
-  let Inst{21-30} = xo;
+  let Inst{6...10} = MO;
+  let Inst{21...30} = xo;
 }
 
 class XForm_srin<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
@@ -620,9 +620,9 @@ class XForm_srin<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RS;
   bits<5> RB;
 
-  let Inst{6-10} = RS;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{6...10} = RS;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
 }
 
 class XForm_mtmsr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
@@ -631,9 +631,9 @@ class XForm_mtmsr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RS;
   bits<1> L;
 
-  let Inst{6-10} = RS;
+  let Inst{6...10} = RS;
   let Inst{15} = L;
-  let Inst{21-30} = xo;
+  let Inst{21...30} = xo;
 }
 
 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
@@ -649,11 +649,11 @@ class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RA;
   bits<5> RB;
 
-  let Inst{6-8}   = BF;
-  let Inst{9-10}  = 0;
-  let Inst{11-15} = RA;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{6...8}   = BF;
+  let Inst{9...10}  = 0;
+  let Inst{11...15} = RA;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -673,10 +673,10 @@ class XForm_18<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
   
-  let Inst{6-10}  = FRT;
-  let Inst{11-15} = FRA;
-  let Inst{16-20} = FRB;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = FRT;
+  let Inst{11...15} = FRA;
+  let Inst{16...20} = FRB;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -696,11 +696,11 @@ class XForm_20<bits<6> opcode, bits<6> xo, dag OOL, dag IOL, string asmstr,
 
   let Pattern = pattern;
   
-  let Inst{6-10}  = FRT;
-  let Inst{11-15} = FRA;
-  let Inst{16-20} = FRB;
-  let Inst{21-24} = tttt;
-  let Inst{25-30} = xo;
+  let Inst{6...10}  = FRT;
+  let Inst{11...15} = FRA;
+  let Inst{16...20} = FRB;
+  let Inst{21...24} = tttt;
+  let Inst{25...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -708,10 +708,10 @@ class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
                InstrItinClass itin, list<dag> pattern> 
   : I<opcode, OOL, IOL, asmstr, itin> {
   let Pattern = pattern;
-  let Inst{6-10}  = 31;
-  let Inst{11-15} = 0;
-  let Inst{16-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = 31;
+  let Inst{11...15} = 0;
+  let Inst{16...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -721,11 +721,11 @@ class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
   bits<2> L;
 
   let Pattern = pattern;
-  let Inst{6-8}   = 0;
-  let Inst{9-10}  = L;
-  let Inst{11-15} = 0;
-  let Inst{16-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...8}   = 0;
+  let Inst{9...10}  = L;
+  let Inst{11...15} = 0;
+  let Inst{16...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -736,12 +736,12 @@ class XForm_IMM2_IMM2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
   bits<2> PL;
 
   let Pattern = pattern;
-  let Inst{6-8}   = 0;
-  let Inst{9-10}  = L;
-  let Inst{11-13} = 0;
-  let Inst{14-15} = PL;
-  let Inst{16-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...8}   = 0;
+  let Inst{9...10}  = L;
+  let Inst{11...13} = 0;
+  let Inst{14...15} = PL;
+  let Inst{16...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -752,12 +752,12 @@ class XForm_IMM3_IMM2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
   bits<2> SC;
 
   let Pattern = pattern;
-  let Inst{6-7}   = 0;
-  let Inst{8-10}  = L;
-  let Inst{11-13} = 0;
-  let Inst{14-15} = SC;
-  let Inst{16-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...7}   = 0;
+  let Inst{8...10}  = L;
+  let Inst{11...13} = 0;
+  let Inst{14...15} = SC;
+  let Inst{16...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -803,9 +803,9 @@ class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
 
   bit RC = 0;    // set by isRecordForm
 
-  let Inst{6-10}  = RST;
-  let Inst{11-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
@@ -816,9 +816,9 @@ class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
 
   bit RC = 0;    // set by isRecordForm
 
-  let Inst{6-10}  = FM;
-  let Inst{11-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = FM;
+  let Inst{11...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 
@@ -828,11 +828,11 @@ class XForm_44<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RT;
   bits<3> BFA;
 
-  let Inst{6-10}  = RT;
-  let Inst{11-13} = BFA;
-  let Inst{14-15} = 0;
-  let Inst{16-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RT;
+  let Inst{11...13} = BFA;
+  let Inst{14...15} = 0;
+  let Inst{16...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -842,11 +842,11 @@ class XForm_45<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
   bits<5> RT;
   bits<2> L;
 
-  let Inst{6-10}  = RT;
-  let Inst{11-13} = 0;
-  let Inst{14-15} = L;
-  let Inst{16-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RT;
+  let Inst{11...13} = 0;
+  let Inst{14...15} = L;
+  let Inst{16...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -856,11 +856,11 @@ class X_FRT5_XO2_XO3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2, bits<10> xo,
   : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
   let Pattern = pattern;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-12} = xo1;
-  let Inst{13-15} = xo2;
-  let Inst{16-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...12} = xo1;
+  let Inst{13...15} = xo2;
+  let Inst{16...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -871,11 +871,11 @@ class X_FRT5_XO2_XO3_FRB5_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
   let Pattern = pattern;
   bits<5> FRB;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-12} = xo1;
-  let Inst{13-15} = xo2;
-  let Inst{16-20} = FRB;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...12} = xo1;
+  let Inst{13...15} = xo2;
+  let Inst{16...20} = FRB;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -886,12 +886,12 @@ class X_FRT5_XO2_XO3_DRM3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
   let Pattern = pattern;
   bits<3> DRM;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-12} = xo1;
-  let Inst{13-15} = xo2;
-  let Inst{16-17} = 0;
-  let Inst{18-20} = DRM;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...12} = xo1;
+  let Inst{13...15} = xo2;
+  let Inst{16...17} = 0;
+  let Inst{18...20} = DRM;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -902,12 +902,12 @@ class X_FRT5_XO2_XO3_RM2_X10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
   let Pattern = pattern;
   bits<2> RM;
 
-  let Inst{6-10}  = RST;
-  let Inst{11-12} = xo1;
-  let Inst{13-15} = xo2;
-  let Inst{16-18} = 0;
-  let Inst{19-20} = RM;
-  let Inst{21-30} = xo;
+  let Inst{6...10}  = RST;
+  let Inst{11...12} = xo1;
+  let Inst{13...15} = xo2;
+  let Inst{16...18} = 0;
+  let Inst{19...20} = RM;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -934,10 +934,10 @@ class XForm_htm0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
 
   bit RC = 1;
 
-  let Inst{6-9}   = 0;
+  let Inst{6...9}   = 0;
   let Inst{10}    = R;
-  let Inst{11-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{11...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 
@@ -949,8 +949,8 @@ class XForm_htm1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
   bit RC = 1;
 
   let Inst{6}     = A;
-  let Inst{7-20}  = 0;
-  let Inst{21-30} = xo;
+  let Inst{7...20}  = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 
@@ -961,10 +961,10 @@ class XForm_htm2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
 
   bit RC = 0;    // set by isRecordForm
 
-  let Inst{7-9}   = 0;
+  let Inst{7...9}   = 0;
   let Inst{10}    = L;
-  let Inst{11-20} = 0;
-  let Inst{21-30} = xo;
+  let Inst{11...20} = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 
@@ -975,9 +975,9 @@ class XForm_htm3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
 
   bit RC = 0;
 
-  let Inst{6-8}   = BF;
-  let Inst{9-20}  = 0;
-  let Inst{21-30} = xo;
+  let Inst{6...8}   = BF;
+  let Inst{9...20}  = 0;
+  let Inst{21...30} = xo;
   let Inst{31}    = RC;
 }
 
@@ -992,12 +992,12 @@ class X_BF3_L1_RS5_RS5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
 
   let Pattern = pattern;
 
-  let Inst{6-8}   = BF;
+  let Inst{6...8}   = BF;
   let Inst{9}     = 0;
   let Inst{10}    = L;
-  let Inst{11-15} = RA;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{11...15} = RA;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -1011,11 +1011,11 @@ class X_BF3_RS5_RS5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
 
   let Pattern = pattern;
 
-  let Inst{6-8}   = BF;
-  let Inst{9-10}  = 0;
-  let Inst{11-15} = RA;
-  let Inst{16-20} = RB;
-  let Inst{21-30} = xo;
+  let Inst{6...8}   = BF;
+  let Inst{9...10}  = 0;
+  let Inst{11...15} = RA;
+  let Inst{16...20} = RB;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -1035,10 +1035,10 @@ class X_BF3_DCMX7_RS5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
 
   let Pattern = pattern;
 
-  let Inst{6-8}  = BF;
-  let Inst{9-15} = DCMX;
-  let Inst{16-20} = VB;
-  let Inst{21-30} = xo;
+  let Inst{6...8}  = BF;
+  let Inst{9...15} = DCMX;
+  let Inst{16...20} = VB;
+  let Inst{21...30} = xo;
   let Inst{31}    = 0;
 }
 
@@ -1050,10 +1050,10 @@ class X_RD6_IMM8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
 
   let Pattern = pattern;
 
-  let I...
[truncated]

@lei137 lei137 requested review from amy-kwan and RolandF77 September 4, 2025 14:17
@lei137 lei137 mentioned this pull request Sep 4, 2025
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s-barannikov
s-barannikov approved these changes Sep 4, 2025
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LGTM

@lei137 lei137 merged commit 7bd958f into llvm:main Sep 4, 2025
11 checks passed
@lei137 lei137 deleted the updateTabGenRangePunctuator branch September 5, 2025 13:39
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@s-barannikov s-barannikov s-barannikov approved these changes

@amy-kwan amy-kwan Awaiting requested review from amy-kwan

@RolandF77 RolandF77 Awaiting requested review from RolandF77

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@lei137 @llvmbot @s-barannikov